Patents by Inventor Richard A. Blanchard

Richard A. Blanchard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9777914
    Abstract: An exemplary printable composition of a liquid or gel suspension of diodes generally includes a plurality of diodes, a first solvent and/or a viscosity modifier. An exemplary apparatus may include: a plurality of diodes; at least a trace amount of a first solvent; and a polymeric or resin film at least partially surrounding each diode of the plurality of diodes. Various exemplary diodes have a lateral dimension between about 10 to 50 microns and about 5 to 25 microns in height. Other embodiments may also include a plurality of substantially chemically inert particles having a range of sizes between about 10 to about 50 microns.
    Type: Grant
    Filed: February 24, 2015
    Date of Patent: October 3, 2017
    Assignee: NthDegree Technologies Worldwide Inc.
    Inventors: Mark David Lowenthal, William Johnstone Ray, Neil O. Shotton, Richard A. Blanchard, Brad Oraw, Mark Allan Lewandowski, Jeffrey Baldridge, Eric Anthony Perozziello
  • Patent number: 9742395
    Abstract: The present application teaches, inter alia, methods and circuits for operating a B-TRAN (double-base bidirectional bipolar junction transistor). Exemplary base drive circuits provide high-impedance drive to the base contact region on the side of the device instantaneously operating as the collector. (The B TRAN is controlled by applied voltage rather than applied current.) Current signals operate preferred implementations of drive circuits to provide diode-mode turn-on and pre-turnoff operation, as well as a hard ON state with low voltage drop (the “transistor-ON” state). In some preferred embodiments, self-synchronizing rectifier circuits provide adjustable low voltage for gate drive circuits. In some preferred embodiments, the base drive voltage used to drive the c-base region (on the collector side) is varied while base current at that terminal is monitored, so no more base current than necessary is applied. This solves the difficult challenge of optimizing base drive in a B-TRAN.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: August 22, 2017
    Assignee: Ideal Power Inc.
    Inventors: William C. Alexander, Richard A. Blanchard
  • Patent number: 9679999
    Abstract: A two-surface bidirectional power bipolar transistor is constructed with a two-surface cellular layout. Each emitter/collector region (e.g. doped n-type) is a local center of the repeated pattern, and is surrounded by a trench with an insulated field plate, which is tied to the potential of the emitter/collector region. The outer (other) side of this field plate trench is preferably surrounded by a base connection region (e.g. p-type), which provides an ohmic connection to the substrate. The substrate itself serves as the transistor's base.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: June 13, 2017
    Assignee: Ideal Power, Inc.
    Inventor: Richard A. Blanchard
  • Patent number: 9647553
    Abstract: Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: May 9, 2017
    Assignee: Ideal Power Inc.
    Inventors: William C. Alexander, Richard A. Blanchard
  • Publication number: 20170126225
    Abstract: The present application teaches, among other innovations, methods and circuits for operating a B-TRAN (double-base bidirectional bipolar junction transistor). A base drive circuit is described which provides high-impedance drive to the base contact region on whichever side of the device is operating as the collector (at a given moment). (The B-TRAN, unlike other bipolar junction transistors, is controlled by applied voltage rather than applied current.) The preferred implementation of the drive circuit is operated by control signals to provide diode-mode turn-on and pre-turnoff operation, as well as a hard ON state with a low voltage drop (the “transistor-ON” state). In some but not necessarily all preferred embodiments, an adjustable low voltage for the gate drive circuit is provided by a self-synchronizing rectifier circuit.
    Type: Application
    Filed: August 10, 2016
    Publication date: May 4, 2017
    Applicant: Ideal Power Inc.
    Inventors: William C. Alexander, Richard A. Blanchard
  • Publication number: 20170104478
    Abstract: Methods and systems for operating a double-base bidirectional power bipolar transistor. Two timing phases are used to transition into turn-off: one where each base is shorted to its nearest emitter/collector region, and a second one where negative drive is applied to the emitter-side base to reduce the minority carrier population in the bulk substrate. A diode prevents reverse turn-on while negative base drive is being applied.
    Type: Application
    Filed: September 15, 2016
    Publication date: April 13, 2017
    Applicant: Ideal Power Inc.
    Inventors: William C. Alexander, Richard A. Blanchard
  • Patent number: 9614028
    Abstract: The present application provides (in addition to more broadly applicable inventions) improvements which are particularly applicable to two-sided power semiconductor devices which use bipolar conduction. In this class of devices, the inventor has realized that two or three of the four (or more) semiconductor doping components which form the carrier-emission structures and control structures in the active device (array) portion of a two-sided power device can also be used, with surprising advantages, to form field-limiting rings around the active arrays on both surfaces. Most preferably, in some but not necessarily all embodiments, a shallow implant of one conductivity type is used to counterdope the surface of a well having the other conductivity type. This shallow implant, singly or in combination with another shallow implant of the same conductivity type, works to shield the well from the effects of excess charge at or above the surface of the semiconductor material.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: April 4, 2017
    Assignee: Ideal Power, Inc.
    Inventor: Richard A. Blanchard
  • Publication number: 20170085179
    Abstract: Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low.
    Type: Application
    Filed: May 25, 2016
    Publication date: March 23, 2017
    Applicant: Ideal Power Inc.
    Inventors: William C. Alexander, Richard A. Blanchard
  • Publication number: 20170077221
    Abstract: In one embodiment, a RESURF structure between a source and a drain in a lateral MOSFET is formed in a trench having a flat bottom surface and angled sidewalls toward the source. Alternating P and N-type layers are epitaxially grown in the trench, and their charges balanced to achieve a high breakdown voltage. In the area of the source, the ends of the P and N-layers angle upward to the surface under the lateral gate and contact the body region. Thus, for an N-channel MOSFET, a positive gate voltage above the threshold forms a channel between the source and the N-layers in the RESURF structure as well as creates an inversion of the ends of the P-layers near the surface for low on-resistance. In another embodiment, the RESURF structure is vertically corrugated by being formed around trenches, thus extending the length of the RESURF structure for a higher breakdown voltage.
    Type: Application
    Filed: July 5, 2016
    Publication date: March 16, 2017
    Inventors: Hamza Yilmaz, Mohamed N. Darwish, Richard A. Blanchard
  • Publication number: 20170069727
    Abstract: In one embodiment, a power MOSFET vertically conducts current. A bottom electrode may be connected to a positive voltage, and a top electrode may be connected to a low voltage, such as a load connected to ground. A gate and/or a field plate, such as polysilicon, is within a trench. The trench has a tapered oxide layer insulating the polysilicon from the silicon walls. The oxide is much thicker near the bottom of the trench than near the top to increase the breakdown voltage. The tapered oxide is formed by implanting nitrogen into the trench walls to form a tapered nitrogen dopant concentration. This forms a tapered silicon nitride layer after an anneal. The tapered silicon nitride variably inhibits oxide growth in a subsequent oxidation step.
    Type: Application
    Filed: August 25, 2016
    Publication date: March 9, 2017
    Inventors: Richard A. Blanchard, Mohamed N. Darwish, Jun Zeng
  • Publication number: 20170047395
    Abstract: A high power vertical insulated-gate switch is described that includes an active region, containing a cell array, and a surrounding termination region. The termination region is for at least the purpose of controlling a breakdown voltage and does not contain any switching cells. Assuming the anode is the silicon substrate (p-type), it is desirable to have good hole injection efficiency from the substrate in the active region in the device's on-state. Therefore, the substrate should be highly doped (p++) in the active region. It is desirable to have poor hole injection efficiency in the termination region so that there is a minimum concentration of holes in the termination region when the switch is turned off. Various doping techniques are disclosed that cause the substrate to efficiency inject holes into the active region but inefficiently inject holes into the termination region during the on-state.
    Type: Application
    Filed: August 4, 2016
    Publication date: February 16, 2017
    Inventors: Richard A. Blanchard, Hidenori Akiyama, Vladimir Rodov, Woytek Tworzydlo
  • Publication number: 20170018049
    Abstract: On a flexible substrate is printed, LEDs, a battery, a flasher, and an actuator. The actuator may be a photo-switch that causes the battery and flasher to periodically energize the LEDs when a sufficient ambient light impinges on the actuator. The substrate may be an insert in a transparent package containing a product, such as a razor. When the package is in the front of a display in a store, the ambient light causes the LEDs to flash, such as every 10-30 seconds to attract consumers to the product. The substrate may also form part of the outer surface of the package. The flasher may simply flash the LEDs or create a dynamic display by energizing different groups of the LEDs at different times.
    Type: Application
    Filed: July 16, 2015
    Publication date: January 19, 2017
    Inventors: Alexander S. Ray, Richard A. Blanchard, Bradley S. Oraw, Shawn Barber, Mark D. Lowenthal, William J. Ray, Neil O. Shotton, David Moffenbeier, Vera N. Lockett
  • Patent number: 9534772
    Abstract: An exemplary printable composition of a liquid or gel suspension of diodes comprises a plurality of diodes, a first solvent and/or a viscosity modifier. An exemplary apparatus comprises: a plurality of diodes; at least a trace amount of a first solvent; and a polymeric or resin film at least partially surrounding each diode of the plurality of diodes. Various exemplary diodes have a lateral dimension between about 10 to 50 microns and about 5 to 25 microns in height. Other embodiments may also include a plurality of substantially chemically inert particles having a range of sizes between about 10 to about 50 microns.
    Type: Grant
    Filed: June 7, 2015
    Date of Patent: January 3, 2017
    Assignee: NthDegree Technologies Worldwide Inc
    Inventors: Mark David Lowenthal, William Johnstone Ray, Neil O. Shotton, Richard A. Blanchard, Brad Oraw, Mark Allan Lewandowski, Jeffrey Baldridge, Eric Anthony Perozziello
  • Publication number: 20160351399
    Abstract: Methods and systems for double-sided semiconductor device fabrication. Devices having multiple leads on each surface can be fabricated using a high-temperature-resistant handle wafer and a medium-temperature-resistant handle wafer. Dopants can be introduced on both sides shortly before a single long high-temperature diffusion step diffuses all dopants to approximately equal depths on both sides. All high-temperature processing occurs with no handle wafer or with a high-temperature handle wafer attached. Once a medium-temperature handle wafer is attached, no high-temperature processing steps occur. High temperatures can be considered to be those which can result in damage to the device in the presence of aluminum-based metallizations.
    Type: Application
    Filed: May 25, 2016
    Publication date: December 1, 2016
    Applicant: Ideal Power Inc.
    Inventors: Richard A. Blanchard, William C. Alexander
  • Publication number: 20160329324
    Abstract: Two-surface bidirectional power bipolar transistors, in which the emitter/collector regions on the opposite surfaces of the die are each laid out as an array of stripes, and the stripes on opposite surfaces are not parallel to each other. Instead, the emitter/collector stripes on one surface, if projected normal to the surfaces, would define a pattern on the opposite surface which is orthogonal to the actual layout of stripes on that surface.
    Type: Application
    Filed: April 4, 2016
    Publication date: November 10, 2016
    Inventor: Richard A. Blanchard
  • Publication number: 20160329418
    Abstract: A two-surface bidirectional power bipolar transistor is constructed with a two-surface cellular layout. Each emitter/collector region (e.g. doped n-type) is a local center of the repeated pattern, and is surrounded by a trench with an insulated field plate, which is tied to the potential of the emitter/collector region. The outer (other) side of this field plate trench is preferably surrounded by a base connection region (e.g. p-type), which provides an ohmic connection to the substrate. The substrate itself serves as the transistor's base.
    Type: Application
    Filed: April 4, 2016
    Publication date: November 10, 2016
    Inventor: Richard A. Blanchard
  • Publication number: 20160322350
    Abstract: Bidirectional symmetrically-bidirectional power bipolar devices are laid out so that each emitter/collector region, on either side of the die, is laterally surrounded entirely by trenches which preferably contain insulated field plates, and which prevent lateral propagation of carriers. Most preferably the emitter/collector regions are laid out as stripes, so no part of the emitter/collector region is unexpectedly far from a good low-resistance connection to the base contact.
    Type: Application
    Filed: March 28, 2016
    Publication date: November 3, 2016
    Applicant: Ideal Power Inc.
    Inventor: Richard A. Blanchard
  • Publication number: 20160322484
    Abstract: A symmetrically-bidirectional power bipolar transistor having, on both surfaces of a semiconductor die, an n-type emitter/collector region which is completely surrounded by a first recessed field plate, which is itself completely surrounded by a p-type region including p+ contact areas. All of the p-type region is preferably bordered and surrounded by a second recessed field plate trench. The second recessed field plate trench is itself surrounded by an n-type region which is wholly or partially made of the same diffusion as the emitter/collector regions, but which is not connected to the metallization which connects the emitter/collector regions to extermal terminals.
    Type: Application
    Filed: March 28, 2016
    Publication date: November 3, 2016
    Applicant: Ideal Power Inc.
    Inventor: Richard A. Blanchard
  • Publication number: 20160322256
    Abstract: Methods and systems for fabricating bidirectional devices on both surfaces of a semiconductor wafer. Separation of the second handle wafer is accomplished by patterning a seal layer to form a grid before the second handle wafer is separated.
    Type: Application
    Filed: February 26, 2016
    Publication date: November 3, 2016
    Inventors: Richard A. Blanchard, William C. Alexander
  • Publication number: 20160293743
    Abstract: Power semiconductor devices, and related methods, where majority carrier flow is divided into paralleled flows through two drift regions of opposite conductivity types.
    Type: Application
    Filed: February 1, 2016
    Publication date: October 6, 2016
    Inventors: Mohamed N. Darwish, Jun Zeng, Richard A. Blanchard