Patents by Inventor Richard Francis

Richard Francis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030055957
    Abstract: A method of obtaining information from a networked device is provided. The method includes the steps of defining a network; providing a network adapter communicatively connected to the network, the network adapter connected to the networked device; providing memory in the network adapter; updating information in the memory, wherein the information describes a status of the networked device; placing the information into a response frame; and sending the response frame in response to any command frame received by the network adapter.
    Type: Application
    Filed: September 20, 2001
    Publication date: March 20, 2003
    Inventors: Heather Laudan Clark, Mark Walter Fagan, Richard Francis Russell, Michael Ray Timperman, Jason Eric Waldeck, Charles Thomas Wolfe
  • Patent number: 6523818
    Abstract: This invention provides a novel apparatus and method for securing a work object, such as a pipe, conduit, bar, rod or the like, using a wrench or other gripping tool that acts as a second set of hands. The wrench is pivotally attached to a support that has a receiving location wherein a work object sits. The wrench can be rotated about its end opposite the mouth so that the mouth engages the work object, and the wrench is held in engagement with the work object by the force of gravity. When a pipe wrench is gripping a work object in such a way, the work object will be prevented from rotating in one sense, thereby allowing someone practising this invention to use both hands to apply a torque to the work object.
    Type: Grant
    Filed: October 30, 2000
    Date of Patent: February 25, 2003
    Assignee: Le Mac Enterprises Ltd.
    Inventors: Richard Francis Le Vert, Martin Philip Sommerard
  • Patent number: 6522613
    Abstract: The present invention discloses a combination media and media station storage unit for storing a multiplicity of media elements along with a media station for the media elements. The combination unit allows a media station to be stored and secured for protection while allowing connections for signals and allowing controls for the media station to be accessed while it is in a stored and secure position. The combination media and media station storage unit also has removable lids that may contain optional features for adding functionality to the combination media and media station storage unit. These features include but are not limited to speakers, electronics for remote broadcast of playback information, electronics for remote control of the media station, batteries, windows for observing media station status, etc.
    Type: Grant
    Filed: January 5, 2000
    Date of Patent: February 18, 2003
    Inventors: Richard Francis Frankeny, Lisa Elena Brown
  • Publication number: 20020190281
    Abstract: An IGBT is formed in a thin (less than 250 microns thick) float zone silicon wafer using a hydrogen implant to form an N+ buffer layer at the bottom of the wafer. A weak anode is formed on the bottom of the wafer. A single hydrogen implant, or a plurality of hydrogen implants of progressively shallower depth and increasing dose can be used to form the implant in a diffused float zone wafer. The process may also be used to form an N+ contact region in silicon to permit a good ohmic contact to the silicon for any type device.
    Type: Application
    Filed: August 13, 2002
    Publication date: December 19, 2002
    Applicant: International Rectifier Corporation
    Inventors: Richard Francis, Chiu Ng
  • Publication number: 20020192964
    Abstract: A wafer having a rounded edge is thinned to 100 microns or less, producing a tapered razor like edge. The edge is ground to blunt it and reduce danger to personnel and equipment during handling of the wafer.
    Type: Application
    Filed: August 19, 2002
    Publication date: December 19, 2002
    Applicant: International Rectifier Corporation
    Inventor: Richard Francis
  • Patent number: 6482681
    Abstract: An IGBT is formed in a thin (less than 250 microns thick) float zone silicon wafer using a hydrogen implant to form an N+ buffer layer at the bottom of the wafer. A weak anode is formed on the bottom of the wafer. A single hydrogen implant, or a plurality of hydrogen implants of progressively shallower depth and increasing dose can be used to form the implant in a diffused float zone wafer. The process may also be used to form an N+ contact region in silicon to permit a good ohmic contact to the silicon for any type device.
    Type: Grant
    Filed: May 5, 2000
    Date of Patent: November 19, 2002
    Assignee: International Rectifier Corporation
    Inventors: Richard Francis, Chiu Ng
  • Patent number: 6465353
    Abstract: A wafer having a rounded edge is thinned to 100 microns or less, producing a tapered razor like edge. The edge is ground to blunt it and reduce danger to personnel and equipment during handling of the wafer.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: October 15, 2002
    Assignee: International Rectifier Corporation
    Inventor: Richard Francis
  • Publication number: 20020142720
    Abstract: A method of sharing a printer between a plurality of users on a computer network includes attaching host-based networking hardware to the printer. A network communication protocol defines a command channel and a data channel. Only one of the users is allowed to own the data channel at any single point in time. The host-based networking hardware is instructed to accept information on the data channel only from the user that owns the data channel.
    Type: Application
    Filed: March 27, 2001
    Publication date: October 3, 2002
    Inventors: Richard Francis Russell, Lawrence Russell Steward, Michael Ray Timperman, Jason Eric Waldeck, Charles Thomas Wolfe
  • Patent number: 6426248
    Abstract: A vertical conduction MOSFET semiconductor device is formed in a non-epitaxial (float zone) lightly doped silicon substrate. Device junction regions are formed in the top surface of the lightly doped float zone substrate. The backside of the wafer is then ground by surface grinding to attain a desired thickness. Phosphorus, or another N type dopant species, is then implanted into the back surface and is activated by a laser anneal. Back surface damage caused by grinding and/or implantation is intentionally retained. Alternatively, a “transparent” layer is formed by depositing highly doped amorphous silicon on the back surface. Titanium, or another metal (excluding aluminum), is then deposited on the back surface and annealed to form a titanium silicide, or other silicide for a contact electrode.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: July 30, 2002
    Assignee: International Rectifier Corporation
    Inventors: Richard Francis, Chiu Ng
  • Patent number: 6419082
    Abstract: A media storage unit is made by z-folding either a joined or a continuous web of material planes forming a plurality of N overlaid material planes. The material planes have tabs extending from both non-folded sides symmetrical about a center line of each material plane. Slits are made starting on each non folded side and extending a length towards the center of each material plane. The two slits on each material plane are made at the mid-point of the material planes between the tabs allowing the tabs be separated. Opposing tabs on each side of the overlaid material planes and closest to a folded side are joined with a corresponding tab on a adjacent overlaid plane, the opposing tabs are deflected and joined in opposite directions. The joined tabs become the retaining side members of a plurality of pockets formed by the overlaid material planes. The folded sides become the bottoms of sequential pockets with openings in opposite directions.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: July 16, 2002
    Inventor: Richard Francis Frankeny
  • Patent number: 6416697
    Abstract: A method and apparatus for forming an article (94) includes a moving of a forming surface (22) through an operative forming chamber (24) along a forming path length (40). A first fibrous stratum (26) of fiber material (96) can be deposited onto the forming surface (22), and the first fibrous stratum (26) can have a first stratum thickness (28). A first quantity of a first superabsorbent material (30) can be directed to form a selected combination with the first fibrous material to provide a first superabsorbent-containing stratum. A second fibrous stratum (32) of fibrous material can be deposited to overlie the first fibrous stratum (26), and the second fibrous stratum (32) can have a second stratum thickness (34). A second superabsorbent material (36) can be directed to form a selected combination with the second fibrous material to provide a second superabsorbent-containing stratum.
    Type: Grant
    Filed: December 3, 1999
    Date of Patent: July 9, 2002
    Assignee: Kimberly-Clark Worldwide, Inc.
    Inventors: Michael Barth Venturino, Randy Keith Burr, John Wallace de Vos, Leon Robert Flesburg, David Willis Heyn, Richard Francis Keller, Thomas George Olsen, Lorry Francis Sallee
  • Publication number: 20020082788
    Abstract: A method of performing an operation comprises operation steps and evaluation steps.
    Type: Application
    Filed: October 26, 2001
    Publication date: June 27, 2002
    Applicant: Rolls-Royce PLC
    Inventor: Richard Francis Marshall Smith
  • Patent number: 6411665
    Abstract: A clock recovery circuit includes a phase locked loop in which the control voltage of a voltage controlled oscillator is controlled by a loop filter driven by the output of a phase comparator. During acquisition of the phase locked condition, a frequency error detector is used to detect frequency error and input a frequency error signal to a charge pump circuit associated with the loop filter. Frequency error is detected by a method of determining the phase quadrant of clock signal in which each transition of the data occurs, an algorithm implemented by logic circuit being utilized to selectively generate the frequency error signal only for certain defined transitions between phase quadrant values. Sampling of the phase quadrant values is effected by sampling sub-circuits using latched values of the clock and quadrature clock signals to obtain samples of the clock and quadrature clock signals for each transition, and subsequently determining the phase quadrant value by a logical combination of the samples.
    Type: Grant
    Filed: March 11, 1999
    Date of Patent: June 25, 2002
    Assignee: Nortel Networks Limited
    Inventors: Joseph Chan, Richard Francis Bastable
  • Patent number: 6401110
    Abstract: Multiple competing processors cooperatively manage access to a shared resource. Each processor separately stores a lock table, listing shared resource subparts, such as memory addresses of a data storage device, for example. The lock tables are stored in nonvolatile storage. In each lock table, each subpart is associated with a “state,” such as; LOCAL or REMOTE. In response to access requests from the hosts, the processors exchange various messages to cooperatively elect a single processor to have exclusive access to the subparts involved in the access requests. After one processor is elected, the lock-holding processor configures its lock table to show the identified subpart in the LOCAL state, and all non-lock-holding processors configure their lock tables to show the identified subpart in the REMOTE state. Thus, rather than replicating one lock table for all processors, the processors separately maintain lock tables that are coordinated with each other.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: June 4, 2002
    Assignee: International Business Machines Corporation
    Inventors: Richard Francis Freitas, Divyesh Jadav, Deepak Kenchammana-Hosekote, Jaishankar Moothedath Menon, Hovey Raymond Strong, Jr.
  • Patent number: 6390078
    Abstract: A two stage exhaust gas recirculation (EGR) valve delivers a wide range of EGR flow while operating with reduced valve actuating forces allowing use of a reduced cost actuator such as a solenoid with smaller sized coil and armature. An attached valve body mounts concentric dual pintle valves including a larger first valve, which engages a valve seat in the valve body to control exhaust gas flow between inlet and outlet openings and a smaller second valve positioned inside the first valve and engaging a second valve seat in the head of the first valve. The second valve controls a low flow passage inside the first valve. The solenoid armature engages only the smaller second valve during a first stage of its stroke so that the smaller valve is opened first and flow control is maintained in a low flow range. Exhaust and intake differential pressures acting on the second valve are overcome by a smaller armature force because of the smaller area of the second valve.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: May 21, 2002
    Assignee: Delphi Technologies, Inc.
    Inventors: Paul Timothy Gee, James M. Keogan, Richard Francis Nashburn
  • Publication number: 20020052959
    Abstract: Multiple competing processors cooperatively manage access to a shared resource. Each processor separately stores a lock table, listing shared resource subparts, such as memory addresses of a data storage device, for example. The lock tables are stored in nonvolatile storage. In each lock table, each subpart is associated with a “state,” such as LOCAL or REMOTE. In response to access requests from the hosts, the processors exchange various messages to cooperatively elect a single processor to have exclusive access to the subparts involved in the access requests. After one processor is elected, the lock-holding processor configures its lock table to show the identified subpart in the LOCAL state, and all non-lock-holding processors configure their lock tables to show the identified subpart in the REMOTE state. Thus, rather than replicating one lock table for all processors, the processors separately maintain lock tables that are coordinated with each other.
    Type: Application
    Filed: November 30, 1998
    Publication date: May 2, 2002
    Inventors: RICHARD FRANCIS FREITAS, DIVYESH JADAV, DEEPAK KENCHAMMANA-HOSEKOTE, JAISHANKAR MOOTHEDATH MENON, HOVEY RAYMOND STRONG
  • Patent number: 6376054
    Abstract: A cost-effective surface metallization structure of a TCA carrier is produced by using a high-grit conducting paste to fill TSM vias in the TSM of the TCA carrier. This concept can be applied to alumina substrates with refractory metal conductors or to LCGC substrates with more noble metal conductors.
    Type: Grant
    Filed: February 10, 1999
    Date of Patent: April 23, 2002
    Assignee: International Business Machines Corporation
    Inventors: Scott I. Langenthal, Thomas E. Lombardi, Richard Francis Indyk, John Ulrich Knickerbocker, Srinivasa S. N. Reddy, Richard A. Shelleman, Rao V. Vallabhaneni, Donald Rene Wall
  • Publication number: 20020019084
    Abstract: A vertical conduction MOSFET semiconductor device is formed in a non-epitaxial (float zone) lightly doped silicon substrate. Device junction regions are formed in the top surface of the lightly doped float zone substrate. The backside of the wafer is then ground by surface grinding to attain a desired thickness. Phosphorus, or another N type dopant species, is then implanted into the back surface and is activated by a laser anneal. Back surface damage caused by grinding and/or implantation is intentionally retained. Alternatively, a “transparent” layer is formed by depositing highly doped amorphous silicon on the back surface. Titanium, or another metal (excluding aluminum), is then deposited on the back surface and annealed to form a titanium silicide, or other silicide for a contact electrode.
    Type: Application
    Filed: December 11, 2000
    Publication date: February 14, 2002
    Applicant: International Rectifier Corporation
    Inventors: Richard Francis, Chiu Ng
  • Publication number: 20020008246
    Abstract: A soft recovery diode is made by first implanting helium into the die to a location below the P/N junction and the implant annealed. An E-beam radiation process then is applied to the entire wafer and is also annealed. The diode then has very soft recovery characteristics without requiring heavy metal doping.
    Type: Application
    Filed: May 21, 2001
    Publication date: January 24, 2002
    Applicant: International Rectifier Corp.
    Inventors: Richard Francis, Chiu Ng
  • Publication number: 20010025683
    Abstract: The present invention provides a distinctive method and apparatus (20) for forming an article which includes one or more selectively configured strands of material. In particular aspects, the invention can provide a method and apparatus for wrapping a strand of material with a selected filament, and desirably, the filament can be an adhesive filament. The technique of the invention can include a moving of a strand of material (22) at a selected speed along an appointed machine-direction (34). A substantially continuous filament (24) can be directed onto the strand of material (22) along an oscillating filament path (26) to form a plurality of filament threads (28) extending from opposed lateral side regions (30) of the strand of material (22). An air stream (32) is directed to operatively wrap the filament threads (28) around the strand of material (22).
    Type: Application
    Filed: June 4, 1999
    Publication date: October 4, 2001
    Inventors: JOSEPH CONRAD BURRISS, ROBERT THOMAS CIMINI, CHRIS LEE HEIKKINEN, DAVID ANDRAE JUSTMANN, RICHARD FRANCIS KELLER, DONALD LEROY SMITH, DAVID JAMES VANEPEREN