Abstract: A method fits a digital hearing aid having an input transducer, a signal processing device and an output transducer. The signal processing device is configured to form an evaluation unit, a comparator unit, and a pre-amplification unit. An acoustic test signal is generated by an external testing device while the hearing aid is worn by a hearing-aid wearer. A digital test input signal is generated by the input transducer on the basis of the acoustic test signal. A sound pressure-dependent test quantity is determined on the basis of the digital test input signal by the evaluation unit. A deviation between the sound pressure-dependent test quantity and a reference quantity stored in the signal processing device is determined by the comparator unit. A pre-amplification by the pre-amplification unit is adjusted on the basis of the determined deviation.

Abstract: A disclosed semiconductor device includes (1) a silicon stack comprising a front-side Back-End-of-Line (BEOL) stack and a back side BEOL stack, the front-side BEOL stack comprising a plurality of signal routes and the back-side BEOL stack comprising a plurality of power delivery routes, and (2) a plurality of auxiliary power paths formed within the front-side BEOL stack and electrically coupled to the plurality of power delivery routes of the back-side BEOL stack via a plurality of programmable switches, the plurality of power delivery routes, the plurality of programmable switches, and the plurality of auxiliary power paths forming a programmable power delivery network (PDN). Various other apparatuses, systems, and methods of operation are also disclosed.

Abstract: An apparatus and method for efficiently creating layout of standard cells to improve floor planning of a chip. In various implementations, an integrated circuit uses multiple standard cells with an absence of diffusion breaks at cell boundaries. The standard cells use vertically stacked non-planer transistors. Multiple transistors are formed with an active region having a length between a source region and a drain region of a single transistor. Therefore, the active regions of these transistors are not formed across multiple gate terminals. By having active regions of these transistors formed across a single gate terminal of a single transistor, there is sufficient spacing to provide electrical isolation between two active regions of the two adjoining standard cells. This is true even when the two adjoining standard cells share a source/drain region at the cell boundaries. Accordingly, forming diffusion breaks at the edges of these standard cells can be skipped.

Abstract: A method for die pair partitioning can include providing a first circuit die having a first metal stack. The method can additionally include positioning a second circuit die having a second metal stack in a manner that places a temperature sensor in a transistor layer of the second circuit die in planar proximity to at least one hot spot located in an additional transistor layer of the first circuit die. The method can also include connecting the first metal stack of the first circuit die to the second metal stack of the second circuit die. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: A method for circuit die stacking can include providing a first circuit die having a first metal stack, wherein the first circuit die corresponds to a primary thermal source of an integrated circuit including the first circuit die. The method can additionally include providing a second circuit die of the integrated circuit, wherein the second circuit die has a second metal stack and is configured for connection to at least one of a package substrate or an additional die. The method can also include connecting the first metal stack to the second metal stack. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: A method for providing backside power can include providing a first circuit die having a first metal stack. The method can also include connecting a second metal stack of a second circuit die to the first metal stack of the first circuit die, wherein a backside power delivery network is located in a passivation layer of at least one of the first circuit die or the second circuit die. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: The disclosed integrated circuit for offset cross field effect transistors can include a first transistor include a first channel oriented in a first direction; an oxide layer adjacent to the first transistor; and a second transistor adjacent to the oxide layer. The second transistor can include a second channel that is oriented in a direction orthogonal to the first direction, and the first channel and the second channel can be laterally offset such that the second channel does not cross over the first channel. Various other apparatuses, systems, and methods are also disclosed.

Abstract: Manufacturing a semiconductor chip based on redefining tolerance rules to create an otherwise prohibited structure including redefining a tolerance rule to permit creation of a minimum area metal trench structure violating the tolerance rule during a routing operation; and fabricating the minimum area metal trench structure on the semiconductor substrate based on the redefined tolerance rule.

Abstract: A method for transmitting information relating to a hearing device, in particular a hearing aid, to an external device. The hearing device is thereby placed in an immediate environment of the external device and the hearing device broadcasts a generally receivable, unencrypted first information item containing metadata about the hearing device and/or access data. The unencrypted first information item is received by the external device. The external device changes its operating mode directly or indirectly as a result of the first information item and continues to be operated with the modified operating mode.

Abstract: A pharmaceutical container holder for holding pharmaceutical containers includes a receiver having an interior sized and shaped to receive and hold the pharmaceutical containers as a stack of pharmaceutical containers. The receiver has a removal location from which the pharmaceutical containers are removed from the receiver. A lift raises the pharmaceutical containers disposed in the interior of the receiver upward to move the pharmaceutical containers toward the removal location. A lift controller operates the lift to move the pharmaceutical containers upward toward the removal location after an upper-most pharmaceutical container of the stack of pharmaceutical containers has been removed from the removal location to move a subsequent upper-most pharmaceutical container of the stack of pharmaceutical containers to the removal location.

Abstract: Various semiconductor chip metallization layers and methods of manufacturing the same are disclosed. In aspect, a semiconductor chip is provided that includes a substrate, plural metallization layers on the substrate, a first conductor line in one of the metallization layers and a second conductor line in the one of the metallization layers in spaced apart relation to the first conductor line, each of the first conductor line and the second conductor line has a first line portion and a second line portion stacked on the first line portion, and a dielectric layer that has a portion positioned between the first conductor line and a second line, the portion has an air gap.

Abstract: A cell layout implemented in an integrated circuit (IC) includes a first plurality of independent power posts in a first metal layer. Each independent power post of the plurality of independent power posts provides a power connection to one device of a plurality of devices within the cell layout. A source or drain of each device of the plurality of devices is connected to one independent power post of the plurality of independent power posts. The IC further includes a plurality of independent power straps in a second metal layer that is different from the first metal layer. Each independent power strap of the plurality of independent power straps spans across and connects to multiple independent power posts of the first plurality of independent power posts.

Abstract: A method fits a digital hearing aid having an input transducer, a signal processing device and an output transducer. The signal processing device is configured to form an evaluation unit, a comparator unit, and a pre-amplification unit. An acoustic test signal is generated by an external testing device while the hearing aid is worn by a hearing-aid wearer. A digital test input signal is generated by the input transducer on the basis of the acoustic test signal. A sound pressure-dependent test quantity is determined on the basis of the digital test input signal by the evaluation unit. A deviation between the sound pressure-dependent test quantity and a reference quantity stored in the signal processing device is determined by the comparator unit. A pre-amplification by the pre-amplification unit is adjusted on the basis of the determined deviation.

Abstract: Manufacturing a semiconductor chip based on redefining tolerance rules to create an otherwise prohibited structure including redefining a tolerance rule to permit creation of a minimum area metal trench structure violating the tolerance rule during a routing operation; and fabricating the minimum area metal trench structure on the semiconductor substrate based on the redefined tolerance rule.

Abstract: A beverage dispensing machine includes a countertop for a conveyor that carries a plurality of cup holders around a track. A front side of the beverage dispenser machine is accessible by an operator to remove cups from the plurality of cup holders. A cup tower has a plurality of cup dispenser tubes that are each configured to hold a respective stack of cups. A cup grabber is movable up and down into and between a raised position in which the cup grabber is positioned to grab a cup from one of the stacks of cups and place a cup into one of the plurality of cup holders.

Abstract: A cell layout implemented in an integrated circuit (IC) includes a first plurality of independent power posts in a first metal layer. Each independent power post of the plurality of independent power posts provides a power connection to one device of a plurality of devices within the cell layout. A source or drain of each device of the plurality of devices is connected to one independent power post of the plurality of independent power posts. The IC further includes a plurality of independent power straps in a second metal layer that is different from the first metal layer. Each independent power strap of the plurality of independent power straps spans across and connects to multiple independent power posts of the first plurality of independent power posts.

Abstract: A method for transmitting information relating to a hearing device, in particular a hearing aid, to an external device. The hearing device is thereby placed in an immediate environment of the external device and the hearing device broadcasts a generally receivable, unencrypted first information item containing metadata about the hearing device and/or access data. The unencrypted first information item is received by the external device. The external device changes its operating mode directly or indirectly as a result of the first information item and continues to be operated with the modified operating mode.

Abstract: A flushometer system includes a pressure vessel with a flow path defined between a valve inlet chamber and an outlet and a valve assembly disposed within the pressure vessel and configured to selectively open and close the flow path. A primary diaphragm assembly is disposed within the pressure vessel and includes a primary disc configured to be moveable to actuate the valve assembly to selectively open and close the flow path between the valve inlet chamber and the outlet, and a primary diaphragm connected to the primary disc. A secondary diaphragm assembly is disposed within the pressure vessel and includes a secondary diaphragm and a secondary disc, the secondary diaphragm assembly configured to actuate the primary diaphragm assembly by venting fluid pressure on one side of the primary diaphragm. An activation assembly is configured to actuate the secondary diaphragm assembly by venting fluid pressure on one side of the secondary diaphragm.

Abstract: Various semiconductor chip metallization layers and methods of manufacturing the same are disclosed. In aspect, a semiconductor chip is provided that includes a substrate, plural metallization layers on the substrate, a first conductor line in one of the metallization layers and a second conductor line in the one of the metallization layers in spaced apart relation to the first conductor line, each of the first conductor line and the second conductor line has a first line portion and a second line portion stacked on the first line portion, and a dielectric layer that has a portion positioned between the first conductor line and a second line, the portion has an air gap.

Abstract: Various semiconductor chip metallization layers and methods of manufacturing the same are disclosed. In aspect, a semiconductor chip is provided that includes a substrate, plural metallization layers on the substrate, a first conductor line in one of the metallization layers and a second conductor line in the one of the metallization layers in spaced apart relation to the first conductor line, each of the first conductor line and the second conductor line has a first line portion and a second line portion stacked on the first line portion, and a dielectric layer that has a portion positioned between the first conductor line and a second line, the portion has an air gap.