Abstract: Among other things, methods, computer program products, and systems can be used to modify a previously booked broadcast media ad campaign. For example, an previously booked broadcast media ad campaign can be modified by selecting one or more parameters from among multiple parameters associated with the previously booked broadcast media ad campaign. The selected one or more parameters are modified, and the modified one or more parameters are applied to the previously booked broadcast media ad campaign while the previously booked broadcast media ad campaign is still running.

Abstract: Among other things, a computer-implemented method for customizing the distribution of advertising impressions includes generating a target number of advertising impressions for one or more advertising categories based, at least in part, on a non-uniform percentage distribution of advertising impressions for an advertising campaign, the percentage distribution corresponding to the one or more advertising categories. A determination is made on whether enough advertising inventory is available to fulfill the target number of advertising impressions. When a shortage of available inventory is detected in the one or more advertising categories, an actual number of advertising impressions for the one or more advertising categories is generated.

Abstract: Various aspects can be implemented for automated booking of advertising campaigns based on reach and frequency goals In general, one aspect can be a method that includes receiving campaign criteria including target reach and frequency for an advertising campaign. The method also includes allocating advertising spots based on the campaign criteria, and generating projected campaign reach and frequency based, at least in part, on the allocated advertising spots. The method further includes determining whether projected campaign reach and frequency sufficiently match target reach and frequency, and dynamically adjusting the allocation of advertising spots when the projected campaign reach and frequency do not sufficiently match the target reach and frequency. Other implementations of this aspect include corresponding systems, apparatus, and computer program products.

Abstract: A command is received to place a first physical machine into a lower power mode. The first physical machine has a virtual machine. In response to the received command, a procedure is performed to migrate the virtual machine from the first physical machine to a second physical machine.

Abstract: One embodiment of the invention is a method for handling an interruption during execution of an application on a computer system that uses a register stack, the method comprising receiving the interruption by a hypervisor, sending the interruption to an operating system for handling; if the register stack has a fault, then generating, by the operating system, another interruption that is delivered to the hypervisor; after receiving the another interruption, covering, by the hypervisor, the register stack; after covering the register stack, sending the interruption to the operating system for handling; and after handling, returning to execution of the application.

Abstract: A method comprises determining an amount of central processing unit (CPU) usage by a driver domain on behalf of a given virtual machine (VM) over a measurement period. The method further comprises determining a share of CPU to schedule for the given VM for a plurality of future scheduling intervals based at least in part on the determined amount of CPU usage by the driver domain on behalf of the given VM over the measurement period. The method further comprises scheduling the determined share of CPU access to the given VM for the plurality of future scheduling intervals.

Abstract: A method comprises determining an amount to which resource usage by a driver domain on behalf of a given virtual machine (VM) is to be limited. The method further comprises controlling the resource usage by the driver domain on behalf of the given VM so as not to exceed the determined amount. A system comprises a VM, a driver domain, and a shared resource that is usable by the VM and by the driver domain. The system further comprises a controller for limiting usage of the shared resource by the driver domain on behalf of the VM to prevent the usage of the shared resource by the driver domain on behalf of the VM from exceeding a determined amount.

Abstract: A method comprises observing communication through a virtualized interface between at least one virtual machine (VM) and a driver domain. Based on the observed communication through the virtualized interface, a weighted amount of communication between the VM and the driver domain is determined for each of the VM(s), wherein the weighted amount is based at least in part on at least one characteristic of the observed communication, such as directional flow and/or size of packets in the communication. Another method comprises evaluating CPU utilization of a target network driver domain in processing communications having different characteristics, and deriving corresponding weighting for the different communication characteristics. The derived weighting for the different communication characteristics are employed within a communication monitor that observes communication between virtual machines and the target network driver domain.

Abstract: A method comprises determining a flexible limit on an amount of resource usage by a driver domain on behalf of a given virtual machine (VM). The method further comprises controlling the resource usage by the driver domain on behalf of the given VM so as not to exceed the flexible limit except under a permitted condition. In certain embodiments the resource usage by the driver domain on behalf of the given VM is controlled so as not to exceed the flexible limit except when a slack share of resource usage is available to the driver domain. Such a slack share of resource usage is a share of resource usage allocated to the driver domain that will not otherwise be used on behalf of another VM.

Abstract: A method comprises determining an aggregate usage of CPU attributable to a given virtual machine (VM), wherein the aggregate usage of CPU attributable to the given VM includes a determined amount of CPU usage by a driver domain, such as by a network driver domain, that is attributable to the given VM. The method further comprises scheduling, by an aggregate proportional-share scheduler, CPU access to the given VM based at least in part on the determined aggregate usage of CPU attributable to the given VM.

Abstract: A method comprises observing communication through a virtualized interface between at least one virtual machine (VM) and a driver domain. The method further comprises determining for each of the at least one VM, based on the observed communication through the virtualized interface, an amount of communication between the VM and the driver domain. In certain embodiments, the method further comprises determining for each of the at least one VM, based on the determined amount of communication between the VM and the driver domain, CPU utilization of the driver domain attributable to the VM. In certain embodiments, the driver domain comprises a network driver domain. In certain embodiments, the driver domain comprises an isolated network diver domain.

Abstract: A method comprises scheduling, by a weighted proportional-share virtual time processor scheduler, processor access to a first consumer during a time period in which a second consumer is blocked from processor access. When the second consumer becomes unblocked from processor access, the weighted proportional-share virtual time processor scheduler determines whether the length of the time period over which the second consumer was blocked from processor access exceeds a predefined time threshold. When determined that the length of the time period over which the second consumer was blocked from processor access does not exceed the predefined time threshold, then scheduler does not update the virtual time of the second consumer before scheduling processor access for the second consumer.

Abstract: In various embodiments of the present invention, debugging and program-behavior-analysis software can reconstruct register-based processor states for nested routine calls from the backing-store memory employed by a modern processor, and by processors of similar architectures, to automatically spill and restore register values via a register stack engine. Sufficient information resides in the backing-store memory to reconstruct the stack frames for all nested routines. However, reconstructing the stack frames from the backing-store memory depends on identifying stored register vales in the backing-store memory containing saved values of the previous-frame-marker application register. Various embodiments of the present invention employ a set of heuristic tests to evaluate stored values in the backing-store memory in order to identify those values corresponding to the stored contents of the previous-frame-marker application register.

Abstract: A computer system includes at least one processor and a memory. A secure platform is stored in the memory for controlling the processor and the memory. An operating system image is stored in the memory for controlling the processor and the memory, and operates on top of the secure platform. An end user application is stored in the memory for controlling the processor and the memory, and operates on top of the operating system image. The secure platform is configured to provide a secure partition within the memory for storing secret data associated with and accessible by the end user application. The secure partition is inaccessible to the operating system and other tasks operating on top of the secure platform.

Abstract: Methods and devices for monitoring transactions on a bus are disclosed herein. An embodiment of the device comprises a memory component and a comparator component. The memory component stores at least one address. The comparator component is operatively connected to the memory component and the bus. The comparator component compares an address transmitted over the bus with the stored address for purposes of identifying impermissible addresses. The device causes a transaction associated with an impermissible address to be aborted.

Abstract: Embodiments of the present invention provide full benefit of the cover instruction provided by the Intel IA-64 architecture to code running at less than highest privilege level. In one embodiment of the present invention, prior to execution of a cover instruction by non-privileged code, the code obtains and stores the contents of the current-frame-marker register in memory. Then, the code executes a cover instruction to obtain a new, empty register stack frame and to relegate the registers of previously allocated stack frames to the dirty-register status. Subsequently, the processor state represented by the register values of the stack frame that was current when the cover instruction was executed can be recovered by first executing another cover instruction, computing a previous-frame-marker-register value and placing the computed value into the previous-frame-marker register, executing a first branch (br.

Abstract: A method and system for nearly immediately trapping a failure-to-check-a-return-value error in a computer program. Modern processor architectures, such as the Intel® IA-64 processor architecture, provide for control speculation of load instructions, including 1-bit NAT registers, associated with general registers, that indicate occurrences of deferred exceptions arising during execution of control-speculative load instructions targeting the corresponding general registers. One embodiment of the present invention employs the NAT registers associated with general-purpose registers to distinguish special values, often indicating error conditions, stored in general-purpose registers serving to store the return values of functions and routines.

Abstract: A method and system for nearly immediately trapping a failure-to-check-a-return-value error in a computer program. Modern processor architectures, such as the Intel® IA-64 processor architecture, provide for control speculation of load instructions, including 1-bit NAT registers, associated with general registers, that indicate occurrences of deferred exceptions arising during execution of control-speculative load instructions targeting the corresponding general registers. One embodiment of the present invention employs the NAT registers associated with general-purpose registers to distinguish special values, often indicating error conditions, stored in general-purpose registers serving to store the return values of functions and routines.

Abstract: A computer system includes at least one processor and a memory. A secure platform is stored in the memory for controlling the processor and the memory. An operating system image is stored in the memory for controlling the processor and the memory, and operates on top of the secure platform. An end user application is stored in the memory for controlling the processor and the memory, and operates on top of the operating system image. The secure platform is configured to provide a secure partition within the memory for storing secret data associated with and accessible by the end user application. The secure partition is inaccessible to the operating system and other tasks operating on top of the secure platform.

Abstract: As apparatus for responding silently to incoming calls in a communication system. Such an apparatus provides the capability to respond to incoming calls in the communication system which could be, for example, a telephone system, for those cases necessitating minimal disruptions such as wherein the telephone user receiving the call is in a meeting or other group situation. With the system disclosed herein, the telephone user can respond to the caller immediately with pre-recorded responses. Special responses can be pre-recorder for special situations or special callers.