Abstract: Novel dry powder compositions comprising and methods relating thereto are provided. The dry powder compositions comprise PDE5 inhibitors, such as vardenafil, or pharmaceutically acceptable salts or esters thereof. The dry powder compositions may optionally include an carrier/excipient. The concentration of active agent may be at least about 2% by weight. Methods of aerosolizing the dry powder compositions and using them to treat various diseases are also disclosed.

Abstract: The present disclosure provides to encapsulate the distal components of a scope to form a distal cap assembly, which removes the need for adhesives and potting often used in conventional distal cap assemblies. In particular, the present disclosure provides a spline structure configured to hold the distal end components in a predefined arrangement. The spline structure, along with the distal end components, is inserted into a mold and the spline structure along with the distal end components is encapsulated (e.g., in a polymer using hot melt, or the like) to form a distal cap. The distal cap locks the distal end components into the spline structure and protects the distal end components from moisture and relative movement. As a benefit, the present encapsulation techniques and distal cap assembly is faster to manufacture and provides less room for error than conventional methods.

Abstract: A medical device includes an operating member, a hub, and an end effector. The operating member includes an actuation portion. The hub includes a channel receiving the actuation portion of the operating member. The actuation portion of the operating member moves within the channel. The end effector is movable between a closed configuration and an open configuration. Distal extension of the operating member transitions the end effector to the open configuration, and proximal retraction of the operating member transitions the end effector to the closed configuration. The medical device is formed through an additive manufacturing process.

Abstract: An example method for manufacturing an object is disclosed. The example method includes determining the material composition of a base material, wherein determining the material composition of the base material includes determining the relative percentage of a first metal and the relative percentage of a second metal forming the base material. The method further includes selecting a common laser processing wavelength to be used in processing the base material. The method further includes processing the base material with a laser to form a processed material, the laser emits a laser beam matching the common laser processing wavelength during the processing of the base material and the material composition of the processed material is substantially similar to the material composition of the base material.

Abstract: A method of manufacturing an elevator of a medical device comprises using an additive manufacturing method, forming a pivot portion at a proximal end of the elevator. The pivot portion tapers proximally such that a proximalmost end of the elevator is thinner than more distal portions of the pivot portion. The method further comprises using the additive manufacturing method, forming a body of the elevator that is distal to the pivot portion. The elevator body includes a surface configured to contact an instrument inserted in a working channel of the medical device.

Abstract: A method of making a vascular occlusion device may include cutting a tubular member to form an expandable frame including a first hub integrally formed with the expandable frame adjacent a first end of the expandable frame, and a plurality of longitudinally-oriented struts extending in a direction opposite the first end; heat-setting the expandable frame to define an expanded configuration of the expandable frame; sliding a constrainment member over the plurality of longitudinally-oriented struts, the constrainment member being formed using additive manufacturing technology; fixedly securing the constrainment member to the plurality of longitudinally-oriented struts to define a second hub of the expandable frame; and cutting the plurality of longitudinally-oriented struts adjacent the constrainment member and opposite the first end relative to the constrainment member.

Abstract: A device for aseptic delivery of biological material from a vial includes a tubular barrel, a filter assembly, and a dispersion assembly. The dispersion assembly is at least partially disposed within the tubular barrel. The dispersion assembly includes a dispersion element, a piston, and a one-way valve. The dispersion element is in fluid communication with the vial to disperse the biological material from the vial. The piston is disposed at the distal end of the dispersion assembly and is in sealing contact with the tubular barrel. The one-way valve forms a fluid passageway in fluid communication with the dispersion element and the tubular barrel. The one-way valve is configured to allow a flow of the dispersed biological material from the dispersion element, through the fluid passageway, and into the tubular barrel, and to prevent a flow of the dispersed biological material from the tubular barrel into the dispersion assembly.

Abstract: A method of making a vascular occlusion device may include cutting a tubular member to form an expandable frame including a first hub integrally formed with the expandable frame adjacent a first end of the expandable frame, and a plurality of longitudinally-oriented struts extending in a direction opposite the first end; heat-setting the expandable frame to define an expanded configuration of the expandable frame; sliding a constrainment member over the plurality of longitudinally-oriented struts, the constrainment member being formed using additive manufacturing technology; fixedly securing the constrainment member to the plurality of longitudinally-oriented struts to define a second hub of the expandable frame; and cutting the plurality of longitudinally-oriented struts adjacent the constrainment member and opposite the first end relative to the constrainment member.

Abstract: A method of making a semiconductor device includes disposing a mask on a substrate; etching the mask to form an opening in the mask; etching a trench in the substrate beneath the opening in the mask; and implanting a dopant in an area of the substrate beneath the opening of the mask, the dopant capable of gettering mobile ions that can contaminate the substrate; wherein the dopant extends through the substrate from a sidewall of the trench and an endwall of the trench.

Abstract: A method of making a semiconductor device includes disposing a mask on a substrate; etching the mask to form an opening in the mask; etching a trench in the substrate beneath the opening in the mask; and implanting a dopant in an area of the substrate beneath the opening of the mask, the dopant capable of gettering mobile ions that can contaminate the substrate; wherein the dopant extends through the substrate from a sidewall of the trench and an endwall of the trench.

Abstract: A method of implementing three-dimensional (3D) integration of multiple integrated circuit (IC) devices includes forming a first insulating layer over a first IC device; forming a second insulating layer over a second IC device; forming a 3D, bonded IC device by aligning and bonding the first insulating layer to the second insulating layer so as to define a bonding interface therebetween, defining a first set of vias within the 3D bonded IC device, the first set of vias landing on conductive pads located within the first IC device, and defining a second set of vias within the 3D bonded IC device, the second set of vias landing on conductive pads located within the second device, such that the second set of vias passes through the bonding interface; and filling the first and second sets of vias with a conductive material.

Abstract: A computer readable medium is provided that is encoded with a program comprising instructions for performing a method for fabricating a 3D integrated circuit structure. Provided are an interface wafer including a first wiring layer and through-silicon vias, and a first active circuitry layer wafer including active circuitry. The first active circuitry layer wafer is bonded to the interface wafer. Then, a first portion of the first active circuitry layer wafer is removed such that a second portion remains attached to the interface wafer. A stack structure including the interface wafer and the second portion of the first active circuitry layer wafer is bonded to a base wafer. Next, the interface wafer is thinned so as to form an interface layer, and metallizations coupled through the through-silicon vias in the interface layer to the first wiring layer are formed on the interface layer.

Abstract: A computer readable medium is provided that is encoded with a program comprising instructions for performing a method for fabricating a 3D integrated circuit structure. Provided are an interface wafer including a first wiring layer and through-silicon vias, and a first active circuitry layer wafer including active circuitry. The first active circuitry layer wafer is bonded to the interface wafer. Then, a first portion of the first active circuitry layer wafer is removed such that a second portion remains attached to the interface wafer. A stack structure including the interface wafer and the second portion of the first active circuitry layer wafer is bonded to a base wafer. Next, the interface wafer is thinned so as to form an interface layer, and metallizations coupled through the through-silicon vias in the interface layer to the first wiring layer are formed on the interface layer.

Abstract: A method of forming a deep trench capacitor includes providing a wafer. Devices are formed on a front side of the wafer. A through-silicon-via is formed on a substrate of the wafer. Deep trenches are formed on a back side of the wafer. A deep trench capacitor is formed in the deep trench. The through-silicon-via connects the deep trench capacitor to the devices.

Abstract: A method for printing a wafer ID on a wafer, the method comprises identifying a wafer ID on a back side of the wafer. Subsequently, etching a plurality of recesses, consistent in size with chip features of the wafer, into the front side of the wafer, such that the plurality of recesses depicts the wafer ID. The method further comprises filling the recesses with a metal.

Abstract: A method for printing a wafer ID on a wafer, the method comprises identifying a wafer ID on a back side of the wafer. Subsequently, etching a plurality of recesses, consistent in size with chip features of the wafer, into the front side of the wafer, such that the plurality of recesses depicts the wafer ID. The method further comprises filling the recesses with a metal.

Abstract: A method is provided for fabricating a 3D integrated circuit structure. According to the method, a first active circuitry layer wafer is provided. The first active circuitry layer wafer comprises a P+ portion covered by a P? layer, and the P? layer includes active circuitry. The first active circuitry layer wafer is bonded face down to an interface wafer that includes a first wiring layer, and then the P+ portion of the first active circuitry layer wafer is selectively removed with respect to the P? layer of the first active circuitry layer wafer. Next, a wiring layer is fabricated on the backside of the P? layer. Also provided are a non-transitory computer readable medium encoded with a program for fabricating a 3D integrated circuit structure, and a 3D integrated circuit structure.

Abstract: A through-substrate via (TSV) structure that is immune to metal contamination due to a backside planarization process is provided. After forming a through-substrate via (TSV) trench, a diffusion barrier liner is conformally deposited on the sidewalls of the TSV trench. A dielectric liner is formed by depositing a dielectric material on vertical portions of the diffusion barrier liner. A metallic conductive via structure is formed by subsequently filling the TSV trench. Horizontal portions of the diffusion barrier liner are removed. The diffusion barrier liner protects the semiconductor material of the substrate during the backside planarization by blocking residual metallic material originating from the metallic conductive via structure from entering into the semiconductor material of the substrate, thereby protecting the semiconductor devices within the substrate from metallic contamination.

Abstract: A computer readable medium is provided that is encoded with a program comprising instructions for performing a method for fabricating a 3D integrated circuit structure. Provided are an interface wafer including a first wiring layer and through-silicon vias, and a first active circuitry layer wafer including active circuitry. The first active circuitry layer wafer is bonded to the interface wafer. Then, a first portion of the first active circuitry layer wafer is removed such that a second portion remains attached to the interface wafer. A stack structure including the interface wafer and the second portion of the first active circuitry layer wafer is bonded to a base wafer. Next, the interface wafer is thinned so as to form an interface layer, and metallizations coupled through the through-silicon vias in the interface layer to the first wiring layer are formed on the interface layer.

Abstract: The present disclosure provides a thermo-mechanically reliable copper TSV and a technique to form such TSV during BEOL processing. The TSV constitutes an annular trench which extends through the semiconductor substrate. The substrate defines the inner and outer sidewalls of the trench, which sidewalls are separated by a distance within the range of 5 to 10 microns. A conductive path comprising copper or a copper alloy extends within said trench from an upper surface of said first dielectric layer through said substrate. The substrate thickness can be 60 microns or less. A dielectric layer having interconnect metallization conductively connected to the conductive path is formed directly over said annular trench.