Abstract: A fractional-N offset phase locked loop (FN-OPLL) is provided. The FN-OPLL includes a fractional divider, a phase detector, a loop filter, a voltage controlled oscillator (VCO), and feedback circuitry. Combiner circuitry combines an initial fractional divide value and a modulation signal to provide a combined fractional divide value. Based on the combined fractional divide value, the fractional-N divider divides a reference frequency and provides a divided reference frequency to the phase detector. The phase detector compares a phase of the divided reference frequency to a phase of a feedback signal to provide a comparison signal. The comparison signal is filtered by the loop filter to provide a control signal to the VCO, where the control signal controls a frequency of an output signal of the VCO. The output signal is processed by the feedback circuitry to provide the feedback signal to the phase detector.

Abstract: The present invention is directed toward compositions and methods involving the inhibition of Ii expression in cells for the purpose of altering antigen presentation pathways. More specifically, disclosed are compositions and methods which relate to MHC Class II molecule presentation of antigenic epitopes which, under normal circumstances, would not be presented in association with MHC Class II molecules. The invention relates to presentation in cells which normally express MHC Class II molecules, as well as cells which can be induced to express MHC Class II molecules. Embodiments relating to RNA interference of Ii are specifically disclosed.

Abstract: Disclosed is an antigen presentation enhancing hybrid polypeptide which includes three elements. The first element is an N-terminal element consisting essentially of 4-16 residues of the mammalian Ii-Key peptide LRMKLPKPPKPVSKMR (SEQ ID NO: 1) and non-N-terminal deletion modifications thereof that retain antigen presentation enhancing activity. The second element is a chemical structure covalently linking the N-terminal element described above to the MHC Class II-presented epitope described below. The chemical structure is a covalently joined group of atoms which when arranged in a linear fashion forms a flexible chain which extends up to the length of 20 amino acids likewise arranged in a linear fashion, the chemical structure being selected from the group consisting of: i) immunologically neutral chemical structures, ii) a MHC Class I epitope or a portion thereof, and/or iii) an antibody-recognized determinant or a portion thereof.

Abstract: The present invention provides a system for adjusting a selectable capacitance of a variable capacitance array to compensate for voltage non-linearity of the variable capacitance array. In general, the system includes the variable capacitance array and a calibration circuit. The calibration circuit operates to determine a voltage across the variable capacitance array and to generate a capacitance selection signal based on the voltage across the variable capacitance array and a known capacitance versus voltage characteristic of the variable capacitance array.

Abstract: A method and apparatus for at least partially disassembling a pallet, the pallet having a plurality of deck board support interfaces, includes providing at least one cutting device that is positionable at any one of the board support interfaces and selectively positioning the at least one cutting device adjacent a particular board support interface of the pallet. The particular board support interface is cut with the at least one cutting device.

Abstract: The present invention provides circuitry for maintaining the desired phase noise across the tuning range of a frequency synthesizer by compensating the voltage controlled oscillator (VCO) bias current according to various tuning parameters available within the frequency synthesizer, thereby reducing overall current drain and inductor quality factor requirements. In general, the present invention includes a VCO bias circuit capable of controlling the VCO bias current in response to a control signal provided by additional circuitry based on the operating frequency of the frequency synthesizer. Further, the VCO bias current changes in response to changing the operating frequency of the frequency synthesizer.

Abstract: A system and method to automatically trigger data extraction from a Dealerships Management System (DMS) and transmitting it to an insurance service provider for automatic, real-time, generation of insurance application. Generally, an indicator is generated that a customer needs automobile insurance at a point-of-sale. The indicator causes the automatic extraction of the customer's information from a database. The extracted customer information is transmitted to a remote computer for automatic insurance fulfillment. Upon receiving the customer's information, the remote computer automatically populates the appropriate fields of an insurance application and transmits the insurance application to the customer. Upon approval of the insurance application by the customer, a confirmation of insurance is sent to the customer.

Abstract: A fractional sequence generator for use in a F-N synthesizer includes a multi-accumulator structure providing a plurality of carry-out signals for application to an adder through a recombination network to generate an output fractional sequence, S, having an average value given by avg(S)=C/D, where C/D is the desired fractional part of the divisor, and denominator, D, is programmable. Illustratively, contents of a n-bit accumulator in each accumulator is augmented by a function of the programmable denominator value upon a carry-out of the associated n-bit adder in that accumulator.

Abstract: A payment card processing system and method is provided.

Abstract: The invention provides an apparatus and method for calibrating both the pole/zero locations and the gain of a charge pump phase-locked loop's (PLL's) frequency response with one calibration operation. In one embodiment, the calibration is performed using a bandgap voltage reference and a stable frequency reference in order to measure a slew rate (I/C), defined as a current-to-capacitance ratio, and then adjusting the RC time constant (tRC) by adjusting the capacitance value. The adjustment setting is used in the loop filter capacitors, thereby calibrating the pole and zero locations of the PLL, which depend on the RC product. The charge pump reference current is proportional to the ratio of the bandgap voltage to the resistor value. When the capacitance is adjusted, the slew rate is calibrated as well, wherein the slew rate represents a portion of the loop gain of the PLL.

Abstract: A system is provided for compensating for tuning gain variations in a phase lock loop. Compensation is performed by a calibration system that estimates the tuning gain of the oscillator and then adjusts the charge pump current value by a ratio of the nominal tuning gain to the measured tun gain. The tuning gain measurement is performed by measuring the change in the voltage controlled oscillator's tuning control voltage when the phase lock loop is locked to two different frequencies, which are separated by a fixed, predetermined amount. The two frequencies may be above or below the final output frequency of the VCO, or the second frequency may be the final frequency in order to reduce calibration time and settling time.

Abstract: The present invention provides an efficient coarse tuning process for fractional-N synthesizers. In general, a divided reference signal and a divided controllable oscillator (CO) signal from the phase lock loop (PLL) of a synthesizer are each further divided by a common factor M to provide an average reference signal and an average CO signal, respectively. Averaging the divided CO signal reduces jitter caused by fractional-N division of the CO signal. The frequencies of the average CO signal and the average reference signal are compared and the result is used to select an appropriate tuning curve for operating the CO.

Abstract: A fractional sequence generator having a plurality of cascaded accumulators whose carry-outs-upon-overflow are provided over a plurality of recombination paths and selective delays to an adder, the pattern of selective delays being modified by the addition of delay elements in all recombination paths except the last to reduce the number of quantization error terms in the transfer function of the sequence generator. Illustrative embodiments may have any number (greater than one) of accumulators and recombination paths, while continuing to exhibit desired simplified frequency response characteristics.

Abstract: Disclosed is an antigen presentation enhancing hybrid polypeptide which includes three elements. The first element is an N-terminal element consisting essentially of 4-16 residues of the mammalian Ii-Key peptide LRMKLPKPPKPVSKMR (SEQ ID NO: ______) and non-N-terminal deletion modifications thereof that retain antigen presentation enhancing activity. The second element is a chemical structure covalently linking the N-terminal element described above to the MHC Class II-presented epitope described below. The chemical structure is a covalently joined group of atoms which when arranged in a linear fashion forms a flexible chain which extends up to the length of 20 amino acids likewise arranged in a linear fashion, the chemical structure being selected from the group consisting of: i) immunologically neutral chemical structures, ii) a MHC Class I epitope or a portion thereof, and/or iii) an antibody-recognized determinant or a portion thereof.

Abstract: The present invention provides for compensating for tuning gain variations in a phase lock loop. Compensation is performed by a calibration system that estimates the tuning gain of the oscillator and then adjusts the charge pump current value by a ratio of the nominal tuning gain to the measured tuning gain. The tuning gain measurement is performed by measuring the change in the voltage controlled oscillator's tuning control voltage when the phase lock loop is locked to two different frequencies, which are separated by a fixed, predetermined amount. The two frequencies may be above or below the final output frequency of the VCO, or the second frequency may be the final frequency in order to reduce calibration time and settling time.

Abstract: The present invention provides an efficient coarse tuning process for fractional-N synthesizers. In general, a divided reference signal and a divided controllable oscillator (CO) signal from the phase lock loop (PLL) of a synthesizer are each further divided by a common factor M to provide an average reference signal and an average CO signal, respectively. Averaging the divided CO signal reduces jitter caused by fractional-N division of the CO signal. The frequencies of the average CO signal and the average reference signal are compared and the result is used to select an appropriate tuning curve for operating the CO.

Abstract: The present invention is directed toward composition and methods involving the inhibition of Ii expression in cells for the purpose of altering antigen presentation pathways. More specifically, disclosed are compositions and methods which relate to MHC Class II molecule presentation of antigenic epitopes which, under normal circumstances, would not be presented in association with MHC Class II molecules. The invention relates to presentation in cells which normally express MHC Class II molecules, as well as cells which can be induced to express MHC Class II molecules.

Abstract: Disclosed is a specific regulator of Ii protein expression or immunoregulatory function. Specifically disclosed are several forms of the specific regulator of Ii, including those which function through the formation of a duplex molecule with an RNA molecule encoding mammalian Ii protein to inhibit Ii protein synthesis at the translation level. This class includes copolymers comprised of nucleotide bases which hybridize specifically to the RNA molecule encoding mammalian Ii protein, and also expressible reverse gene constructs. In other aspects, the disclosure relates to MHC class II-positive antigen presenting cells containing a specific regulator of Ii expression. Such cells are useful, for example, in the display of autodeterminant peptides in association with MHC class II proteins. Compositions of the invention find application in methods for treating diseases, for example malignancies and autoimmune disorders, in a patient by enhancing immunological attack on undesired cells.

Abstract: A fractional sequence generator for use in a F-N synthesizer includes a multi-accumulator structure providing a plurality of carry-out signals for application to an adder through a recombination network to generate an output fractional sequence, S, having an average value given by avg(S)=C/D, where C/D is the desired fractional part of the divisor, and denominator, D, is programmable. Illustratively, contents of a n-bit accumulator in each accumulator is augmented by a function of the programmable denominator value upon a carry-out of the associated n-bit adder in that accumulator.

Abstract: A fractional sequence generator having a plurality of cascaded accumulators whose carry-outs-upon-overflow are provided over a plurality of recombination paths and selective delays to an adder, the pattern of selective delays being modified by the addition of delay elements in all recombination paths except the last to reduce the number of quantization error terms in the transfer function of the sequence generator. Illustrative embodiments may have any number (greater than one) of accumulators and recombination paths, while continuing to exhibit desired simplified frequency response characteristics.