Patents by Inventor Robert L. Wisnieff

Robert L. Wisnieff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11216595
    Abstract: A private key of a public-private key pair with a corresponding identity is written to an integrated circuit including a processor, a non-volatile memory, and a cryptographic engine coupled to the processor and the non-volatile memory. The private key is written to the non-volatile memory. The integrated circuit is implemented in complementary metal-oxide semiconductor 14 nm or smaller technology. The integrated circuit is permanently modified, subsequent to the writing, such that further writing to the non-volatile memory is disabled and such that the private key can be read only by the cryptographic engine and not off-chip. Corresponding integrated circuits and wafers are also disclosed.
    Type: Grant
    Filed: September 21, 2019
    Date of Patent: January 4, 2022
    Assignee: International Business Machines Corporation
    Inventors: Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Kohji Hosokawa, Charanjit Jutla, Wanki Kim, Chandrasekara Kothandaraman, Chung Lam, Frank R. Libsch, Seiji Munetoh, Ramachandran Muralidhar, Vijay Narayanan, Dirk Pfeiffer, Devendra K. Sadana, Ghavam G. Shahidi, Robert L. Wisnieff
  • Patent number: 11106845
    Abstract: Techniques and a system for visualization or interaction with a quantum processor are provided. In one example, a system includes a quantum programming component and a visualization component. The quantum programming component manages a quantum programming process to generate topology data for a quantum processor that is indicative of a physical topology of a set of qubits associated with the quantum processor. The visualization component generates visualization data for the topology data that comprises a set of planar slice elements arranged to correspond to the physical topology of the set of qubits. The set of planar slice elements indicate one or more operations performed at a time step associated with the quantum programming process.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: August 31, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Edwin Peter Dawson Pednault, Robert L. Wisnieff, Hyun Kyu Seo
  • Patent number: 11073687
    Abstract: Methods and systems for cleaning an optic include cleaning an optic with ultrasonic vibrations. The locations of nodes in a standing wave of the ultrasonic vibrations are changed by changing a frequency of vibration during cleaning.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: July 27, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Guy M. Cohen, Lior Horesh, Raya Horesh, Theodore G. van Kessel, Robert L. Wisnieff
  • Patent number: 11055459
    Abstract: A method of forming an electrical device is provided that includes forming microprocessor devices on a microprocessor die; forming memory devices on an memory device die; forming component devices on a component die; and forming a plurality of packing devices on a packaging die. Transferring a plurality of each of said microprocessor devices, memory devices, component devices and packaging components to a supporting substrate, wherein the packaging components electrically interconnect the memory devices, component devices and microprocessor devices in individualized groups. Sectioning the supporting substrate to provide said individualized groups of memory devices, component devices and microprocessor devices that are interconnected by a packaging component.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: July 6, 2021
    Assignee: International Business Machines Corporation
    Inventors: Qianwen Chen, Li-Wen Hung, Wanki Kim, John U. Knickerbocker, Kenneth P. Rodbell, Robert L. Wisnieff
  • Patent number: 10997321
    Abstract: A private key of a public-private key pair with a corresponding identity is written to an integrated circuit including a processor, a non-volatile memory, and a cryptographic engine coupled to the processor and the non-volatile memory. The private key is written to the non-volatile memory. The integrated circuit is implemented in complementary metal-oxide semiconductor 14 nm or smaller technology. The integrated circuit is permanently modified, subsequent to the writing, such that further writing to the non-volatile memory is disabled and such that the private key can be read only by the cryptographic engine and not off-chip. Corresponding integrated circuits and wafers are also disclosed.
    Type: Grant
    Filed: September 21, 2019
    Date of Patent: May 4, 2021
    Assignee: International Business Machines Corporation
    Inventors: Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Kohji Hosokawa, Charanjit Jutla, Wanki Kim, Chandrasekara Kothandaraman, Chung Lam, Frank R. Libsch, Seiji Munetoh, Ramachandran Muralidhar, Vijay Narayanan, Dirk Pfeiffer, Devendra K. Sadana, Ghavam G. Shahidi, Robert L. Wisnieff
  • Publication number: 20200167515
    Abstract: Techniques and a system for visualization or interaction with a quantum processor are provided. In one example, a system includes a quantum programming component and a visualization component. The quantum programming component manages a quantum programming process to generate topology data for a quantum processor that is indicative of a physical topology of a set of qubits associated with the quantum processor. The visualization component generates visualization data for the topology data that comprises a set of planar slice elements arranged to correspond to the physical topology of the set of qubits. The set of planar slice elements indicate one or more operations performed at a time step associated with the quantum programming process.
    Type: Application
    Filed: February 3, 2020
    Publication date: May 28, 2020
    Inventors: Edwin Peter Dawson Pednault, Robert L. Wisnieff, Hyun Kyu Seo
  • Publication number: 20200110851
    Abstract: Techniques and a system for visualization or interaction with a quantum processor are provided. In one example, a system includes a quantum programming component and a visualization component. The quantum programming component manages a quantum programming process to generate topology data for a quantum processor that is indicative of a physical topology of a set of qubits associated with the quantum processor. The visualization component generates visualization data for the topology data that comprises a set of planar slice elements arranged to correspond to the physical topology of the set of qubits. The set of planar slice elements indicate one or more operations performed at a time step associated with the quantum programming process.
    Type: Application
    Filed: October 9, 2018
    Publication date: April 9, 2020
    Inventors: Edwin Peter Dawson Pednault, Robert L. Wisnieff, Hyun Kyu Seo
  • Patent number: 10592626
    Abstract: Techniques and a system for visualization or interaction with a quantum processor are provided. In one example, a system includes a quantum programming component and a visualization component. The quantum programming component manages a quantum programming process to generate topology data for a quantum processor that is indicative of a physical topology of a set of qubits associated with the quantum processor. The visualization component generates visualization data for the topology data that comprises a set of planar slice elements arranged to correspond to the physical topology of the set of qubits. The set of planar slice elements indicate one or more operations performed at a time step associated with the quantum programming process.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: March 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Edwin Peter Dawson Pednault, Robert L. Wisnieff, Hyun Kyu Seo
  • Publication number: 20200064624
    Abstract: Methods and systems for cleaning an optic include cleaning an optic with ultrasonic vibrations. The locations of nodes in a standing wave of the ultrasonic vibrations are changed by changing a frequency of vibration during cleaning.
    Type: Application
    Filed: November 1, 2019
    Publication date: February 27, 2020
    Inventors: Guy M. Cohen, Lior Horesh, Raya Horesh, Theodore G. van Kessel, Robert L. Wisnieff
  • Publication number: 20200019731
    Abstract: A private key of a public-private key pair with a corresponding identity is written to an integrated circuit including a processor, a non-volatile memory, and a cryptographic engine coupled to the processor and the non-volatile memory. The private key is written to the non-volatile memory. The integrated circuit is implemented in complementary metal-oxide semiconductor 14 nm or smaller technology. The integrated circuit is permanently modified, subsequent to the writing, such that further writing to the non-volatile memory is disabled and such that the private key can be read only by the cryptographic engine and not off-chip. Corresponding integrated circuits and wafers are also disclosed.
    Type: Application
    Filed: September 21, 2019
    Publication date: January 16, 2020
    Inventors: Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Kohji Hosokawa, Charanjit Jutla, Wanki Kim, Chandrasekara Kothandaraman, Chung Lam, Frank R. Libsch, Seiji Munetoh, Ramachandran Muralidhar, Vijay Narayanan, Dirk Pfeiffer, Devendra K. Sadana, Ghavam G. Shahidi, Robert L. Wisnieff
  • Publication number: 20200019732
    Abstract: A private key of a public-private key pair with a corresponding identity is written to an integrated circuit including a processor, a non-volatile memory, and a cryptographic engine coupled to the processor and the non-volatile memory. The private key is written to the non-volatile memory. The integrated circuit is implemented in complementary metal-oxide semiconductor 14 nm or smaller technology. The integrated circuit is permanently modified, subsequent to the writing, such that further writing to the non-volatile memory is disabled and such that the private key can be read only by the cryptographic engine and not off-chip. Corresponding integrated circuits and wafers are also disclosed.
    Type: Application
    Filed: September 21, 2019
    Publication date: January 16, 2020
    Inventors: Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Kohji Hosokawa, Charanjit Jutla, Wanki Kim, Chandrasekara Kothandaraman, Chung Lam, Frank R. Libsch, Seiji Munetoh, Ramachandran Muralidhar, Vijay Narayanan, Dirk Pfeiffer, Devendra K. Sadana, Ghavam G. Shahidi, Robert L. Wisnieff
  • Patent number: 10527843
    Abstract: Methods and systems for cleaning an optic include measuring a state of the optic. It is determined whether the optic needs to be cleaned based on the measured state of the optic. The optic is cleaned with ultrasonic vibrations if the optic needs to be cleaned.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: January 7, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Guy M. Cohen, Lior Horesh, Raya Horesh, Theodore G. van Kessel, Robert L. Wisnieff
  • Patent number: 10520723
    Abstract: Methods and systems for cleaning an optic include measuring a state of the optic. It is determined whether the optic needs to be cleaned based on the measured state of the optic. The optic is cleaned with ultrasonic vibrations if the optic needs to be cleaned.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: December 31, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Guy M. Cohen, Lior Horesh, Raya Horesh, Theodore G. van Kessel, Robert L. Wisnieff
  • Publication number: 20190311082
    Abstract: A method of forming an electrical device is provided that includes forming microprocessor devices on a microprocessor die; forming memory devices on an memory device die; forming component devices on a component die; and forming a plurality of packing devices on a packaging die. Transferring a plurality of each of said microprocessor devices, memory devices, component devices and packaging components to a supporting substrate, wherein the packaging components electrically interconnect the memory devices, component devices and microprocessor devices in individualized groups. Sectioning the supporting substrate to provide said individualized groups of memory devices, component devices and microprocessor devices that are interconnected by a packaging component.
    Type: Application
    Filed: June 6, 2019
    Publication date: October 10, 2019
    Inventors: Qianwen Chen, Li-Wen Hung, Wanki Kim, John U. Knickerbocker, Kenneth P. Rodbell, Robert L. Wisnieff
  • Patent number: 10423805
    Abstract: A private key of a public-private key pair with a corresponding identity is written to an integrated circuit including a processor, a non-volatile memory, and a cryptographic engine coupled to the processor and the non-volatile memory. The private key is written to the non-volatile memory. The integrated circuit is implemented in complementary metal-oxide semiconductor 14 nm or smaller technology. The integrated circuit is permanently modified, subsequent to the writing, such that further writing to the non-volatile memory is disabled and such that the private key can be read only by the cryptographic engine and not off-chip. Corresponding integrated circuits and wafers are also disclosed.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: September 24, 2019
    Assignee: International Business Machines Corporation
    Inventors: Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Kohji Hosokawa, Charanjit Jutla, Wanki Kim, Chandrasekara Kothandaraman, Chung Lam, Frank R. Libsch, Seiji Munetoh, Ramachandran Muralidhar, Vijay Narayanan, Dirk Pfeiffer, Devendra K. Sadana, Ghavam G. Shahidi, Robert L. Wisnieff
  • Patent number: 10380284
    Abstract: A method of forming an electrical device is provided that includes forming microprocessor devices on a microprocessor die; forming memory devices on an memory device die; forming component devices on a component die; and forming a plurality of packing devices on a packaging die. Transferring a plurality of each of said microprocessor devices, memory devices, component devices and packaging components to a supporting substrate, wherein the packaging components electrically interconnect the memory devices, component devices and microprocessor devices in individualized groups. Sectioning the supporting substrate to provide said individualized groups of memory devices, component devices and microprocessor devices that are interconnected by a packaging component.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: August 13, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Qianwen Chen, Li-Wen Hung, Wanki Kim, John U. Knickerbocker, Kenneth P. Rodbell, Robert L. Wisnieff
  • Publication number: 20180329206
    Abstract: Methods and systems for cleaning an optic include measuring a state of the optic. It is determined whether the optic needs to be cleaned based on the measured state of the optic. The optic is cleaned with ultrasonic vibrations if the optic needs to be cleaned.
    Type: Application
    Filed: November 8, 2017
    Publication date: November 15, 2018
    Inventors: Guy M. Cohen, Lior Horesh, Raya Horesh, Theodore G. van Kessel, Robert L. Wisnieff
  • Publication number: 20180329205
    Abstract: Methods and systems for cleaning an optic include measuring a state of the optic. It is determined whether the optic needs to be cleaned based on the measured state of the optic. The optic is cleaned with ultrasonic vibrations if the optic needs to be cleaned.
    Type: Application
    Filed: May 12, 2017
    Publication date: November 15, 2018
    Inventors: Guy M. Cohen, Lior Horesh, Raya Horesh, Theodore G. van Kessel, Robert L. Wisnieff
  • Patent number: 10043845
    Abstract: A structure includes a silicon substrate; silicon readout circuitry disposed on a first portion of a top surface of the substrate and a radiation detecting pixel disposed on a second portion of the top surface of the substrate. The pixel has a plurality of radiation detectors connected with the readout circuitry. The plurality of radiation detectors are composed of at least one visible wavelength radiation detector containing germanium and at least one infrared wavelength radiation detector containing a Group III-V semiconductor material. A method includes providing a silicon substrate; forming silicon readout circuitry on a first portion of a top surface of the substrate and forming a radiation detecting pixel, on a second portion of the top surface of the substrate, that has a plurality of radiation detectors formed to contain a visible wavelength detector composed of germanium and an infrared wavelength detector composed of a Group III-V semiconductor material.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: August 7, 2018
    Assignee: International Business Machines Corporation
    Inventors: Ning Li, Devendra K. Sadana, Robert L. Wisnieff
  • Publication number: 20180181774
    Abstract: A private key of a public-private key pair with a corresponding identity is written to an integrated circuit including a processor, a non-volatile memory, and a cryptographic engine coupled to the processor and the non-volatile memory. The private key is written to the non-volatile memory. The integrated circuit is implemented in complementary metal-oxide semiconductor 14 nm or smaller technology. The integrated circuit is permanently modified, subsequent to the writing, such that further writing to the non-volatile memory is disabled and such that the private key can be read only by the cryptographic engine and not off-chip. Corresponding integrated circuits and wafers are also disclosed.
    Type: Application
    Filed: December 22, 2016
    Publication date: June 28, 2018
    Inventors: Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Kohji Hosokawa, Charanjit Jutla, Wanki Kim, Chandrasekara Kothandaraman, Chung Lam, Frank R. Libsch, Seiji Munetoh, Ramachandran Muralidhar, Vijay Narayanan, Dirk Pfeiffer, Devendra K. Sadana, Ghavam G. Shahidi, Robert L. Wisnieff