Abstract: A reversible fuse structure in an integrated circuit is obtained through the implementation of a fuse cell having a short thin line of phase change materials in contact with via and line structures capable of passing current through the line of phase change material (fuse cell). The current is passed through the fuse cell in order to change the material from a less resistive material to a more resistive material through heating the phase change material in the crystalline state to the melting point then quickly quenching the material into the amorphous state. The reversible programming is achieved by passing a lower current through the fuse cell to convert the high resistivity amorphous material to a lower resistivity crystalline material. Appropriate sense-circuitry is integrated to read the information stored in the fuses, wherein said sense circuitry is used to enable or disable circuitry.

Abstract: A MOSFET structure and method of fabricating the structure incorporates a multi-layer sidewall spacer to suppress parasitic overlap capacitance between the gate conductor and the source/drain extensions without degrading drive current and, thereby, effecting overall MOSFET performance. The multi-layer sidewall spacer is formed with a gap layer having a dielectric constant equal to one and a permeable low-K (e.g., less than 3.5) dielectric layer. Alternatively, the multi-layer sidewall spacer is formed with a first L-shaped dielectric layer having a permittivity value of less than approximately three and a second dielectric layer. The multi-layer spacer may also have a third nitride or oxide spacer layer. This third spacer layer provides increased structural integrity.

Abstract: A MOSFET structure and method of fabricating the structure incorporates a multi-layer sidewall spacer to suppress parasitic overlap capacitance between the gate conductor and the source/drain extensions without degrading drive current and, thereby, effecting overall MOSFET performance. The multi-layer sidewall spacer is formed with a gap layer having a dielectric constant equal to one and a permeable low-K (e.g., less than 3.5) dielectric layer. Alternatively, the multi-layer sidewall spacer is formed with a first L-shaped dielectric layer having a permittivity value of less than approximately three and a second dielectric layer. The multi-layer spacer may also have a third nitride or oxide spacer layer. This third spacer layer provides increased structural integrity.

Abstract: The present invention is directed to a thin film transistor (and related multilayer structures) that includes: source and drain electrodes 14 and 15 disposed at a specified interval above an insulating substrate 11 and formed by printing-and-plating; an a-Si film 16 disposed for the source and drain electrodes 14 and 15; a gate insulating film 17 laminated on the a-Si film 16; and a gate electrode 18 laminated on the gate insulating film 17 and formed by printing-and-plating. The a-Si film 16 and the gate insulating film 17 have an offset region 20 that uniformly extends beyond the dimensions of the gate electrode 18.

Abstract: A method for fabricating a display device patterns a conductive layer on a display substrate and forms pixel electrodes on the display substrate. A plate is employed for carrying separately fabricated active devices to the display substrate. The separately fabricated devices are connected to the conductive layers and the pixel electrode.

Abstract: The process of derivatization and patterning of surfaces, and more particularly to the formation of self-assembled molecular monolayers on metal oxide surfaces using microcontact printing and the derivative articles produced thereby.

Abstract: The present invention is directed to a thin film transistor (and related multilayer structures) that includes: source and drain electrodes 14 and 15 disposed at a specified interval above an insulating substrate 11 and formed by printing-and-plating; an a-Si-film 16 disposed for the source and drain electrodes 14 and 15; a gate insulating film 17 laminated on the a-Si film 16; and a gate electrode 18 laminated on the gate insulating film 17 and formed by printing-and-plating. The a-Si film 16 and the gate insulating film 17 have an offset region 20 that uniformly extends beyond the dimensions of the gate electrode 18.

Abstract: A method for fabricating a display device patterns a conductive layer on a display substrate and forms pixel electrodes on the display substrate. A plate is employed for carrying separately fabricated active devices to the display substrate. The separately fabricated devices are connected to the conductive layers and the pixel electrode.

Abstract: A method for fabricating a display device patterns a conductive layer on a display substrate and forms pixel electrodes on the display substrate. A plate is employed for carrying separately fabricated active devices to the display substrate. The separately fabricated devices are connected to the conductive layers and the pixel electrode.

Abstract: A display device provides a first optical device disposed in a light path for spatially separating angularly separated light into color components, and a pixel which receives each of the color components through a sub-pixel. Each sub-pixel controls transmitted light intensity therethrough. A black matrix is formed in operative relationship with the sub-pixels including apertures for receiving the color components. A microstructured layer is disposed in the light path and receives or transmits the color components from or to the apertures of the black matrix. The microstructured layer includes tilted and/or curved surfaces for redirecting laterally shifted color components shifted by the first optical device and may also diffuse light.

Abstract: An active matrix display in accordance with the present invention includes a plurality of pixels arranged in an array. At least two transistors are included for coupling to each pixel, and the transistors are positioned within the array for switching the pixels on and off according to data and gate signals. A plurality of control lines are coupled to the transistors of each pixel such that the control lines provide multiplexing for at least one of data signal multiplexing and gate signal multiplexing.

Abstract: An active matrix display in accordance with the present invention includes a plurality of pixels arranged in an array. At least two transistors associated with each pixel are included. The transistors are serially connected to each other and disposed within the array for switching the pixels on and off according to data and gate signals. A data line is coupled to a first end of the serially connected transistors for each pixel. A second end of the serially connected transistors is coupled to a storage device. The serially connected transistors provide multiplexing capability for at least one of data signal multiplexing and gate signal multiplexing.

Abstract: A method for fabricating a display device patterns a conductive layer on a display substrate and forms pixel electrodes on the display substrate. A plate is employed for carrying separately fabricated active devices to the display substrate. The separately fabricated devices are connected to the conductive layers and the pixel electrode.

Abstract: A display device provides a first optical device disposed in a light path for spatially separating angularly separated light into color components, and a pixel which receives each of the color components through a sub-pixel. Each sub-pixel controls transmitted light intensity therethrough. A black matrix is formed in operative relationship with the sub-pixels including apertures for receiving the color components. A microstructured layer is disposed in the light path and receives or transmits the color components from or to the apertures of the black matrix. The microstructured layer includes tilted and/or curved surfaces for redirecting laterally shifted color components shifted by the first optical device and may also diffuse light.

Abstract: An active matrix display in accordance with the present invention includes a plurality of pixels arranged in an array. At least two transistors associated with each pixel are included. The transistors are serially connected to each other and disposed within the array for switching the pixels on and off according to data and gate signals. A data line is coupled to a first end of the serially connected transistors for each pixel. A second end of the serially connected transistors is coupled to a storage device. The serially connected transistors provide multiplexing capability for at least one of data signal multiplexing and gate signal multiplexing.

Abstract: A driving method for multiplexing pixels in active matrix displays in accordance with the present invention includes the steps of providing a plurality of pixels arranged in an array, wherein each pixel includes at least two transistors associated therewith, the transistors disposed in the array of pixels and each pixel including a plurality of control lines for controlling the transistors for turning each pixel on and off and sequencing waveforms on the control lines to provide multiplexing at the pixels in the array. A circuit for addressing pixels in a pixel array in accordance with the present invention includes at least two transistors associated with each pixel, the transistors disposed in the array of pixels. A plurality of control lines associated with each pixel for controlling the transistors of each pixel. At least one gate driver sequences waveforms on the control lines to provide multiplexing at the pixels in the array.

Abstract: A sense circuit for detecting charge on a TFT/LCD cell capacitor, which comprises a first, integrating circuit attached to the TFT/LCD cell capacitor through a data line, wherein the data line is connected to the cell capacitance through a thin film transistor is disclosed. The thin film transistor including a gate, a drain and a source, wherein the source is connected to the cell capacitor and the drain is connected to the data line. A first, gate supply voltage adapted to drive the gate of the thin film transistor. And a reset circuit adapted to reset the integrating circuit. This embodiment may further include a source for charging said cell capacitor prior to measuring the charge. Further, a method of testing a partially constructed electronic circuit, for example the cell of an LCD, prior to installation of the backplate is also disclosed. The partial circuit comprising an array of contact electrodes, for example cell pad electrodes and an array of address electrodes, for example gate electrodes.

Abstract: An apparatus for testing for and classifying defects in a TFT/LCD array having gate lines and data lines. Devices are provided for activating cells of the array by applying gate pulses to the gate lines and pulses to the data lines. Devices are also provided for acquiring waveforms from data lines of the array. Additional devices sample the waveforms at selected points in time. A computer may be used to classify the waveforms to indicate whether defects are present and if present, the nature of the defects by comparing voltages of the waveform at the selected points in time.

Abstract: A sense circuit for detecting charge on a TFT/LCD cell capacitor, which comprises a first, integrating circuit attached to the TFT/LCD cell capacitor through a data line, wherein the data line is connected to the cell capacitance through a thin film transistor. The thin film transistor including a gate, a drain and a source, wherein the source is connected to the cell capacitor and the drain is connected to the data line. A first, gate supply voltage adapted to drive the gate of the thin film transistor. And a reset circuit adapted to reset the integrating circuit. This embodiment may further include a source for charging said cell capacitor prior to measuring the charge. Further, a method of testing a partially constructed electronic circuit, for example the cell of an LCD, prior to installation of the backplate. The partial circuit comprising an array of contact electrodes, for example cell pad electrodes and an array of address electrodes, for example gate electrodes.