Patents by Inventor Robert N. Hasbun

Robert N. Hasbun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5448577
    Abstract: A method for utilizing a cyclical redundancy check value with an identification field stored in memory which is constantly changing between testing of the cyclical redundancy check value. In order to allow the use of a cyclical redundancy check value with a field which constantly varies as does the field in a flash EEPROM memory array, various portions of the field are masked to the cyclical redundancy check and additional reliability checks are utilized to assure that those portions which are masked remain reliable.
    Type: Grant
    Filed: October 30, 1992
    Date of Patent: September 5, 1995
    Assignee: Intel Corporation
    Inventors: Steven E. Wells, Robert N. Hasbun
  • Patent number: 5437020
    Abstract: A method of detecting the loss of a sector of data stored in a solid state memory disk is described. Detection is enabled by the creation of a header for each sector number during formatting. Each header includes a logical sector number equal to a sector number. Location and loss of a sector of data associated with a particular sector number is aided by a sector header translation table. The sector header translation table stores an offset, or pointer, for each sector number that points to its associated header. The method by which the sector header translation table is generated aids in the detection of lost sectors of data. Upon power-up, each offset in the sector header translation table is initialized to an initial, invalid value. Afterward, the nonvolatile semiconductor memory is scanned and the sector header translation table is modified so that for each sector number it points to the header including a logical sector number equal to the sector number.
    Type: Grant
    Filed: October 3, 1992
    Date of Patent: July 25, 1995
    Assignee: Intel Corporation
    Inventors: Steven Wells, Robert N. Hasbun, Richard P. Garner
  • Patent number: 5357475
    Abstract: A process for releasing sectors of a flash EEPROM memory array which includes a plurality of individually erasable blocks and stores sectors of data in such blocks with a header providing a logical sector number, an indication of validity of data stored, and an indication of whether data is stored with the header. The process includes the steps of finding the header of a sector with data to be released, setting the indication of validity of the data stored to indicate that the data is invalid, and writing a new header for the sector to a new position in the array without data and with an indication that data is not attached.
    Type: Grant
    Filed: October 30, 1992
    Date of Patent: October 18, 1994
    Assignee: Intel Corporation
    Inventors: Robert N. Hasbun, Steven E. Wells, Richard P. Garner