Abstract: The present invention provides a method of connecting integrated circuits and a corresponding assembly of integrated circuits.

Abstract: A method of connecting a first and second circuit device includes providing a first circuit device having a first main area and a second circuit device having a second and a third main area. A spacer device is disposed on one of the first and second circuit devices to ensure a predetermined spacing between the first and second circuit devices. An adhesive is applied to at least one of the first main area and the second main area and the first and second circuit devices are aligned and joined. The adhesive is then cured.

Abstract: A contact connection between a semiconductor chip and a substrate has a conductive adhesive extending between each contact of the chip and the substrate. The conductive adhesive includes a matrix component, a filler component, a hardener component and at least one decomposable component so that after curing at a curing temperature T1, the adhesive can be decomposed either by applying thermal energy at a temperature T2>T1 or by radiation so that the two contact surfaces can be separated smoothly. After separation the purposes of replacing a defective semiconductor chip, a second chip can be mechanically connected by applying the adhesive and curing it.

Abstract: Laser Programming of Integrated Circuits. The invention relates to the laser adjustment or laser programming of laser fuses of an integrated circuit on a chip, with laser light, the integrated circuit having a plurality of laser fuses and being connected to a plurality of contact pads on the chip, and the chip being covered with a polymer layer which has at least windows on the plurality of contact pads, and comprising at least one wiring interconnect on the polymer layer which is electrically connected to at least one of the plurality of contact pads and ends at a predetermined location on a surface of the chip.

Abstract: The present invention provides a method of producing semiconductor chips (1a, 1b, 1c; 1a′, 1b′, 1c′) with a protective chip-edge layer (21″, 22″), in particular for wafer level packaging chips, with the steps of: preparing a semiconductor wafer (1); providing trenches (21, 22) in the semiconductor wafer to establish chip edges on a first side of the semiconductor wafer (1); filling the trenches (21, 22) with a protective agent (21′; 22′); grinding back the semiconductor wafer (1) from a second side of the semiconductor wafer (1), which is opposite from the first side, to expose the trenches (21, 22) filled with the protective agent (21′; 22′); and cutting through the trenches (21, 22) filled with the protective agent (21′; 22′), so that the protective chip-edge layer (21″, 22″) comprising the protective agent (21′, 22′) remains on the chip edges.

Abstract: The invention creates a method for connection of circuit units (101a-10n) which are arranged on a wafer (100), in which the wafer (100) is fitted to a first film (102a), the wafer (100) is sawn such that the circuit units (101a-101n) which are arranged on the wafer (100) are separated, the functional circuit units (101d) are picked up by means of a handling device (101) and are placed down on a second film (102b) by means of the handling device (103), so as to produce a separation distance which can be predetermined between connection contacts of the circuit units (101d).

Abstract: An electronic component has a plurality of chips which are stacked one above the other and contact-connected to one another. To form this component, a first planar chip arrangement is provided with the functional chips spaced apart from one another in a grid and with a filling material in the spaces between the chips to form an insulating holding frame that fixes the chips, the frame has chip-dedicated contact-connecting elements that serve for the electrical contact-connection to another chip of another chip arrangement and each chip has dedicated electrically conductive strips. At least one additional planar chip arrangement is formed by the same method as the first planar chip arrangement and is then stacked on the first planar chip arrangement so that the two chip arrangements lie one above the other and the respective contact-connecting elements of the two chip arrangements are connected to one another for electrical chip-to-chip contact-connection.

Abstract: A process for producing a component module comprising a module carrier and a plurality of components with which contact is made on the latter, comprising the following steps:

Abstract: A process for producing a semiconductor chip having contact elements protruding on one chip side within the context of wafer level packaging, the chip side provided with the contact elements being coated with a covering compound forming a protective layer, from which the protruding contact element project.

Abstract: The invention relates to the laser adjustment or laser programming of laser fuses of an integrated circuit (2) on a chip (1), with laser light (7), the integrated circuit (2) having a plurality of laser fuses (3) and being connected to a plurality of contact pads (4) on the chip (1), and the chip (1) being covered with a polymer layer (5) which has at least windows (16) on the plurality of contact pads, and comprising at least one wiring interconnect (9) on the polymer layer (5) which is electrically connected to at least one of the plurality of contact pads (4) and ends at a predetermined location on a surface of the chip (1).