Abstract: A breaker includes a housing (10) having two terminals (11, 12), two bars (17, 18) electrically coupled to the terminals (11, 12), an arm (30) supported in the housing (10) and movable to engage with the bars (17, 18) to electrically couple the terminals (11, 12) together. A control device (4) may control the arm (30) to engage with the bars (17, 18), and includes a lever (50) to maintain the arm (30) in engagement with the bars (17, 18). A spring (33) may bias the arm (30) away from the bars (17, 18), and another spring (53) may be engaged with the lever (50) to bias and disengage the lever (50) from the arm (30).

Abstract: The present invention discloses an electronic device package and a method of the package. In particular, an electronic device package and a method of the package suitable for a bumpless electronic device package with enhanced electrical performance and heat-dissipation efficiency are disclosed. The method comprises: providing a substrate having a plurality of vias and a plurality of electronic devices; forming a gluing layer on a surface of the substrate and fixing the electronic devices on the gluing layer, wherein the electronic devices have I/O units aligned with the vias respectively; forming a plurality of fixing layers in the gaps between the electronic devices; trenching a plurality of openings aligned with the vias respectively in the fixing layer; forming a plurality of metallic conductive units in the vias, the openings and part of the surface of the substrate; and forming a passivation layer over the other surface of the substrate.

Abstract: A method for dynamic channel allocation for access points in wireless networks. Communication information of wireless devices is gathered. A network topology formed by the wireless devices is derived according to the communication information. Switch channel indexes for each wireless device are calculated according to the communication information and network topology. Desired wireless devices for switching channels are determined according to the switch channel indexes.

Abstract: Pretreatment method and apparatus to remove matrix ions from a liquid sample, prior to separation of the sample analytes (e.g. by chromatography), by flowing the liquid sample into a sample compartment and stopping the flow. The sample compartment has a wall comprising an ion exchange membrane having exchangeable ions of the same charge as the matrix ions to be removed. A regenerant liquid stream flows through a regenerant flow compartment on the other side of the membrane from said parked liquid sample. Matrix ions in the parked liquid sample are transported across the membrane into the regenerant flow compartment. Suppression may be performed electrolytically and/or chemically. A concentrator column may also be used.

Abstract: This invention relates to a packaging structure and method of an image sensor module. The method comprises: providing a transparent substrate having a first patterned conductive layer; carrying an image sensor integrated circuit chip having a photosensitive active area and at least one passive chip on the transparent substrate, wherein the photosensitive active area faces the transparent substrate; forming an insulating build-up film over the transparent substrate; and forming a plurality of conductive vias in the insulating build-up film wherein the ends of the conductive vias are connected with the passive chip or the first patterned conductive layer of the transparent substrate while the other ends of the conductive vias are exposed on the surface of the insulating build-up film. The packaging method is capable of down-sizing the construction of the image sensor module and simplifying the processing steps.

Abstract: Disclosed is an apparatus and method for producing a library of low-cost, low-power multipliers which are easy to build, have self testing capabilities, and are regular. The multipliers multiply a first word having N bits by a second word having M bits and include a plurality of smaller multipliers each including a single array of borrow parallel counters for receiving a trisected input and processing at least part of a trisected input according to a predetermined formula, an x:2 (where x=3, 2) counter which may be coupled with at least one borrow parallel counter to form a synthesized borrow parallel counter, and an adder coupled to an output of at least one of the borrow parallel counters, the adder for summing the output of the at least one borrow parallel adder. Each of the smaller multipliers receives a trisected input and an adder for receiving and summing the outputs of the smaller multipliers.

Abstract: This invention relates to a wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias.

Abstract: A screw machine (10) has a rotor housing (12) defining overlapping bores (12-1, 12-2). Female rotor (14) is located in bore (12-1) and male rotor (16) is located in bore (12-2). A wear resistant coating is deposited on the tips (14-1, 16-1) of the rotors. A conformable coating is deposited on the valleys (14-2, 16-2) of the rotors. A conformable coating is deposited on the surface of the bores coacting with the rotors.

Abstract: A screw machine (10) has a rotor housing (12) defining overlapping bores (12-1, 12-2). Female rotor (14) is located in bore (12-1) and male rotor (16) is located in bore (12-2). A wear resistant coating is deposited on the tips (14-1, 16-1) of the rotors. A conformable coating is deposited on the valleys (14-2, 16-2) of the rotors. A conformable coating is depsoited on the surface of the bores coacting with the rotors.

Abstract: The present invention discloses a handheld device using a sound receiver, such as a mobile phone to receive a sound in the surrounding within an appropriate range, and after the sound volume is amplified appropriately, a source playback device such as an earphone is used to play the amplified sound, so that a person having a hearing problem can just carry a handheld device to have the basic functions of the handheld device such as sending and receiving a short message and also use the sound amplification function thereof to supplement the deficiency of the hearing ability when talking to or communicating with others.

Abstract: A method for manufacturing a complementary metal-oxide semiconductor sensor is provided. The present method provides a semiconductor structure including a plurality of conductors thereon. An inter-metal dielectric layer is formed on the conductors. A silicon nitride film is applied on the inter-metal dielectric layer. An oxide layer is formed on the silicon nitride film. The oxide layer, the silicon nitride film and the inter-metal dielectric are etched to expose portions of the conductors. The oxide layer and the exposed conductors are cleaned in a cleaning step later.

Abstract: A dynamically or run-time reconfigurable matrix multiplier architecture with a reconfiguration mechanism for computing the product of matrices Xp×r and Yr×q for any integers p, q, r and any item precision b, i.e., bitwidth, ranging from 4 to 64 bits is described. The reconfigurable matrix multiplier uses borrow parallel counters with new circuits, 6—0, and 6—1 and the improved small multiplier library. The reconfigurable matrix multiplier architecture is based on a novel scheme of trading data bitwidth for processing array or matrix size. The matrix multiplier achieves an extra compact, low power, high speed design through the use of a borrow parallel counters and a library of small borrow parallel multiplier circuits.

Abstract: A detection apparatus for use in a touch pad, for detecting the coordinates indicated by a user on the touch pad and the behavior of the user on the touch pad. The touch pad includes an X-layer and a Y-layer, and the X- and Y-layers are planar resistors. The detection apparatus has a sleep mode and an operative mode. When the user touches the touch pad, the X- and Y-layers are electrically coupled at a touch point. The detection apparatus includes a central processor, a coordinate detecting unit, an analog-to-digital converting unit, and a wake-up unit. The coordinate detecting unit is used to determine and output an X-coordinate voltage and a Y-coordinate voltage, wherein the X- and Y-coordinate voltages correspond to the touch point. The analog-to-digital converting unit is used to convert the X- and Y-coordinate voltages into an X-coordinate and a Y-coordinate, and to output the X- and Y-coordinate.