Patents by Inventor Rui CHENG
Rui CHENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240248342Abstract: The present application embodiment discloses a display panel and a display device. The display panel includes a first mode and a second mode. The viewing angle of the display panel in the first mode is smaller than the viewing angle of the display panel in the second mode; the dimming liquid crystal cell is overlapped with the viewing angle adjustment liquid crystal cell; in the second mode, the dimming liquid crystal cell is used to scatter the incoming light; the panel body is arranged on a light-emitting side of the viewing angle adjustment liquid crystal cell and the dimming liquid crystal cell.Type: ApplicationFiled: December 15, 2021Publication date: July 25, 2024Inventors: Wenlong YE, Wei CHENG, Rui HE
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Publication number: 20240240416Abstract: A socket assembled arch rib and an arch bridge including at least one first monomer, the first monomer includes an inner and outer tube snapped outside the inner tube, a first end of the inner tube protrudes from a first end of the outer tube to form a convex part, a second end is located in the outer tube, the outer tube is filled with concrete, and concrete forms a concave part at a second end of the outer tube for socketing the convex part of the other first monomer; for unfilled concrete area inside the CFST structure arch rib, a double-layer CFST monomer with convex and concave parts formed respectively at the end, and the adjacent monomers are connected with each other through the socket-fit of the convex and concave parts, which is convenient for the sub-monomers to fill the concrete in the steel tube, ensuring dense concrete filling.Type: ApplicationFiled: March 16, 2022Publication date: July 18, 2024Applicant: SHANDONG UNIVERSITYInventors: Zeying YANG, Li TIAN, Youzhi WANG, Yinglin SUN, Zhilin QU, Rongrong DUAN, Chenghe WANG, Weisong QU, Qianyi YANG, Jianbo QU, Zhengquan CHENG, Chuanlong BI, Rui SUN, Jie LIU, Guangtong ZHOU
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Publication number: 20240243818Abstract: A fast calibration test system and method for a phased-array antenna, which belongs to the technical field of antenna measurement, relates to a near-field test system, and relates in particular to the fast calibration and a directional diagram test on a phased-array antenna.Type: ApplicationFiled: November 11, 2021Publication date: July 18, 2024Applicant: BEIJING INSTITUTE OF SPACE LONG MARCH VEHICLEInventors: Bo SHEN, Lei LI, Linka TANG, Xiaofei WANG, Weiyang SONG, Jian TU, Suixue WANG, Chao DONG, Rui MA, Guodong LIU, Chao YANG, Feng SU, Yongsheng CHENG, Qiang ZHANG, Xiaoning HUO, Yichang GAO, Wenwen SI, Longwei HE, Weiwei GUAN, Ji LI
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Publication number: 20240229240Abstract: Exemplary temperature modulation methods may include delivering a gas through a purge line extending within a substrate support. The gas may be directed to a backside surface of the substrate support opposite a substrate support surface. The purge line may extend along a central axis of a shaft, the shaft being hermetically sealed with the substrate support. The substrate support may be characterized by a center and a circumferential edge. A first end of the purge line may be fixed at a first distance from the backside surface of the substrate support. The methods may include flowing the gas at a first flow rate via a flow pathway to remove heat from the substrate support to achieve a desired substrate support temperature profile.Type: ApplicationFiled: March 25, 2024Publication date: July 11, 2024Applicant: Applied Materials, Inc.Inventors: Zubin Huang, Rui Cheng, Jian Li
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Patent number: 12033848Abstract: Embodiments of the present disclosure generally relate to processes for forming silicon- and boron-containing films for use in, e.g., spacer-defined patterning applications. In an embodiment, a spacer-defined patterning process is provided. The process includes disposing a substrate in a processing volume of a processing chamber, the substrate having patterned features formed thereon, and flowing a first process gas into the processing volume, the first process gas comprising a silicon-containing species, the silicon-containing species having a higher molecular weight than SiH4. The process further includes flowing a second process gas into the processing volume, the second process gas comprising a boron-containing species, and depositing, under deposition conditions, a conformal film on the patterned features, the conformal film comprising silicon and boron.Type: GrantFiled: June 18, 2021Date of Patent: July 9, 2024Assignee: Applied Materials, Inc.Inventors: Aykut Aydin, Rui Cheng, Karthik Janakiraman, Abhijit B. Mallick, Takehito Koshizawa, Bo Qi
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Publication number: 20240220523Abstract: Disclosed are a semantic matching and retrieval method and apparatus. The semantic matching and retrieval method includes steps of obtaining both the vector representation of a query text and the vector representation of a document text; obtaining the final vector representation of the query text; obtaining the final vector representation of the document text; calculating, based on the final vector representation of the query text and the final vector representation of the document text, the similarity score between the query text and the document text; and selecting, based on the similarity scores between the query text and a plurality of document texts, a document text matching the query text from the plurality of document texts.Type: ApplicationFiled: December 20, 2023Publication date: July 4, 2024Applicant: Ricoh Company, Ltd.Inventors: Rui CHENG, Bin DONG, Shanshan JIANG, Lu LUO, Lei DING
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Patent number: 11981998Abstract: Exemplary temperature modulation methods may include delivering a gas through a purge line extending within a substrate support. The gas may be directed to a backside surface of the substrate support opposite a substrate support surface. The purge line may extend along a central axis of a shaft, the shaft being hermetically sealed with the substrate support. The substrate support may be characterized by a center and a circumferential edge. A first end of the purge line may be fixed at a first distance from the backside surface of the substrate support. The methods may include flowing the gas at a first flow rate via a flow pathway to remove heat from the substrate support to achieve a desired substrate support temperature profile.Type: GrantFiled: October 30, 2020Date of Patent: May 14, 2024Assignee: Applied Materials, Inc.Inventors: Zubin Huang, Rui Cheng, Jian Li
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Patent number: 11961739Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.Type: GrantFiled: October 5, 2020Date of Patent: April 16, 2024Assignee: Applied Materials, Inc.Inventors: Yi Yang, Krishna Nittala, Rui Cheng, Karthik Janakiraman, Diwakar Kedlaya, Zubin Huang, Aykut Aydin
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Patent number: 11939675Abstract: In one aspect, an apparatus includes a chamber body, a blocker plate for delivering process gases into a gas mixing volume, and a face plate having holes through which the mixed gas is distributed to a substrate. In another aspect, the face plate may include a first region with a recess relative to a second region. In another aspect, the blocker plate may include a plurality of regions, each region having different hole patterns/geometries and/or flow profiles. In another aspect, the apparatus may include a radiation shield disposed below a bottom of the substrate support. A shaft or stem of the substrate support includes holes at an upper end thereof near the substrate support.Type: GrantFiled: August 10, 2018Date of Patent: March 26, 2024Assignee: Applied Materials, Inc.Inventors: Rui Cheng, Karthik Janakiraman, Zubin Huang
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Publication number: 20240035195Abstract: Embodiments of the present disclosure generally relate to methods, systems, and apparatus for forming layers having single crystalline structures. In one implementation, a method of processing substrates includes positioning a substrate in a processing volume of a chamber, and heating the substrate to a substrate temperature that is 800 degrees Celsius or less. The method includes maintaining the processing volume at a pressure within a range of 1.0 Torr to 8.0 Torr, and flowing one or more silicon-containing gases and one or more diluent gases into the processing volume. The method includes reacting the one or more silicon-containing gases to form one or more reactants, and depositing the one or more reactants onto an exposed surface of the substrate to form one or more silicon-containing layers on the exposed surface. The one or more silicon-containing layers each having a single crystalline structure.Type: ApplicationFiled: July 25, 2023Publication date: February 1, 2024Inventors: Qinghua ZHAO, Rui CHENG, Dimitrios PAVLOPOULOS, Karthik JANAKIRAMAN
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Patent number: 11848232Abstract: Embodiments of the present disclosure relate to processes for filling trenches. The process includes depositing a first amorphous silicon layer on a surface of a layer and a second amorphous silicon layer in a portion of a trench formed in the layer, and portions of side walls of the trench are exposed. The first amorphous silicon layer is removed. The process further includes depositing a third amorphous silicon layer on the surface of the layer and a fourth amorphous silicon layer on the second amorphous silicon layer. The third amorphous silicon layer is removed. The deposition/removal cyclic processes may be repeated until the trench is filled with amorphous silicon layers. The amorphous silicon layers form a seamless amorphous silicon gap fill in the trench since the amorphous silicon layers are formed from bottom up.Type: GrantFiled: June 13, 2022Date of Patent: December 19, 2023Assignee: Applied Materials, Inc.Inventors: Xin Liu, Fei Wang, Rui Cheng, Abhijit Basu Mallick, Robert Jan Visser
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Patent number: 11830706Abstract: Embodiments of the present disclosure generally relate to a pedestal for increasing temperature uniformity in a substrate supported thereon. The pedestal comprises a body having a heater embedded therein. The body comprises a patterned surface that includes a first region having a first plurality of posts extending from a base surface of the body at a first height, and a second region surrounding the central region having a second plurality of posts extending from the base surface at a second height that is greater than the first height, wherein an upper surface of each of the first plurality of posts and the second plurality of posts are substantially coplanar and define a substrate receiving surface.Type: GrantFiled: December 4, 2019Date of Patent: November 28, 2023Assignee: Applied Materials, Inc.Inventors: Venkata Sharat Chandra Parimi, Zubin Huang, Jian Li, Satish Radhakrishnan, Rui Cheng, Diwakar N. Kedlaya, Juan Carlos Rocha-Alvarez, Umesh M. Kelkar, Karthik Janakiraman, Sarah Michelle Bobek, Prashant Kumar Kulshreshtha, Vinay K. Prabhakar, Byung Seok Kwon
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Publication number: 20230360924Abstract: Exemplary methods of semiconductor processing may include providing a carbon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The substrate may define one or more features along the substrate. The methods may include forming a plasma of the carbon-containing precursor within the processing region. The methods may include depositing a carbon-containing material on the substrate. The carbon-containing material may extend within the one or more features along the substrate. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include treating the carbon-containing material with plasma effluents of the hydrogen-containing precursor. The plasma effluents of the hydrogen-containing precursor may cause a portion of the carbon-containing material to be removed from the substrate.Type: ApplicationFiled: May 5, 2022Publication date: November 9, 2023Applicant: Applied Materials, Inc.Inventors: Supriya Ghosh, Susmit Singha Roy, Abhijit Basu Mallick, Shuchi Sunil Ojha, Praket Prakash Jha, Rui Cheng
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Publication number: 20230340661Abstract: Methods for forming a metal carbide liner in features formed in a substrate surface are described. Each of the features extends a distance into the substrate from the substrate surface and have a bottom and at least one sidewall. The methods include depositing a metal carbide liner in the feature of the substrate surface with a plurality of high-frequency ratio-frequency (HFRF) pulses. Semiconductor devices with the metal carbide liner and methods for filling gaps using the metal carbide liner are also described.Type: ApplicationFiled: June 29, 2023Publication date: October 26, 2023Applicant: Applied Materials, IncInventors: Rui Cheng, Guoqing Li, Qinghua Zhao
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Publication number: 20230309300Abstract: Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. Alternating layers of material may be formed on the substrate. One or more recesses may be formed in the alternating layers of material. The methods may include forming a first silicon-containing material. The first silicon-containing material may extend into the one or more recesses formed in the alternating layers of material. The methods may include providing a halogen-containing precursor to the processing region of the semiconductor processing chamber. The methods may include forming a silicon-and-halogen-containing material. The silicon-and-halogen-containing material may overly the first silicon-containing material. The methods may include forming a second silicon-containing material.Type: ApplicationFiled: March 25, 2022Publication date: September 28, 2023Applicant: Applied Materials, Inc.Inventors: Dimitrios Pavlopoulos, Rui Cheng, Qinghua Zhao, Karthik Janakiraman
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Publication number: 20230303724Abstract: The present disclosure provides a heteropoly oligosaccharide and an application thereof in improving plant disease resistance. The heteropoly oligosaccharide includes seven D-glucose residues and one D-galactose residue.Type: ApplicationFiled: April 7, 2023Publication date: September 28, 2023Inventors: Jianfa ZHANG, Renjie FU, Jing LI, Rui CHENG
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Patent number: 11769666Abstract: Methods for selective silicon film deposition on a substrate comprising a first surface and a second surface are described. More specifically, the process of depositing a film, treating the film to change some film property and selectively etching the film from various surfaces of the substrate are described. The deposition, treatment and etching can be repeated to selectively deposit a film on one of the two substrate surfaces.Type: GrantFiled: July 19, 2021Date of Patent: September 26, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Rui Cheng, Fei Wang, Abhijit Basu Mallick, Robert Jan Visser
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Publication number: 20230298892Abstract: Exemplary methods of semiconductor processing may include forming a layer of amorphous silicon on a semiconductor substrate. The layer of amorphous silicon may be characterized by a first amount of hydrogen incorporation. The methods may include performing a beamline ion implantation process or plasma doping process on the layer of amorphous silicon. The methods may include removing hydrogen from the layer of amorphous silicon to a second amount of hydrogen incorporation less than the first amount of hydrogen incorporation.Type: ApplicationFiled: July 21, 2021Publication date: September 21, 2023Applicant: Applied Materials, Inc.Inventors: Rui Cheng, Rajesh Prasad, Karthik Janakiraman, Gautam K. Hemani, Krishna Nittala, Shan Tang, Qi Gao
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Patent number: 11705335Abstract: Methods of doping a semiconductor material are disclosed. Some embodiments provide for conformal doping of three dimensional structures. Some embodiments provide for doping with high concentrations of boron for p-type doping.Type: GrantFiled: April 20, 2022Date of Patent: July 18, 2023Assignee: Applied Materials, Inc.Inventors: Srinivas Gandikota, Abhijit Basu Mallick, Swaminathan Srinivasan, Rui Cheng, Susmit Singha Roy, Gaurav Thareja, Mukund Srinivasan, Sanjay Natarajan
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Patent number: 11676813Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include delivering a dopant-containing precursor with the silicon-containing precursor and the boron-containing precursor. The dopant-containing precursor may include one or more of carbon, nitrogen, oxygen, or sulfur. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber. The silicon-and-boron material may include greater than or about 1 at. % of a dopant from the dopant-containing precursor.Type: GrantFiled: September 18, 2020Date of Patent: June 13, 2023Assignee: Applied Materials, Inc.Inventors: Aykut Aydin, Rui Cheng, Yi Yang, Krishna Nittala, Karthik Janakiraman, Bo Qi, Abhijit Basu Mallick