Patents by Inventor Rui CHENG
Rui CHENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11705335Abstract: Methods of doping a semiconductor material are disclosed. Some embodiments provide for conformal doping of three dimensional structures. Some embodiments provide for doping with high concentrations of boron for p-type doping.Type: GrantFiled: April 20, 2022Date of Patent: July 18, 2023Assignee: Applied Materials, Inc.Inventors: Srinivas Gandikota, Abhijit Basu Mallick, Swaminathan Srinivasan, Rui Cheng, Susmit Singha Roy, Gaurav Thareja, Mukund Srinivasan, Sanjay Natarajan
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Patent number: 11676813Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include delivering a dopant-containing precursor with the silicon-containing precursor and the boron-containing precursor. The dopant-containing precursor may include one or more of carbon, nitrogen, oxygen, or sulfur. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber. The silicon-and-boron material may include greater than or about 1 at. % of a dopant from the dopant-containing precursor.Type: GrantFiled: September 18, 2020Date of Patent: June 13, 2023Assignee: Applied Materials, Inc.Inventors: Aykut Aydin, Rui Cheng, Yi Yang, Krishna Nittala, Karthik Janakiraman, Bo Qi, Abhijit Basu Mallick
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Publication number: 20230178419Abstract: Generally, examples described herein relate to methods and processing systems for forming isolation structures (e.g., shallow trench isolations (STIs)) between fins on a substrate. In an example, fins are formed on a substrate. A liner layer is conformally formed on and between the fins. Forming the liner layer includes conformally depositing a pre-liner layer on and between the fins, and densifying, using a plasma treatment, the pre-liner layer to form the liner layer. A dielectric material is formed on the liner layer.Type: ApplicationFiled: January 31, 2023Publication date: June 8, 2023Applicant: Applied Materials, Inc.Inventors: Benjamin COLOMBEAU, Theresa Kramer GUARINI, Malcolm BEVAN, Rui CHENG
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Publication number: 20230146981Abstract: Exemplary methods of semiconductor processing may include flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region, and the substrate may be maintained at a temperature below or about 450° C. The methods may include striking a plasma of the silicon-containing precursor. The methods may include forming a layer of amorphous silicon on a semiconductor substrate. The layer of amorphous silicon as-deposited may be characterized by less than or about 3% hydrogen incorporation.Type: ApplicationFiled: January 5, 2023Publication date: May 11, 2023Applicant: Applied Materials, Inc.Inventors: Rui Cheng, Diwakar Kedlaya, Karthik Janakiraman, Gautam K. Hemani, Krishna Nittala, Alicia J. Lustgraaf, Zubin Huang, Brett Spaulding, Shashank Sharma, Kelvin Chan
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Patent number: 11640905Abstract: Exemplary deposition methods may include flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber. The method may include striking a plasma in the processing region between a faceplate and a pedestal of the semiconductor processing chamber. The pedestal may support a substrate including a patterned photoresist. The method may include maintaining a temperature of the substrate less than or about 200° C. The method may also include depositing a silicon-containing film along the patterned photoresist.Type: GrantFiled: December 17, 2020Date of Patent: May 2, 2023Assignee: Applied Materials, Inc.Inventors: Aykut Aydin, Rui Cheng, Karthik Janakiraman
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Publication number: 20230118964Abstract: A target concentration profile for a film to be deposited on a surface of a substrate during a deposition process for the substrate at a process chamber of a manufacturing system is identified. Data of the target concentration profile is processed using a model. The model outputs a set of deposition process settings that corresponds to the target concentration profile. One or more operations of the deposition process are performed in accordance with the set of deposition process settings.Type: ApplicationFiled: December 19, 2022Publication date: April 20, 2023Inventors: Anton V. Baryshnikov, Aykut Aydin, Zubin Huang, Rui Cheng, Yi Yang, Diwakar Kedlaya, Venkatanarayana Shankaramurthy, Krishna Nittala, Karthik Janakiraman
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Patent number: 11621400Abstract: The present disclosure provides a transparent substrate, a flexible display substrate and its manufacturing method, and a display device. The transparent substrate serves as a support substrate for manufacturing the flexible display substrate. The transparent substrate is provided with a first surface for supporting the flexible display substrate, and a protrusion made of a transparent material is formed on the first surface. According to the present disclosure, it is able to adjust a shape of a flexible base substrate of the flexible display substrate through the protrusion.Type: GrantFiled: March 25, 2021Date of Patent: April 4, 2023Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Rui Cheng, Yuehua Cui
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Publication number: 20230093450Abstract: The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a first mandrel layer on a material layer disposed on a substrate. A first spacer layer is conformally formed on sidewalls of the first mandrel layer, wherein the first spacer layer comprises a doped silicon material. The first mandrel layer is selectively removed while keeping the first spacer layer. A second spacer layer is conformally formed on sidewalls of the first spacer layer and selectively removing the first spacer layer while keeping the second spacer layer.Type: ApplicationFiled: November 30, 2022Publication date: March 23, 2023Inventors: Tzu-shun YANG, Rui CHENG, Karthik JANAKIRAMAN, Zubin HUANG, Diwakar KEDLAYA, Meenakshi GUPTA, Srinivas GUGGILLA, Yung-chen LIN, Hidetaka OSHIO, Chao LI, Gene LEE
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Publication number: 20230073746Abstract: A method and an apparatus for machine reading comprehension, and a non-transitory computer-readable recording medium are provided. In the method, a paragraph-question pair is obtained, and subword vectors corresponding to subwords in the paragraph-question pair are generated. Then, for each subword, relative positions of the subword with respect to the other subwords are determined based on distances, and self-attention information of the subword in a first part and mutual attention information of the subword in a second part are calculated by using the relative positions and the subword vector. Then, a fusion vector of the subword is generated based on the self-attention information and the mutual attention information. Then, the fusion vectors of the subwords are input to a decoder of a machine reading comprehension model so as to obtain an answer predicted by the decoder.Type: ApplicationFiled: August 22, 2022Publication date: March 9, 2023Applicant: Ricoh Company, Ltd.Inventors: Tianxiong XIAO, Rui CHENG, Bin DONG, Shanshan JIANG, Jiashi ZHANG
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Patent number: 11594415Abstract: Methods of forming a tungsten film comprising forming a boron seed layer on an oxide surface, an optional tungsten initiation layer on the boron seed layer and a tungsten containing film on the boron seed layer or tungsten initiation layer are described. Film stack comprising a boron seed layer on an oxide surface with an optional tungsten initiation layer and a tungsten containing film are also described.Type: GrantFiled: November 11, 2019Date of Patent: February 28, 2023Assignee: Applied Materials, Inc.Inventors: Susmit Singha Roy, Pramit Manna, Rui Cheng, Abhijit Basu Mallick
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Publication number: 20230050255Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-containing material on the substrate. The silicon-containing material may extend within the one or more recessed features along the substrate and a seam or void may be defined by the silicon-containing material within at least one of the one or more recessed features along the substrate. The methods may also include treating the silicon-containing material with a hydrogen-containing gas, such as plasma effluents of the hydrogen-containing gas, which may cause a size of the seam or void to be reduced.Type: ApplicationFiled: August 13, 2021Publication date: February 16, 2023Applicant: Applied Materials, Inc.Inventors: Qinghua Zhao, Rui Cheng, Ruiyun Huang, Dong Hyung Lee, Aykut Aydin, Karthik Janakiraman
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Publication number: 20230051200Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. The methods may include depositing a silicon-containing layer on surfaces defining the processing region of the semiconductor processing chamber. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-containing material on a substrate disposed within the processing region of the semiconductor processing chamber.Type: ApplicationFiled: August 11, 2021Publication date: February 16, 2023Applicant: Applied Materials, Inc.Inventors: Qinghua Zhao, Rui Cheng, Karthik Janakiraman
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Publication number: 20230023764Abstract: Methods and apparatus for surface profiling and texturing of chamber components for use in a process chamber, such surface-profiled or textured chamber components, and method of use of same are provided herein. In some embodiments, a method includes measuring a parameter of a reference substrate or a heated pedestal using one or more sensors and modifying a surface of a chamber component physically based on the measured parameter.Type: ApplicationFiled: December 15, 2020Publication date: January 26, 2023Inventors: David W. GROECHEL, Michael R. RICE, Gang Grant PENG, Rui CHENG, Zubin HUANG, Han WANG, Karthik JANAKIRAMAN, Diwakar KEDLAYA, Paul L. BRILLHART, Abdul Aziz KHAJA
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Patent number: 11562902Abstract: Exemplary methods of semiconductor processing may include flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region, and the substrate may be maintained at a temperature below or about 450° C. The methods may include striking a plasma of the silicon-containing precursor. The methods may include forming a layer of amorphous silicon on a semiconductor substrate. The layer of amorphous silicon may be characterized by less than or about 3% hydrogen incorporation.Type: GrantFiled: July 19, 2020Date of Patent: January 24, 2023Assignee: Applied Materials, Inc.Inventors: Rui Cheng, Diwakar Kedlaya, Karthik Janakiraman, Gautam K. Hemani, Krishna Nittala, Alicia J. Lustgraaf, Zubin Huang, Brett Spaulding, Shashank Sharma, Kelvin Chan
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Publication number: 20220406594Abstract: Embodiments of the present disclosure generally relate to processes for forming silicon- and boron-containing films for use in, e.g., spacer-defined patterning applications. In an embodiment, a spacer-defined patterning process is provided. The process includes disposing a substrate in a processing volume of a processing chamber, the substrate having patterned features formed thereon, and flowing a first process gas into the processing volume, the first process gas comprising a silicon-containing species, the silicon-containing species having a higher molecular weight than SiH4. The process further includes flowing a second process gas into the processing volume, the second process gas comprising a boron-containing species, and depositing, under deposition conditions, a conformal film on the patterned features, the conformal film comprising silicon and boron.Type: ApplicationFiled: June 18, 2021Publication date: December 22, 2022Inventors: Aykut AYDIN, Rui CHENG, Karthik JANAKIRAMAN, Abhijit B. MALLICK, Takehito KOSHIZAWA, Bo QI
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Patent number: 11532525Abstract: Methods and systems for controlling concentration profiles of deposited films using machine learning are provided. Data associated with a target concentration profile for a film to be deposited on a surface of a substrate during a deposition process for the substrate is provided as input to a trained machine learning model. One or more outputs of the trained machine learning model are obtained. Process recipe data identifying one or more sets of deposition process settings is determined from the one or more outputs. For each set of deposition process setting, an indication of a level of confidence that a respective set of deposition process settings corresponds to the target concentration profile for the film to be deposited on the substrate is also determined.Type: GrantFiled: March 3, 2021Date of Patent: December 20, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Anton V Baryshnikov, Aykut Aydin, Zubin Huang, Rui Cheng, Yi Yang, Diwakar Kedlaya, Venkatanarayana Shankaramurthy, Krishna Nittala, Karthik Janakiraman
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Patent number: 11527408Abstract: The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a first mandrel layer on a material layer disposed on a substrate. A first spacer layer is conformally formed on sidewalls of the first mandrel layer, wherein the first spacer layer comprises a doped silicon material. The first mandrel layer is selectively removed while keeping the first spacer layer. A second spacer layer is conformally formed on sidewalls of the first spacer layer and selectively removing the first spacer layer while keeping the second spacer layer.Type: GrantFiled: May 5, 2020Date of Patent: December 13, 2022Assignee: Applied Materials, Inc.Inventors: Tzu-shun Yang, Rui Cheng, Karthik Janakiraman, Zubin Huang, Diwakar Kedlaya, Meenakshi Gupta, Srinivas Guggilla, Yung-chen Lin, Hidetaka Oshio, Chao Li, Gene Lee
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Publication number: 20220393085Abstract: The present disclosure provides a display panel, a manufacturing method thereof and a display device. The display panel includes: a base substrate including a display region, a wiring region surrounding the display region and a bonding region located at a side of the display region; a light-emitting element arranged in the display region and including a cathode; and a first line and at least one second line in the wiring region, the first line being coupled to the cathode of the light-emitting element, two ends of the second line being coupled to the first line in the bonding region, and the first line and the second line being coupled through at least two via holes at an opposite side of the bonding region.Type: ApplicationFiled: June 10, 2021Publication date: December 8, 2022Inventors: Rui CHENG, Yunpeng ZHANG, Lele SUN
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Patent number: 11515170Abstract: Methods of etching film stacks to form gaps of uniform width are described. A film stack is etched through a hardmask. A conformal liner is deposited in the gap. The bottom of the liner is removed. The film stack is selectively etched relative to the liner. The liner is removed. The method may be repeated to a predetermined depth.Type: GrantFiled: December 30, 2020Date of Patent: November 29, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Shishi Jiang, Pramit Manna, Bo Qi, Abhijit Basu Mallick, Rui Cheng, Tomohiko Kitajima, Harry S. Whitesell, Huiyuan Wang
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Patent number: 11488856Abstract: Methods for seam-less gapfill comprising sequentially depositing a film with a seam, reducing the height of the film to remove the seam and repeating until a seam-less film is formed. Some embodiments include optional film doping and film treatment (e.g., ion implantation and annealing).Type: GrantFiled: October 13, 2020Date of Patent: November 1, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Pramit Manna, Ludovic Godet, Rui Cheng, Erica Chen, Ziqing Duan, Abhijit Basu Mallick, Srinivas Gandikota