Patents by Inventor Ryo Hayashi

Ryo Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110065216
    Abstract: A method for manufacturing a semiconductor device or apparatus having at least a semiconductor as a component, characterized by including irradiating the semiconductor with light having a longer wavelength than the absorption edge wavelength of the semiconductor to change the threshold voltage of the semiconductor device or apparatus, and checking the threshold voltage of the semiconductor device or apparatus, after or during irradiation with the light, to determine whether the threshold voltage is in a predetermined range, during manufacturing the semiconductor device or apparatus.
    Type: Application
    Filed: May 7, 2009
    Publication date: March 17, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Kaji, Masato Ofuji, Yasuyoshi Takai, Takehiko Kawasaki, Norio Kaneko, Ryo Hayashi
  • Publication number: 20110065269
    Abstract: In an electron device in which plural thin film transistors each having at least a source electrode, a drain electrode, a semiconductor region including a channel, a gate insulation film and a gate electrode are provided on a substrate, a device separation region provided between the plural thin film transistors and the semiconductor region are constituted by a same metal oxide layer, and resistance of the semiconductor region is formed to be lower than resistance of the device separation region.
    Type: Application
    Filed: November 18, 2010
    Publication date: March 17, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Ryo Hayashi, Masafumi Sano
  • Publication number: 20110062441
    Abstract: Provided is a semiconductor device including a semiconductor element including at least a semiconductor as a component characterized by including: a mechanism for irradiating the semiconductor with light having a wavelength longer than an absorption edge wavelength of the semiconductor; and a dimming mechanism, provided in a part of an optical path through which the light passes, for adjusting at least one factor selected from an intensity, irradiation time and the wavelength of the light, wherein a threshold voltage of the semiconductor element is varied by the light adjusted by the dimming mechanism.
    Type: Application
    Filed: May 11, 2009
    Publication date: March 17, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hisato Yabuta, Masato Ofuji, Yasuyoshi Takai, Takehiko Kawasaki, Norio Kaneko, Ryo Hayashi
  • Publication number: 20110049509
    Abstract: Provided is a thin film transistor including: a first gate electrode; a first gate insulating layer covering the first gate electrode; a semiconductor layer on the first gate insulating layer; a second gate insulating layer on the semiconductor layer; a second gate electrode on the second gate insulating layer; and a drain electrode and a source electrode electrically connected to the semiconductor layer, in which: the semiconductor layer is an amorphous oxide semiconductor containing at least one of Zn, Ga, In, and Sn; the first gate electrode shields light entering the semiconductor layer from below, and the second gate electrode shields light entering the semiconductor layer from above; and the second gate electrode is electrically connected to the first gate electrode by penetrating the first gate insulating layer and the second gate insulating layer, to thereby shield light entering the semiconductor layer from at least one of sides thereof.
    Type: Application
    Filed: August 18, 2010
    Publication date: March 3, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Kenji Takahashi, Ryo Hayashi, Seiichiro Yaginuma
  • Publication number: 20110042670
    Abstract: Provided are a coplanar structure thin film transistor that allows a threshold voltage to change only a little under electric stress, and a method of manufacturing the same. The thin film transistor includes on a substrate at least: a gate electrode; a gate insulating layer; an oxide semiconductor layer including a source electrode, a drain electrode, and a channel region; a channel protection layer; and an interlayer insulating layer. The channel protection layer includes one or more layers, the layer in contact with the oxide semiconductor layer among the one or more layers being made of an insulating material containing oxygen, ends of the channel protection layer are thinner than a central part of the channel protection layer, the interlayer insulating layer contains hydrogen, and regions of the oxide semiconductor layer that are in direct contact with the interlayer insulating layer form the source electrode and the drain electrode.
    Type: Application
    Filed: April 28, 2009
    Publication date: February 24, 2011
    Applicant: Canon Kabushiki Kaisha
    Inventors: Ayumu Sato, Ryo Hayashi, Hisato Yabuta, Masafumi Sano
  • Publication number: 20110001747
    Abstract: In order to suppress an influence of an electrical stress on a TFT characteristic in use of a TFT, a light emitting display apparatus according to the present invention comprises organic EL devices and driving circuits for driving the organic EL devices. The driving circuit includes plural pixels each having a thin film transistor of which a threshold voltage reversibly changes due to the electrical stress applied between a gate terminal and a source terminal, and a voltage applying unit which sets gate potential of the thin film transistor higher than source potential. The voltage applying unit applies the electrical stress between the gate terminal and the source terminal at a time when the thin film transistor is not driven, so as to drive the thin film transistor in a region that the threshold voltage is saturated to the electrical stress.
    Type: Application
    Filed: July 29, 2008
    Publication date: January 6, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hisae Shimizu, Katsumi Abe, Ryo Hayashi
  • Patent number: 7855379
    Abstract: In an electron device in which plural thin film transistors each having at least a source electrode, a drain electrode, a semiconductor region including a channel, a gate insulation film and a gate electrode are provided on a substrate, a device separation region provided between the plural thin film transistors and the semiconductor region are constituted by a same metal oxide layer, and resistance of the semiconductor region is formed to be lower than resistance of the device separation region.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: December 21, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryo Hayashi, Masafumi Sano
  • Publication number: 20100283049
    Abstract: Provided is an oxide semiconductor device including an oxide semiconductor layer and an insulating layer coming into contact with the oxide semiconductor layer in which the insulating layer includes: a first insulating layer coming into contact with an oxide semiconductor, having a thickness of 50 nm or more, and including an oxide containing Si and O; a second insulating layer coming into contact with the first insulating layer, having a thickness of 50 nm or more, and including a nitride containing Si and N; and a third insulating layer coming into contact with the second insulating layer, the first insulating layer and the second insulating layer having hydrogen contents of 4×1021 atoms/cm3 or less, and the third insulating layer having a hydrogen content of more than 4×1021 atoms/cm3.
    Type: Application
    Filed: November 27, 2008
    Publication date: November 11, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Ayumu Sato, Ryo Hayashi, Hisato Yabuta, Tomohiro Watanabe
  • Publication number: 20100244022
    Abstract: A first gate electrode (2) is formed on a substrate (1); a first gate insulating layer (3) is formed so as to cover the first gate electrode (2); a semiconductor layer (4) including an oxide semiconductor is formed on the first gate insulating layer (3); a second gate insulating layer (7) is formed on the semiconductor layer (4); a second gate electrode (8) having a thickness equal to or larger than a thickness of the first gate electrode (2) is formed on the second gate insulating layer (7); and a drain electrode (6) and a source electrode (5) are formed so as to be connected to the semiconductor layer (4).
    Type: Application
    Filed: January 20, 2009
    Publication date: September 30, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Kenji Takahashi, Ryo Hayashi
  • Publication number: 20100213459
    Abstract: A transistor is constituted of a gate electrode 2, a gate insulation layer 3, a semiconductor layer 4 formed of an amorphous oxide, a source electrode 5, a drain electrode 6 and a protective layer 7. The protective layer 7 is provided on the semiconductor layer 4 in contact with the semiconductor layer 4, and the semiconductor layer 4 includes a first layer at least functioning as a channel layer and a second layer having higher resistance than the first layer. The first layer is provided on the gate electrode 2 side of the semiconductor layer 4 and the second layer is provided on the protective layer 7 side of the semiconductor layer 4.
    Type: Application
    Filed: September 18, 2008
    Publication date: August 26, 2010
    Applicant: Canon Kabushiki Kaisha
    Inventors: Mikio Shimada, Ryo Hayashi, Hideya Kumomi
  • Publication number: 20100203673
    Abstract: A method for manufacturing a field-effect transistor is provided. The field-effect transistor includes on a substrate a source electrode, a drain electrode, an oxide semiconductor layer, an insulating layer and a gate electrode. The method includes, after forming the insulating layer on the oxide semiconductor layer, an annealing step of increasing the electrical conductivity of the oxide semiconductor layers by annealing in an atmosphere containing moisture. The steam pressure at the annealing step is higher than the saturated vapor pressure in the atmosphere at the annealing temperature.
    Type: Application
    Filed: September 25, 2008
    Publication date: August 12, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Ryo Hayashi, Hisato Yabuta, Yoshinori Tateishi, Nobuyuki Kaji
  • Publication number: 20100194450
    Abstract: In a light-emitting display apparatus including a plurality of pixels each including a light-emitting element and a driving circuit of the light-emitting element, and the driving circuit includes a plurality of thin-film transistors connected in parallel, a threshold voltage of the thin-film transistor reversibly changes according to a voltage applied between a gate and a source or between the gate and a drain of each of the thin-film transistors, by selecting and switching the plurality of thin-film transistors TFT11 to TFT13, the threshold voltage of the thin-film transistors for supplying a current to the light-emitting element is held within a predetermined range.
    Type: Application
    Filed: November 11, 2008
    Publication date: August 5, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hisae Shimizu, Ryo Hayashi, Katsumi Abe
  • Patent number: 7737438
    Abstract: A method for manufacturing a field-effect transistor includes the steps of forming a source electrode and a drain electrode each containing hydrogen or deuterium; forming an oxide semiconductor layer in which the electrical resistance is decreased if hydrogen or deuterium is added; and, causing hydrogen or deuterium to diffuse from the source electrode and the drain electrode to the oxide semiconductor layer.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: June 15, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ayanori Endo, Ryo Hayashi, Tatsuya Iwasaki
  • Publication number: 20100140612
    Abstract: A manufacturing method of a thin film transistor having at least a gate electrode, a gate insulation film, an oxide semiconductor layer, a first insulation film, a source electrode, a drain electrode, and a second insulation film on a substrate, including: forming the gate electrode on the substrate; forming the gate insulation film on the gate electrode; forming a semiconductor layer including amorphous oxide on the gate insulation film; patterning the gate insulation film; patterning the oxide semiconductor layer; reducing the oxide semiconductor layer in resistance by forming the first insulation film on the oxide semiconductor layer in the atmosphere not including an oxidized gas; patterning the first insulation film and forming a contact hole between the source electrode and the drain electrode and the oxide semiconductor layer; forming a source electrode layer and a drain electrode layer in the oxide semiconductor layer through the contact hole; forming the source electrode and the drain electrode throu
    Type: Application
    Filed: May 28, 2008
    Publication date: June 10, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hideyuki Omura, Ryo Hayashi
  • Publication number: 20100117072
    Abstract: To provide a light emitting apparatus in which high definition can be realized and the connection reliability of a wiring portion is excellent, the light emitting apparatus includes: a substrate; a light emitting element which includes a first electrode, an emission layer, and a second electrode which are stacked on the substrate in the stated order; and a thin film transistor which is of an n-type and includes a channel layer and a drain electrode, the light emitting element and the thin film transistor are arranged in parallel and in contact with the substrate, the channel layer of the thin film transistor has a field effect mobility equal to or larger than 1 cm2V?1s?1, and the second electrode is connected with the drain electrode of the thin film transistor.
    Type: Application
    Filed: April 23, 2008
    Publication date: May 13, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Masato Ofuji, Katsumi Abe, Ryo Hayashi, Masafumi Sano, Hideya Kumomi
  • Publication number: 20100090205
    Abstract: An active matrix display apparatus including a transistor 20, a storage capacitor 30 and a light-emitting element 40, which are formed on a substrate 10. The transistor 20 has a source electrode 21, a drain electrode 22 and a gate electrode 23. The storage capacitor 30 has a multilayered structure of a first electrode 31, a dielectric layer 32 and a second electrode 33 stacked in this order on the substrate 10. The light-emitting element 40 has a multilayered structure of a third electrode 41, a light-emitting layer 42 and a fourth electrode 43 stacked in this order on the substrate 10. The first electrode 31 is connected to the gate electrode 23, and at least a part of the storage capacitor 30 is disposed between the substrate 10 and the light-emitting element 40. All of the substrate 10, the first electrode 31, second electrode 33 and the third electrode 41 are formed from a material transmitting a visible light.
    Type: Application
    Filed: January 29, 2007
    Publication date: April 15, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Masato Ofuji, Katsumi Abe, Masafumi Sano, Hideya Kumomi, Ryo Hayashi
  • Patent number: 7696513
    Abstract: The present invention provides a light-emitting device, including: a pixel region provided on a substrate and including a blue pixel region, a green pixel region, and a red pixel region which correspond to lights of three primary colors of blue, green and red light, respectively, the pixel region including: a thin-film transistor having a source electrode, a drain electrode, a gate electrode, a gate insulating film, and an active layer; a light-emitting layer; and a lower electrode and a counter electrode for sandwiching the light-emitting layer therebetween, wherein the active layer includes an oxide; the drain electrode is electrically connected with a part of the light-emitting layer; and the thin-film transistor is arranged in a region other than the blue pixel region on the substrate.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: April 13, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryo Hayashi, Tatsuya Iwasaki
  • Publication number: 20100085081
    Abstract: To provide an enhancement-depletion (E/D) inverter which can be easily manufactured, in the present invention, a method of manufacturing an inverter which is composed of an oxide semiconductor in which a channel layer includes at least one element selected from In, Ga and Zn formed on a same substrate, the inverter being the E/D inverter having plural thin film transistors, is characterized by comprising the steps of: forming a first transistor and a second transistor, the thicknesses of the channel layers of the first and second transistors being mutually different; and executing heat treatment to at least one of the channel layers of the first and second transistors.
    Type: Application
    Filed: May 15, 2008
    Publication date: April 8, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Masato Ofuji, Katsumi Abe, Ryo Hayashi, Masafumi Sano, Hideya Kumomi
  • Publication number: 20100065837
    Abstract: A thin film transistor is manufactured by forming a gate electrode on a substrate, forming a first insulating film on the gate electrode, forming an oxide semiconductor layer on the first insulating film with an amorphous oxide, patterning the first insulating film, patterning the oxide semiconductor layer, forming a second insulating film on the oxide semiconductor layer in an oxidative-gas-containing atmosphere, patterning the second insulating film to expose a pair of contact regions, forming an electrode layer on the pair of contact regions, and patterning the electrode layer to for a source electrode and a drain electrode.
    Type: Application
    Filed: November 29, 2007
    Publication date: March 18, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hideyuki Omura, Ryo Hayashi, Nobuyuki Kaji, Hisato Yabuta
  • Publication number: 20100059751
    Abstract: A bottom gate type thin-film transistor constituted of at least a substrate, a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode. At an interface between the gate electrode and the gate insulating layer, the interface has a difference between hill tops and dale bottoms of unevenness in the vertical direction, of 30 nm or less.
    Type: Application
    Filed: April 16, 2008
    Publication date: March 11, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Kenji Takahashi, Ryo Hayashi, Masafumi Sano