Abstract: A pattern measuring method and device are provided which set a reference position for a measuring point to be measured by a scanning electron microscope and the like, based on position information of a reference pattern on an image acquired from the scanning electron microscope and based on a positional relation, detected by using design data, between the measuring point and the reference pattern formed at a position isolated from the measuring point.

Abstract: (1) part or all of the number, coordinates and size/shape and imaging sequence of imaging points each for observation, the imaging position change method and imaging conditions can be calculated automatically from CAD data, (2) a combination of input information and output information for imaging recipe creation can be set arbitrarily, and (3) decision is made of imaging or processing at an arbitrary imaging point as to whether to be successful/unsuccessful and in case a failure is determined, a relief process can be conducted in which the imaging point or imaging sequence is changed.

Abstract: Disclosed is a method wherein a template for template matching is created with high accuracy and high efficiency. With respect to each individual pattern constituting a basic circuit, pattern information regarding a plurality of layers in a semiconductor device is stored in a library. On the basis of the designation of the position and the layer, pattern information regarding the designated position and layer is extracted from the pattern information stored in the library. A template is created on the basis of the extracted pattern information.

Abstract: An evaluation method and apparatus is provided for evaluating a displacement between patterns of a pattern image by using design data representative of a plurality of patterns superimposed ideally. A first distance is measured for an upper layer pattern between a line segment of the design data and an edge of the charged particle radiation image, a second distance is measured for a lower layer pattern between a line segment of the design data and an edge of the charged particle radiation image; and an superimposition displacement is detected between the upper layer pattern and lower layer pattern in accordance with the first distance and second distance.

Abstract: An image of the joint portion of circuit patterns manufactured using a design pattern for double patterning is read out. Target boundary lines and evaluation regions are set on the image. In the evaluation regions, image processing is performed along the directions of the target boundary lines. Furthermore, binarization processing is performed. A decision is made based on an image obtained in this way as to whether the patterns have defects.

Abstract: A pattern inspection apparatus can be provided, for example, in a scanning electron microscope system. When patterns of a plurality of layers are included in a SEM image, the apparatus separates the patterns according to each layer by using design data of the plurality of layers corresponding to the patterns. Consequently, the apparatus can realize inspection with use of only the pattern of a target layer to be inspected, pattern inspection differently for different layers, or detection of a positional offset between the layers.

Abstract: In a panoramic image construction technology of dividing a wide-range imaging area (EP) of semiconductor patterns into a plurality of imaging areas (SEP), and joining a group of images, which are obtained by imaging the SEPs using an SEM, through image processing, a fact that although a pattern serving as a key to joining is not contained in an overlap area between some of the SEPs, all the images can be joined in some cases is noted so that: although the number of patterns serving as keys to joining is small, SEPs whose images are all joined can be determined; or even if such SEPs cannot be determined, SEPs satisfying user's request items as many as possible can be determined. The cases are extracted by optimizing an SEP arrangement, whereby the number of cases in which SEPs whose images are all joined can be determined is increased.

Abstract: A composite image creating method and device are provided which, when images separately captured a plurality of times are panoramically synthesized, can prevent deformation of a pattern due to multiple irradiation of the electron beam. One image is generated by overlapping joining areas of rims of two adjacent images when a plurality of images are joined to generate one image. Of two adjacent images, the joining area of an image of an earlier image capturing order is left, and the joining area of an image of a later image capturing order is removed. The joining area of the image of an earlier image capturing order is obtained with irradiation of electron beam a less number of times than the joining area of the image of a later image capturing order, and therefore deformation of a pattern due to irradiation of the electron beam is little.

Abstract: (1) part or all of the number, coordinates and size/shape and imaging sequence of imaging points each for observation, the imaging position change method and imaging conditions can be calculated automatically from CAD data, (2) a combination of input information and output information for imaging recipe creation can be set arbitrarily, and (3) decision is made of imaging or processing at an arbitrary imaging point as to whether to be successful/unsuccessful and in case a failure is determined, a relief process can be conducted in which the imaging point or imaging sequence is changed.

Abstract: Although there has been a method for evaluating pattern shapes of electronic devices by using, as a reference pattern, design data or a non-defective pattern, the conventional method has a problem that the pattern shape cannot be evaluated with high accuracy because of the difficulty in defining an exact shape suitable for the manufacturing conditions of the electronic devices. The present invention provides a shape evaluation method for circuit patterns of electronic devices, the method including a means for generating contour distribution data of at least two circuit patterns from contour data sets on the circuit patterns; a means for generating a reference pattern used for the pattern shape evaluation, from the contour distribution data; and a means for evaluating the pattern shape by comparing each evaluation target pattern with the reference pattern.

Abstract: It is the object of the present invention to provide a pattern measurement apparatus which suitably evaluates a pattern formed by a double patterning method prior to a transfer using masks or which suitably evaluates a deviation of patterns formed by the double patterning method. To achieve the object, a pattern measurement apparatus is proposed which performs an exposure simulation on data about contour lines obtained by converting the pattern edges of first and mask images formed based on charged-particle beam irradiation of the two masks used for subsequent double exposure and which overlaps two exposure-simulated contour lines based on the coordinate information of design data about the masks. Furthermore, a pattern dimension measuring apparatus is proposed which sets measurement conditions using a charged-particle beam based on the positional information about parts or portions separated for double exposure.

Abstract: A pattern inspection apparatus can be provided, for example, in a scanning electron microscope system. When patterns of a plurality of layers are included in a SEM image, the apparatus separates the patterns according to each layer by using design data of the plurality of layers corresponding to the patterns. Consequently, the apparatus can realize inspection with use of only the pattern of a target layer to be inspected, pattern inspection differently for different layers, or detection of a positional offset between the layers.

Abstract: Although there has been a method for evaluating pattern shapes of electronic devices by using, as a reference pattern, design data or a non-defective pattern, the conventional method has a problem that the pattern shape cannot be evaluated with high accuracy because of the difficulty in defining an exact shape suitable for the manufacturing conditions of the electronic devices. The present invention provides a shape evaluation method for circuit patterns of electronic devices, the method including a means for generating contour distribution data of at least two circuit patterns from contour data sets on the circuit patterns; a means for generating a reference pattern used for the pattern shape evaluation, from the contour distribution data; and a means for evaluating the pattern shape by comparing each evaluation target pattern with the reference pattern.

Abstract: This invention relates to a SEM system constructed to create imaging recipes or/and measuring recipes automatically and at high speed, and improve inspection efficiency and an automation ratio, and to a method using the SEM system; a method for creation of imaging recipes and measuring recipes in the SEM system is adapted to include, in a recipe arithmetic unit, the steps of evaluating a tolerance for an imaging position error level at an evaluation point, evaluating a value predicted of the imaging position error level at the evaluation point when any region on circuit pattern design data is defined as an addressing point, and determining an imaging recipe and a measuring recipe on the basis of a relationship between the tolerance for the imaging position error level at the evaluation point and the predicted value of the imaging position error level at the evaluation point.

Abstract: A workpiece size measurement method suitable for length measurement of multilayered circuit elements with increased complexities is disclosed. This method employs a technique for changing measurement conditions in a way pursuant to either an image of workpiece or the situation of a target semiconductor circuit element to be measured when measuring pattern sizes on the workpiece image using design data of the semiconductor circuit element. With such an arrangement, adequate measurement conditions are selectable in accordance with the state of workpiece image and/or the state of a circuit element formed on the workpiece, thereby making it possible to improve the measurement efficiency. A workpiece size measurement apparatus using the technique is also disclosed.

Abstract: Solving means is configured of a signal input interface, a data calculation unit, and a signal output interface. The signal input interface allows image data which is obtained by photographing hole patterns, and CAD data which corresponds to hole patterns included in the image data, to be inputted.

Abstract: Provided is a panorama image synthesis technique using a scanning charged-particle microscope and capable of obtaining a panorama image synthesis that is robust against contamination and the imaging shift and distortion of an image in a wide-field imaging region (EP) for semiconductor fine patterns. The panorama image synthesis technique in the wide-field imaging region (EP) using the scanning charged-particle microscope is characterized in that the layout of each adjustment point, each local imaging region, and an imaging sequence comprising the imaging order of the each adjustment point are optimized and created as an imaging recipe.

Abstract: There is provided a pattern inspection apparatus that is capable of detecting a defect accurately and efficiently to inspect a pattern of a semiconductor device. The pattern inspection apparatus includes: a contour extraction means for extracting contour data of a pattern from a captured image of the semiconductor device; a non-linear part extraction means for extracting a non-linear part from the contour data; an angular part extraction means for extracting an angular part of a pattern from design data of the semiconductor device; and a defect detection section that compares a position of the non-linear part extracted by the non-linear part extraction section with a position of the angular part extracted by the angular part extraction section so as to detect a position of a defective part of a pattern.

Abstract: One of principal objects of the present invention is to provide a sample dimension measuring method for detecting the position of an edge of a two-dimensional pattern constantly with the same accuracy irrespective of the direction of the edge and a sample dimension measuring apparatus. According to this invention, to accomplish the above object, it is proposed to correct the change of a signal waveform of secondary electrons which depends on the direction of scanning of an electron beam relative to the direction of a pattern edge of an inspection objective pattern. It is proposed that when changing the scanning direction of the electron beam in compliance with the direction of a pattern to be measured, errors in the scanning direction and the scanning position are corrected. In this configuration, a sufficient accuracy of edge detection can be obtained irrespective of the scanning direction of the electron beam.

Abstract: In a defect judgment operation using tolerance to allow a high-speed operation, the amount of deformation is obtained from an image pickup pattern image, and tolerance including the deformation is generated by deforming a reference pattern image as the basis of the tolerance according to the deformation, and only a disconnection or a contact is judged as an abnormality even if deformation exists in an image pickup pattern.