Abstract: Systems and methods involving construction of a system interconnect in which different channels have different widths in numbers of bits. Example processes to construct such a heterogeneous channel NoC interconnect are disclosed herein, wherein the channel width may be determined based upon the provided specification of bandwidth and latency between various components of the system.

Abstract: Example implementations are directed to more efficiently delivering a multicast message to multiple destination components from a source component. Multicast environment is achieved with transmission of a single message from a source component, which gets replicated in the NoC during routing towards the destination components indicated in the message. Example implementations further relate to an efficient way of implementing multicast in any given NoC topology, wherein one or more multicast trees in the given NoC topology are formed and one of these trees are used for routing a multicast message to its intended destination components mentioned therein.

Abstract: Aspects of the present disclosure relates to methods, computer readable mediums, and NoC architectures/systems/constructions that can automatically mark and configure some channel of a NoC as store-and-forward channels, and other channels of the NoC as cut-through channels, and can further resize the buffers/channels based on the given NoC specification and associated traffic profile. An aspect of the present disclosure relates to a method for configuring a first set of plurality of channels of a NoC as store-and-forward channels, and configuring a second set of plurality of channels of the NoC as cut-through channels based on the determination of idle cycles in a given NoC specification and associated traffic profile.

Abstract: Example implementations described herein are directed to a configurable building block, such as a router, for implementation of a Network on Chip (NoC). The router is parameterized by a software layer, which can include the number of virtual channels for a port, the number of ports, the membership information of the virtual channels, clock domain, and so forth. The router may further be configured to implement arbitration techniques and flit processing techniques based on the parameters specified by the software layer.

Abstract: Aspects of the present disclosure relate to a method and system for hybrid and/or distributed implementation of generation and/or execution of power profile management instructions. An embodiment of the present disclosure provides a hardware element of a SoC/NoC that can be configured to generate and/or execute power profile management instructions using a hybrid combination of software and hardware, wherein the hardware element can be run in parallel with other hardware elements of the SoC/NoC to generate and execute power profile management instructions for different segments or regions of the SoC/NoC for efficient and safe working thereof.

Abstract: Systems and methods of the present disclosure relate to automatically and/or dynamically generating one or more power management sequences for SoC and NoC architectures from a given input specification having one or a combination of NoC design specification, traffic specification, traffic profile, power profile information, initiator-consumer relationship, interdependency between components, retention information, external factors, among other allied configurations/information to enable efficient switching of one or more hardware elements from one power profile to another.

Abstract: The present disclosure relates to automatic sizing of NoC channel buffers of one or more virtual channels to optimize NoC design, SoC design, and to meet defined performance objectives. The present disclosure further relates to a NoC element such as a router or a bridge having input ports associated with input virtual channels, and output ports associated with output virtual channels, wherein, aspects of the present disclosure enable sizing of any or a combination of the width of the input virtual channel(s), width of the output virtual channel(s), buffer(s) associated with input virtual channels, and buffer(s) associated with output virtual channels. In another aspect, the sizing can be performed based on one or a combination of defined performance objectives, throughputs of the input virtual channels, and throughputs of the output virtual channels, load characteristics, bandwidth characteristics of each input/output channel, among other like parameters.

Abstract: Systems and methods described herein are directed to solutions for Network on Chip (NoC) interconnects that automatically and dynamically determines the position of hosts of various size and shape in a NoC topology based on the connectivity, bandwidth and latency requirements of the system traffic flows and certain performance optimization metrics such as system interconnect latency and interconnect cost. The example embodiments selects hosts for relocation consideration and determines a new possible position for them in the NoC based on the system traffic specification, shape and size of the hosts and by using probabilistic function to decide if the relocation is carried out or not. The procedure is repeated over new sets of hosts until certain optimization targets are satisfied or repetition count is exceeded.

Abstract: In an aspect, the present disclosure provides a method that comprises automatic generation of a NoC from specified topological information based on projecting NoC elements of the NoC onto a grid layout. In an aspect, the specified topological information, including specification of putting constraints on positions/locations of NoC elements and links thereof, can be input by a user in real space, and can then be projected on the grid layout.

Abstract: A method for masking content to be displayed on the electronic device is provided. The method includes receiving, by a processor in the electronic device, the content to be displayed on the electronic device, determining, by the processor, that at least one portion of the content is objectionable content based on a semantic signature of a content filter, and masking, by the processor, the at least one portion of the content displayed on the electronic device based on the detection.

Abstract: The present disclosure is directed to a NoC interconnect that consolidates one or more Network on Chip functions into one Network on Chip. The present disclosure is further directed to a Network on Chip (NoC) interconnect comprising a plurality of first agents, wherein each agent can be configured to communicate with other ones of the plurality of first agents. NoC of the present disclosure can further include a second agent configured to perform a NoC function, and a bridge associated with the second agent, wherein the bridge can be configured to packetize messages from the second agent to the plurality of first agents, and to translate messages from the plurality of first agents to the second agent.

Abstract: An aspect of the present disclosure provides a hardware element in a Network on Chip (NoC), wherein the hardware element includes a clock gating circuit configures one or more neighboring hardware elements to activate before receiving new incoming data and to sleep after a defined number of cycles, wherein the defined number of cycles can be counted from a cycle having non-receipt of incoming data and/or having a clearance of all data within an input queue of a source hardware element.

Abstract: Aspects of the present disclosure relate to a method and system for hybrid and/or distributed implementation of generation and/or execution of power profile management instructions. An embodiment of the present disclosure provides a hardware element of a SoC/NoC that can be configured to generate and/or execute power profile management instructions using a hybrid combination of software and hardware, wherein the hardware element can be run in parallel with other hardware elements of the SoC/NoC to generate and execute power profile management instructions for different segments or regions of the SoC/NoC for efficient and safe working thereof.

Abstract: Systems and methods described herein are directed to solutions for NoC interconnects that provide congestion avoidance and end-to-end uniform and weighted-fair allocation of resource bandwidths among various contenders in a mesh or torus interconnect. The example implementations are fully distributed and involve using explicit congestion notification messages or local congestion identification for congestion detection. Based on the congestion level detected, the injection rates of traffic at various agents are regulated that avoids congestion and also provides end-to-end QoS. Alternative example implementations may also utilize end-to-end credit based flow control between communicating agents for resource and bandwidth allocation of the destination between the contending sources. The resource allocation is performed so that both the weighted and strict bandwidth allocation QoS policies are satisfied.

Abstract: Systems and methods for automatically generating a Network on Chip (NoC) interconnect architecture with pipeline stages are described. The present disclosure includes example implementations directed to automatically determining the number and placement of pipeline stages for each channel in the NoC. Example implementations may also adjust the buffer at one or more routers based on the pipeline stages and configure throughput for virtual channels.

Abstract: Systems and methods for automatically generating a Network on Chip (NoC) interconnect architecture with pipeline stages are described. The present disclosure includes example implementations directed to automatically determining the number and placement of pipeline stages for each channel in the NoC. Example implementations may also adjust the buffer at one or more routers based on the pipeline stages and configure throughput for virtual channels.

Abstract: An approach is provided for providing location information of user devices based on signal frequencies of transmitters. The positioning platform processes and/or facilitates a processing of one or more signals, from one or more transmitters, captured at one or more user devices to determine one or more frequencies of the one or more signals. Next, the positioning platform determines device location information of the one or more user devices based, at least in part, on the one or more frequencies.

Abstract: A method for automatically generating a dynamic index for content displayed on an electronic device is provided. The method includes detecting the content displayed on the electronic device, generating, by the processor, the dynamic index for the content based on user intent, and causing to display the dynamic index on a screen of the electronic device.

Abstract: Example implementations of the present disclosure are directed to handling the eviction of a conflicting cuckoo entry while reducing performance degradation resulting. In example implementations, when an address is replacing another address, the evicted address does not necessarily map to the same places as the new address. Example implementations attempt to conduct a run through of the cache coherent directory with the new entry such that the evicted address can find an empty entry in the directory and fill the empty entry.

Abstract: The present disclosure relates system and method for automatic assignment of power domain and voltage domain to one or more SoC and/or NoC elements based on one or a combination of NoC and/or SoC specification/design, traffic specification, connectivity between SoC hosts that the NoC element in context is a part of, power specification (power domain and voltage domain of each host) of the hosts/SoC, and power profile(s) applicable for the NoC element in context. In another example implementation, power domain and voltage domain can be assigned to each SoC and/or NoC element based on pre-defined constraints and with an objective of reducing/minimizing static power consumption, reducing/minimizing hardware area, or identifying a tradeoff between the two parameters.