Patents by Inventor Sandeep Gupta
Sandeep Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12682357Abstract: The operational characteristics of a cyber-physical system (CPS) may deviate from the certified system due to intended (in case of cheating) or unintended (wear and tear) reasons. A computer-implemented certification system makes test case search aware of the multidimensional interactions between the cyber and physical subsystems and addresses practical dynamical system problems like Zeno behavior and dynamical model divergence. The system dynamically modulates an input search space by predicting and limiting input variations that can potentially cause divergence or Zeno behavior.Type: GrantFiled: May 25, 2023Date of Patent: July 14, 2026Assignee: Arizona Board of Regents on Behalf of Arizona State UniversityInventors: Sandeep Gupta, Aranyak Maity, Ayan Banerjee, Imane Lamrani
-
Patent number: 12675081Abstract: Complexities arising from interaction between multiple inter-connected components in an autonomous cyber physical system can potentially result in differences in intended and observed operations of a CPS. To perform fault analysis of a CPS it is imperative to explain this discrepancy in terms of the components of CPS control code. A system estimates a “mined” hybrid system representation of a CPS based on observed input/output traces and extracts a state machine representation of the CPS control code. The system compares the “mined” hybrid system representation with the extracted state machine representation simplification of the CPS code to identify discrepancies between expected and observed operation of the CPS. The system explains discrepancies in terms of call conditions as binary or unary operations on input and output variables and status of function call arguments.Type: GrantFiled: July 19, 2022Date of Patent: July 7, 2026Assignee: Arizona Board of Regents on Behalf of Arizona State UniversityInventors: Sandeep Gupta, Ayan Banerjee, Imane Lamrani
-
Publication number: 20260178818Abstract: Certain aspects of the disclosure provide systems and methods for providing comprehensive writing enhancement. Certain aspects include, receiving, from a document editing application, a user request to transform writing content and an indication of a modification for improving the writing content, receiving, from the document editing application, the writing content associated with the user request, generating, based on the user request and the writing content, a prompt for improving the writing content based on the indication of the modification, sending, to a language model, the prompt, receiving, from the language model, based on the prompt, transformed writing content, and sending, to the document editing application, the transformed writing content.Type: ApplicationFiled: December 24, 2024Publication date: June 25, 2026Inventors: Shailesh KRISHNA, Marie PANCHESSON, Mohit Kumar GOEL, Sandeep GUPTA, Nilesh SRIVASTAVA, Ana DURAN
-
Publication number: 20260094182Abstract: A system and method for promoting content items in a content platform, including: a computer processor, a content promoter service executing on the computer processor and including functionality to identify an impression budget and a pacing parameter for impressions of an unvetted content item and utilize the impression budget and the pacing parameter to control availability of the unvetted content item for artificial promotion, a content recommender service including functionality to receive a request for content for a container, identify a set of vetted content items based on historical performance, artificially promote the unvetted content item by injecting it into the set of vetted content items and providing the final set of content in response to the request, and a content cold-start service configured to select the unvetted content item as a candidate for injection based on similarity to a surrogate content item in the set of vetted content items.Type: ApplicationFiled: September 27, 2024Publication date: April 2, 2026Applicant: Tubi, Inc.Inventors: Sandeep Gupta, Jaya Kawale, Chiyu Zhong, John Trenkle, Marios Assiotis
-
Publication number: 20260044648Abstract: Examples including a system described herein implement a novel liquid time constant neural network (LTC-NN) based architecture to recover an underlying model of physical dynamics from real world data. The automatic differentiation property of LTC-NN nodes overcomes problems associated with low sampling rate, the input dependent time constant in the forward pass of the hidden layer of LTC-NN nodes creates a massive search space of implicit physical dynamics, the physics model solver based data reconstruction loss guides the search for the correct set of implicit dynamics, and drop out in dense layer ensures extraction of the sparsest model. Further, to account for perturbation timing error, the LTC-NN based architecture of the system utilizes dense layer nodes to search through input shifts that results in the lowest reconstruction loss.Type: ApplicationFiled: August 6, 2025Publication date: February 12, 2026Applicant: Arizona Board of Regents on Behalf of Arizona State UniversityInventors: Ayan Banerjee, Sandeep Gupta
-
Publication number: 20260044649Abstract: A system and associated methods extend neural architectures such as liquid time constant neural network (LTC-NN) or continuous time recurrent neural networks (CT-RNN) or neural ordinary differential equations (NODE) to obtain advanced neural structures (LTC-NN-MR, CT-RNN-MR, NODE-MR) that can recover model coefficients of a dynamical system under low sampling rate conditions. The forward pass of these advanced neural structures has the same form as bilinear approximations of nonlinear dynamics. Measurements of real data can be used to convert the set of non-linear dynamics to an over-determined system of equations that are linear in terms of the model coefficients.Type: ApplicationFiled: August 6, 2025Publication date: February 12, 2026Applicant: Arizona Board of Regents on Behalf of Arizona State UniversityInventors: Ayan Banerjee, Sandeep Gupta
-
Patent number: 12509007Abstract: A method for a process of signal transmission between a plurality of electrical units, wherein the method comprises: electrically interconnecting the plurality of electrical units by way of a plurality of electrical junction blocks, each electrical junction block of the plurality of electrical junction blocks comprising one or more terminals. An arrangement for signal transmission between a plurality of electrical units, wherein the arrangement comprises a plurality of electrical junction blocks for electrically interconnecting the plurality of electrical units, and wherein each electrical junction block of the plurality of electrical junction blocks comprises one or more terminals.Type: GrantFiled: February 2, 2022Date of Patent: December 30, 2025Assignee: Scania CV ABInventor: Sandeep Gupta
-
Patent number: 12478731Abstract: The present disclosure discloses a data science driven system and associated methodology framework for mining relevant knowledge from input/output traces of a closed-loop control system for glycemic control to aid in actionable feedback for Type 1 diabetes management. The framework takes Continuous Glucose Monitor (CGM) records and insulin pump records from a closed loop control (CLC) system and interprets the CGM records and insulin pump data to provide medically useful information, wherein the closed-loop control system is operable for operation in an “auto mode” (AP) and a “manual mode” (SAP).Type: GrantFiled: March 19, 2021Date of Patent: November 25, 2025Assignees: Arizona Board of Regents on behalf of Arizona State University, Mayo Foundation for Medical Education and ResearchInventors: Sandeep Gupta, Ayan Banerjee, Yogish C. Kudva
-
Publication number: 20250307167Abstract: A cache may store critical cache lines and non-critical cache lines, and may attempt to retain critical cache lines in the cache by, for example, favoring the critical cache lines in replacement data updates. Multiple levels of criticality may be available for a given cache line and cache circuitry may adjust the criticality value of in response to a criticality event. One or more upper criticality levels may be masked when selecting a victim cache line for replacement.Type: ApplicationFiled: January 20, 2025Publication date: October 2, 2025Inventors: Tyler J. Huberty, Vivek Venkatraman, Sandeep Gupta, Eric J. Furbish, Srinivasa Rangan Sridharan, Stephen G. Meier
-
Patent number: 12430224Abstract: An apparatus includes a plurality of processor circuits, a cache memory circuit, and a trace control circuit. The trace control circuit may be configured, in response to activation of a mode to record information indicative of program execution of at least one processor circuit of the plurality of processor circuits, to monitor memory requests transmitted between ones of the plurality of processor circuits and the cache memory circuit, and then to select a particular memory request of monitored memory requests using an arbitration algorithm. The trace control circuit may be further configured to allocate space in a trace buffer to the particular memory request, and to store, in the trace buffer, information associated with the particular memory request.Type: GrantFiled: June 29, 2023Date of Patent: September 30, 2025Assignee: Apple Inc.Inventors: Andrew J. Beaumont-Smith, Sandeep Gupta, Krishna C. Potnuru, Matthias Knoth
-
Patent number: 12423235Abstract: An apparatus includes a plurality of coherent agents, and a coherence directory that includes directory ways for storing coherency information. The coherence directory may be configured to determine that a cache block that is not currently cached among the coherent agents, is stored in a first coherent agent. The coherence directory may be further configured to, in response to this determination, create a particular entry in a selected one of the directory ways. The coherence directory may also be configured to send, to the first coherent agent, an indicator identifying a directory way that includes the entry. In response to a second coherent agent caching the cache block, the coherence directory may update the entry to include the second coherent agent. The first and second coherent agents may be configured to receive copies of the indicator, and to store their copy in locations associated with the cache block.Type: GrantFiled: February 5, 2024Date of Patent: September 23, 2025Assignee: Apple Inc.Inventors: Ilya Granovsky, Amanvir Singh Sidana, Sandeep Gupta, Tom Greenshtein, Vivek Venkatraman
-
Publication number: 20250278280Abstract: A method for dynamically generating process model objects for workflows includes: obtaining a request from a user of a software application for configuring workflows, the request being for an initial workflow including multiple conditions and multiple actions, the request including user-provided information for one or more of the multiple conditions and one or more of the multiple actions; mapping the initial workflow to a template for generating process model objects for workflows, the template comprising a single condition block to represent the multiple conditions and a single action block to represent the multiple actions; extracting the user-provided information from the request; and dynamically generating a process model object for the initial workflow based, at least in part, on the extracted user-provided information and information associated with the template.Type: ApplicationFiled: February 29, 2024Publication date: September 4, 2025Inventors: Shyamalendu TRIPATHY, Sandeep GUPTA, Nivedita NAYAK, Manupriyam JINDAL, Bhavishya TOLANI, Yash AGARWAL
-
Publication number: 20250232078Abstract: Examples of a simulation framework are provided to evaluate time varying systems using a piecewise linear time invariant simulation (PLIS) approach. The simulation framework can be configured for an artificial pancreas wireless network system that controls blood glucose in Type 1 Diabetes patients with time varying properties such as physiological changes associated with psychological stress and meal patterns.Type: ApplicationFiled: January 13, 2025Publication date: July 17, 2025Applicant: Arizona Board of Regents on Behalf of Arizona State UniversityInventors: Ayan Banerjee, Sandeep Gupta
-
Publication number: 20250217539Abstract: Example implementations of a neural network implementing a large language model for generating action plans that align with physical system dynamics of a cyber-physical system (CPS) but are also safe for the human users are disclosed. Examples include a physical dynamics coefficient estimator based on a liquid time constant neural network that can derive coefficients of dynamical models with some unmeasured state variables. Further, the model coefficients are then used to train an LLM with prompts embodied with traces from dynamical system and the corresponding model coefficients. When integrated with a contextualized chatbot, feasible and safe plans can be generated to manage external events such as meals for automated insulin delivery systems used by Type 1 Diabetes subjects.Type: ApplicationFiled: December 27, 2024Publication date: July 3, 2025Applicant: Arizona Board of Regents on Behalf of Arizona State UniversityInventors: Sandeep Gupta, Ayan Banerjee
-
Publication number: 20250209408Abstract: A method for compressed decision model object generation and processing. Embodiments include receiving configuration data specifying a first condition of a workflow, an action of the workflow that depends on the first condition being true, and a second condition of the workflow that depends on the first condition being false. Embodiments include generating a first entry in a decision model object comprising a first index value, the first condition, and an identifier of the action as a conditional output for the first entry that depends on the first condition. Embodiments include generating a second entry in the decision model object comprising the first index value and a second index value as a default output for the second entry. Embodiments include generating a third entry in the decision model object comprising the second index value, and the second condition. Embodiments include executing the workflow by serially processing the decision model object.Type: ApplicationFiled: December 21, 2023Publication date: June 26, 2025Inventors: Shyamalendu TRIPATHY, Bhavishya TOLANI, Sandeep GUPTA, Yash AGARWAL, Nivedita NAYAK, Manupriyam JINDAL
-
Patent number: 12277074Abstract: Techniques are disclosed pertaining to utilizing a communication fabric via multiple ports. An agent circuit includes a plurality of command-and-data ports that couple the agent circuit to a communication fabric coupled to a plurality of hardware components that includes a plurality of memory controller circuits that facilitate access to a memory. The agent circuit can execute an instruction that involves issuing a command for data stored at the memory. The agent circuit may perform a hash operation on a memory address associated with the command to determine which one of the plurality of memory controller circuits to which to issue the command. The agent circuit issues the command to the determined memory controller circuit on a particular one of the plurality of command-and-data ports that is designated to the memory controller circuit. The agent circuit may issue all commands destined to that memory controller circuit on that port.Type: GrantFiled: September 25, 2023Date of Patent: April 15, 2025Assignee: Apple Inc.Inventors: Sergio Kolor, Sandeep Gupta, James Vash
-
Publication number: 20250103496Abstract: An apparatus includes a plurality of coherent agents, and a coherence directory that includes directory ways for storing coherency information. The coherence directory may be configured to determine that a cache block that is not currently cached among the coherent agents, is stored in a first coherent agent. The coherence directory may be further configured to, in response to this determination, create a particular entry in a selected one of the directory ways. The coherence directory may also be configured to send, to the first coherent agent, an indicator identifying a directory way that includes the entry. In response to a second coherent agent caching the cache block, the coherence directory may update the entry to include the second coherent agent. The first and second coherent agents may be configured to receive copies of the indicator, and to store their copy in locations associated with the cache block.Type: ApplicationFiled: February 5, 2024Publication date: March 27, 2025Inventors: Ilya Granovsky, Amanvir Singh Sidana, Sandeep Gupta, Tom Greenshtein, Vivek Venkatraman
-
Publication number: 20250103520Abstract: A memory controller circuit receives memory access requests from a network of a computer system. Entries are reserved for these requests in a retry queue circuit. An arbitration circuit of the memory controller circuit issues those requests to a tag pipeline circuit that determines whether the received memory access requests hit in a memory cache. As a memory access request passes through the tag pipeline circuit, it may require another pass through this pipeline—for example, if resources such as certain storage circuits needed to complete the memory access request are unavailable (for example a snoop queue circuit). The reservation that has been made in the retry queue circuit thus keeps the request from having to be returned to the network for resubmission to the memory controller circuit if initial processing of the memory access request cannot be completed.Type: ApplicationFiled: August 29, 2024Publication date: March 27, 2025Inventors: Ilya Granovsky, Jurgen M. Schulz, Tom Greenshtein, Elli Bagelman, Brian P. Lilly, John H. Kelm, Rohit K. Gupta, Sandeep Gupta, Anwar Q. Rohillah
-
Publication number: 20250089104Abstract: The present disclosure generally relates to wireless communication systems, more particularly to systems and methods for providing Fixed Mobile Convergence (FMC) service. System receives contact number/short code of first user dialed by second user, and establishes connection between BTAS and IMS server, when second user dials mobile number. Further, system invokes FMC create/update service to trigger modification of IFC service chaining data in IMS core network. Furthermore, system converts short code and transmits invite request messages to IMS core network and triggers ringing mode on mobile/fixed line device. In response to conversion, system transmit invite request messages to IMS core network of mobile number link to fixed line, and in response to transmission, system triggers ringing mode on mobile device and fixed line device, to establish call. Additionally, system establishes call between mobile device and fixed line device of second user, and fixed line/mobile device of first user, respectively.Type: ApplicationFiled: March 11, 2023Publication date: March 13, 2025Inventors: Birendra Singh BISHT, Harbinder Pal Singh SAINI, Anurag SINHA, Sandeep GUPTA, Rohit SOREN
-
Patent number: 12235769Abstract: A cache may store critical cache lines and non-critical cache lines, and may attempt to retain critical cache lines in the cache by, for example, favoring the critical cache lines in replacement data updates. Multiple levels of criticality may be available for a given cache line and cache circuitry may adjust the criticality value of in response to a criticality event. One or more upper criticality levels may be masked when selecting a victim cache line for replacement.Type: GrantFiled: January 25, 2024Date of Patent: February 25, 2025Assignee: Apple Inc.Inventors: Tyler J. Huberty, Vivek Venkatraman, Sandeep Gupta, Eric J. Furbish, Srinivasa Rangan Sridharan, Stephen G. Meier