Patents by Inventor Sandeep Kumar

Sandeep Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9328312
    Abstract: Provided herein are methods of optimizing energy recovery from oilseeds. The methods disclosed provide at least the ability to swell oilseeds and disrupt the cell walls (hulls) without changing the functionality and quality of oil; the process integration of oil extraction and green coal production to maximize the energy recovery in the form of crude oil and green coal from oilseeds; and heat integration during processing stages including subcritical water pretreatment, oil extraction, and subcritical water carbonization to minimize the process heat requirement.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: May 3, 2016
    Assignee: Tyton Biosciences, LLC
    Inventors: Sandeep Kumar, Sergiy Popov, Peter J. Majeranowski, Igor Kostenyuk
  • Publication number: 20160119402
    Abstract: A first computing device is provided for interacting with an input device across a network The computing device includes processors configured to run an executable, acquire device information, determine network latency, determine a data buffer queue size, provide the data buffer queue size to a second computing device, request device data from the second computing device, acquire data from the second computing device, and provide that data to the executable. A second computing device is included for providing sending device data across a network. The computing device includes processors configured to acquire polling information from an input device, provide that information to a first computing device, acquire a data buffer queue size from the second computing device, create a data buffer queue, read data from the input device, store the data, acquire requests for data from the first computing device, and provide stored data to the first computing device.
    Type: Application
    Filed: October 26, 2015
    Publication date: April 28, 2016
    Inventor: Sandeep KUMAR
  • Publication number: 20160117254
    Abstract: A system and method for recognizing data access patterns in large data sets and for preloading a cache based on the recognized patterns is provided. In some embodiments, the method includes receiving a data transaction directed to an address space and recording the data transaction in a first set of counters and in a second set of counters. The first set of counters divides the address space into address ranges of a first size, whereas the second set of counters divides the address space into address ranges of a second size that is different from the first size. One of a storage device or a cache thereof is selected to service the data transaction based on the first set of counters, and data is preloaded into the cache based on the second set of counters.
    Type: Application
    Filed: October 22, 2014
    Publication date: April 28, 2016
    Inventors: Sai Rama Krishna Susarla, Sandeep Kumar Reddy Ummadi, William Patrick Delaney
  • Patent number: 9306835
    Abstract: A node is configured to receive a packet from a host device, where the packet includes a source address associated with the host device; determine that the source address is not stored by the node; generate one or more logical distances, associated with one or more nodes, based on the source address and a respective address associated with each of the nodes; determine that another node is associated with a shortest logical distance, of the one or more logical distances; and transmit the source address to the other node based on the determination that the other node is associated with the shortest logical distance, where transmitting the source address allows the other node to store the source address or enables further nodes to obtain the source address from the other node.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: April 5, 2016
    Assignee: Juniper Networks, Inc.
    Inventors: Yafan An, Sandeep Kumar, Gunes Aybay, Rakesh Dubey
  • Patent number: 9288558
    Abstract: A control module for an optical switch node, comprising a TIM having a plurality of operating modes in which a first mode is identified by a first byte sequence; a communication interface unit transmitting a second byte sequence for placing the TIM in the first mode, the first byte sequence different from the second byte sequence, and a gate array receiving the second byte sequence, storing a list of predetermined unique values, each value indicative of a particular operating mode command, receiving at least a portion of the second byte sequence and receiving instructions to apply an algorithm to at least a portion of the second byte sequence to transform the portion into a checksum value, comparing the checksum value to the list to determine the operating mode command, and transmitting the first byte sequence to the TIM to place the TIM into the first mode.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: March 15, 2016
    Assignee: Infinera Corporation
    Inventors: Soven Kumar Dana, Chander Prakash Singh Dogra, Sandeep Kumar, Eric Heistermann
  • Publication number: 20160067325
    Abstract: The invention describes a method of purifying polysaccharide protein conjugates using mixed mode chromatography. The method involves contacting a crude polysaccharide protein conjugate with a mixed mode resin comprising an inert porous shell and an activated core under conditions of low conductivity that allow binding of the contaminants and collecting the unbound polysaccharide protein conjugate in a flowthrough.
    Type: Application
    Filed: May 15, 2014
    Publication date: March 10, 2016
    Inventors: Vijayarangam Damotharan, Sandeep Kumar Nettem, Raghavendra Maila
  • Publication number: 20160068851
    Abstract: The present disclosure provides novel compositions and methods for the production and use of Agrobacterium tumefaciens strains (for example LBA4404) that are deficient in RecA activity relative to the parent strain. Combinations with other gene-deficient-strains of Agrobacterium tumefaciens are also disclosed. Specifically, two exemplary s recA minus strains, UIA777 where chloramphenicol resistant gene disrupting the recA gene and UIA770 where kanamycin resistant gene disrupting the recA gene are provided.
    Type: Application
    Filed: September 3, 2015
    Publication date: March 10, 2016
    Inventors: Manju GUPTA, Sara BENNETT, Sandeep KUMAR, Donald MERLO, Nagesh SARDESAI
  • Patent number: 9267081
    Abstract: In an attempt to conduct an effective conversion of bioethanol into gasoline rich in aromatics and iso-paraffins, a ZSM-5 type zeolite with special features such as nano crystalline size and acidity has been synthesized. The catalyst (NZ) exhibits highest gasoline yield of about 73.8 wt % with aromatics and iso-paraffins as major components. The product measures Research Octane Number (RON) of about 95, which is desirable for the gasoline specifications. Moreover, considerable amounts of the Liquefied Petroleum Gas (LPG) (15 wt %) and light olefins (14 wt %) are also formed as by-products that add value to the process. The nano crystalline ZSM-5 catalyst (NZ) exhibits the stability in activity in terms of bioethanol conversion and aromatics yields for the reaction time period of 40 h.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: February 23, 2016
    Assignee: COUNCIL OF SCIENTIFIC & INDUSTRIAL RESEARCH
    Inventors: Nagabhatla Viswanadham, Saxena Sandeep Kumar
  • Publication number: 20160049435
    Abstract: A wafer on wafer (WOW) stack includes a first wafer having dies of a first type. The WOW stack further includes a second wafer bonded to the first wafer. The second wafer has dies of a second type. An integer number of dies of the second type are bonded to a corresponding die of the first type. A total area of the dies of the second type bonded to the corresponding die of the first type is less than or equal to an area of the corresponding die of the first type. A functionality of the dies of the first type is different from a functionality of the dies of the second type.
    Type: Application
    Filed: August 13, 2014
    Publication date: February 18, 2016
    Inventors: Sandeep Kumar GOEL, Yun-Han LEE
  • Publication number: 20160050350
    Abstract: An apparatus comprises an integrated circuit and at least one lens. The integrated circuit comprises an image sensor having a light sensing region. The light sensing region is partitioned into sub-regions. The integrated circuit also comprises a processor coupled with and beneath the image sensor. The processor is configured to generate a first processed image based on an image captured by one sub-region, and a second processed image based on another image captured by another sub-region. The first processed image and the second processed image are generated based on a pixel correction process executed by the processor which corrects one or more of the image or the another image based on a predefined light reception factor associated with the sub-regions. The image sensor is configured to receive light via the light sensing region through the at least one lens.
    Type: Application
    Filed: August 13, 2014
    Publication date: February 18, 2016
    Inventors: Sandeep Kumar GOEL, Yun-Han LEE, Ashok MEHTA
  • Patent number: 9265086
    Abstract: Methods and apparatus for enhanced radio resource control (RRC) reestablishment in a communication system include addressing repeated radio link failures (RLFs). For example, the methods and apparatus include incrementing a counter value associated with a first cell based on a detection of a RLF by a user equipment (UE) in a RRC connected state with the first cell. The methods and apparatus further include determining that the counter value meets or exceeds a first barring threshold value within a cell barring evaluation time duration. Additionally, the methods and apparatus include prohibiting the UE from performing an RRC reestablishment procedure with the first cell for a first barring time duration.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: February 16, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Yongle Wu, Muralidharan Murugan, Nitin Pant, Daniel Amerga, Shivratna Giri Srinivasan, Srivatsa Venkata Chivukula, Raghu Hanumantha Gowda, Kiran Patil, Sandeep Kumar Sunkesala, Gilbert Anpei Fu
  • Publication number: 20160041225
    Abstract: A circuit includes a plurality of scan chains arranged in a ring network topology. Each scan chain includes a plurality of scan blocks, each of the plurality of scan blocks including a storage element and a switching device. Each switching device includes a first input configured to receive an output of a storage element in a different scan chain from the scan chain in which the switching device is disposed, and a second input configured to receive one of a function logic signal or a test scan signal. The switching device configured to selectively couple the first input or the second input to an input of the storage element.
    Type: Application
    Filed: October 22, 2015
    Publication date: February 11, 2016
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Sandeep Kumar GOEL
  • Patent number: 9251097
    Abstract: A data storage service redundantly stores data and keys used to encrypt the data. Data objects are encrypted with first cryptographic keys. The first cryptographic keys are encrypted by second cryptographic keys. The first cryptographic keys and second cryptographic keys are redundantly stored in a data storage system to enable access of the data objects, such as to respond to requests to retrieve the data objects. The second cryptographic keys may be encrypted by third keys and redundantly stored in the event access to a second cryptographic key is lost.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: February 2, 2016
    Assignee: Amazon Technologies, Inc.
    Inventors: Sandeep Kumar, Gregory Branchek Roth, Gregory Alan Rubin, Mark Christopher Seigle, Kamran Tirdad
  • Publication number: 20160019332
    Abstract: A method includes receiving a design of an interposer having nets, probe pads, and micro-bumps. The nets connect the micro-bumps. The probe pads are initially unconnected to the nets. The method further includes initializing a first set to logically include the nets; processing the first set such that every net interconnecting more than two micro-bumps is divided into a plurality of nets and every two micro-bumps are interconnected by one net; calculating an untested length for each net in the first set; selecting a net N from the first set wherein the net N has the maximum untested length in the first set, the net N representing at least a portion of a net P of the nets; selecting a pair of probe pads that are unconnected to the nets; and connecting the pair of probe pads to the net P by two dummy nets.
    Type: Application
    Filed: September 29, 2015
    Publication date: January 21, 2016
    Inventors: Sandeep Kumar Goel, Ashok Mehta
  • Patent number: 9240961
    Abstract: A bi-directional VLAN bridging path is created on an edge switch in an MVRP environment without administrator intervention using a virtual network profile (VNP) feature running on the edge switch. The VNP feature is configured to detect a device coupled to a port of the edge switch, learn the Medium Access Control (MAC) address of the device on a MVRP-VLAN and automatically convert the MVRP-VLAN to a VNP-Dynamic-VLAN corresponding to a static VLAN to create a bi-directional VLAN Port Association (VPA) for the device.
    Type: Grant
    Filed: March 29, 2013
    Date of Patent: January 19, 2016
    Assignee: Alcatel Lucent
    Inventors: Anil Nagarajan, Sandeep Kumar, Arvind Kubendran, Jagjeet S. Bhatia, Edgard Vargas
  • Publication number: 20160011257
    Abstract: A method of detecting one or more faults in a semiconductor device that includes generating one or more secondary node lists from a primary node list. The primary node list includes one or more nodes. Each node of the one or more nodes of the primary node list is associated with a corresponding secondary node list of the one or more secondary node lists. The method also includes generating a test pattern set from the secondary node list and a fault list. The fault list identifies one or more faults.
    Type: Application
    Filed: July 10, 2014
    Publication date: January 14, 2016
    Inventor: Sandeep Kumar GOEL
  • Patent number: 9222983
    Abstract: A monolithic stacked integrated circuit (IC) is provided with a known-good-layer (KGL) test circuit and a scan segment in one of its layers. The test circuit includes a plurality of inputs, outputs, and multiplexers coupled to the scan segment and to a second layer of the IC. The test circuit further includes a plurality of control elements such that scan testing of the IC may be conducted on a layer-by-layer basis.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: December 29, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Sandeep Kumar Goel
  • Publication number: 20150355277
    Abstract: A monolithic stacked integrated circuit (IC) is provided with a known-good-layer (KGL) test circuit. The KGL test circuit includes a scan segment, and a plurality of inputs, outputs, and multiplexers coupled to the scan segment. The KGL test circuit further includes a plurality of control elements such that scan testing of the stacked IC may be conducted on a layer-by-layer basis.
    Type: Application
    Filed: August 17, 2015
    Publication date: December 10, 2015
    Inventors: Sandeep Kumar Goel, Ashok Mehta
  • Publication number: 20150347664
    Abstract: A method of detecting one or more faults in a semiconductor device that includes generating a first test pattern set from a primary node list and a fault list. The primary node list includes one or more nodes and the fault list identifies one or more faults. The method also includes generating one or more secondary node lists from the primary node list and generating a second test pattern set from at least the first test pattern set and the secondary node list. Each node of the one or more nodes of the primary node list is associated with a corresponding secondary node list of the one or more secondary node lists.
    Type: Application
    Filed: May 30, 2014
    Publication date: December 3, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Sandeep Kumar GOEL, Yuan-Han LEE
  • Patent number: 9194913
    Abstract: A circuit includes a plurality of scan chains each including a plurality of scan blocks. Each scan block includes a storage element and a switching device having an output directly coupled to an input of the storage element. The switching device has a first input configured to receive an output of a storage element in a different scan chain from the scan chain in which the switching device is disposed and a second input configured to receive one of a function logic output signal or a scan input signal. The switching device is configured to selectively couple the first input or the second input to the input of the storage element.
    Type: Grant
    Filed: September 23, 2013
    Date of Patent: November 24, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Sandeep Kumar Goel