Abstract: A semiconductor package and a method for fabricating the same are provided. The semiconductor package includes a first semiconductor chip which includes a first region, a second region, and a boundary region between the first region and the second region; and a second semiconductor chip disposed on the first semiconductor chip, wherein the second semiconductor chip is overlapping the first region and a part of the boundary region, and not overlapping the second region, wherein a first circuit element is disposed in the first region and a second circuit element is disposed in the boundary region, and wherein second circuit element stress tolerance is greater than first circuit element stress tolerance.

Abstract: Systems, methods, and apparatus are provided for enabling orientation of directional antennas even when one or more of the directional antennas are moving. Position information for each directional antenna is transmitted using an omnidirectional antenna transmitting at a low bandwidth and a low power. The position information of the directional antennas is used to orient the directional antennas so that a high bandwidth, low power wireless connection can be enabled and/or maintained between the directional antennas. The position information is periodically transmitted and the orientation of the directional antennas is updated as one or more of the directional antennas move so that the wireless connection between the directional antennas is maintained.

Abstract: The present invention relates to a polypeptide derived from CAP1 and a pharmaceutical composition comprising the same as an effective ingredient and, more particularly, to a peptide including the amino acid sequence of SEQ ID NO: 1, any 0 to 20 amino acid residues added to the N terminus thereof, and any 0 to 75 amino acid residues added to the C terminus thereof, and a pharmaceutical composition comprising the peptide as an effective ingredient for the prevention and alleviation of inflammatory diseases, the inhibition of cancer and cancer metastasis, the prevention and alleviation of diabetes, the prevention and alleviation of arteriosclerosis or cardiovascular diseases, and the prevention and alleviation of heart failure.

Abstract: A semiconductor package and a method for fabricating the same are provided. The semiconductor package includes a first semiconductor chip which includes a first region, a second region, and a boundary region between the first region and the second region; and a second semiconductor chip disposed on the first semiconductor chip, wherein the second semiconductor chip is overlapping the first region and a part of the boundary region, and not overlapping the second region, wherein a first circuit element is disposed in the first region and a second circuit element is disposed in the boundary region, and wherein second circuit element stress tolerance is greater than first circuit element stress tolerance.

Abstract: A semiconductor package and a method for fabricating the same are provided. The semiconductor package includes a first semiconductor chip which includes a first region, a second region, and a boundary region between the first region and the second region; and a second semiconductor chip disposed on the first semiconductor chip, wherein the second semiconductor chip is overlapping the first region and a part of the boundary region, and not overlapping the second region, wherein a first circuit element is disposed in the first region and a second circuit element is disposed in the boundary region, and wherein second circuit element stress tolerance is greater than first circuit element stress tolerance.

Abstract: A stacked semiconductor package includes a first semiconductor chip having a first active surface over which first bonding pads including peripheral bonding pads and central bonding pads are arranged, a first encapsulation member, two second semiconductor chips having second active surfaces over which second bonding pads are arranged at one side peripheries and disposed to be separated from each other such that the second active surfaces face the first active surface and the second bonding pads overlap with the peripheral bonding pads, first coupling members interposed between the peripheral bonding pads and the second bonding pads, a second encapsulation member formed over second side surfaces of the second semiconductor chips including a region between the second semiconductor chips, and a mold via formed through a portion of the second encapsulation member in the region between the second semiconductor chips and coupled with the central bonding pads.

Abstract: Network hardware devices organized in a wireless mesh network (WMN) in which a home access node (HAN) device that includes a first set of radios, each of the first set of radios being coupled to a beam-steering antenna and each of the first set of radios establishing a first point-to-point (PtP) wireless connection over which the HAN relay device communicates with a second HAN relay device in a first sub-mesh network of HAN relay devices. The HAN device also includes a second set of radios, each of the second set of radios being coupled to a beam-steering antenna and each of the second set of radios establishing a second PtP wireless connection over which the HAN relay device communicates with at least one of a plurality of HAN devices in a second sub-mesh network in the WMN.

Abstract: A stacked semiconductor package includes a first semiconductor chip having a first active surface over which first bonding pads including peripheral bonding pads and central bonding pads are arranged, a first encapsulation member, two second semiconductor chips having second active surfaces over which second bonding pads are arranged at one side peripheries and disposed to be separated from each other such that the second active surfaces face the first active surface and the second bonding pads overlap with the peripheral bonding pads, first coupling members interposed between the peripheral bonding pads and the second bonding pads, a second encapsulation member formed over second side surfaces of the second semiconductor chips including a region between the second semiconductor chips, and a mold via formed through a portion of the second encapsulation member in the region between the second semiconductor chips and coupled with the central bonding pads.

Abstract: Disclosed herein is a pattern safety device for preventing interference between patterns. In detail, a separately partitioned space is defined in an adhesion portion, which is formed on a plurality of patterns on the surface of a substrate so that a circuit element is placed on the adhesion portion, thus preventing interference between the patterns.

Abstract: Provided is a display apparatus. The display apparatus includes a display panel, a light source configured to generate light to be supplied to the display panel, and a reflecting member disposed behind the display panel and formed of a white foam resin to diffuse and reflect light generated from the light source.

Abstract: The present invention relates to an aerogel composite and a preparation method thereof. The preparation method of the aerogel composite of the present invention comprises the following steps; preparing a hydrophobic gel (step 1); dispersing fiber in a solvent to prepare a solution (step 2); adding the hydrophobic gel above in the solution of step 2 and stirring the mixture to prepare a fiber and hydrophobic gel mixed solution (step 3); separating floc from the mixed solution of step 3 (step 4); and drying the floc (step 5). According to the preparation method of the aerogel composite of the present invention, a high performance aerogel composite having various shapes can be prepared.

Abstract: Systems, methods, and apparatus are provided for enabling orientation of directional antennas even when one or more of the directional antennas are moving. Position information for each directional antenna is transmitted using an omnidirectional antenna transmitting at a low bandwidth and a low power. The position information of the directional antennas is used to orient the directional antennas so that a high bandwidth, low power wireless connection can be enabled and/or maintained between the directional antennas. The position information is periodically transmitted and the orientation of the directional antennas is updated as one or more of the directional antennas move so that the wireless connection between the directional antennas is maintained.

Abstract: A semiconductor package and a method for fabricating the same are provided. The semiconductor package includes a first semiconductor chip which includes a first region, a second region, and a boundary region between the first region and the second region; and a second semiconductor chip disposed on the first semiconductor chip, wherein the second semiconductor chip is overlapping the first region and a part of the boundary region, and not overlapping the second region, wherein a first circuit element is disposed in the first region and a second circuit element is disposed in the boundary region, and wherein second circuit element stress tolerance is greater than first circuit element stress tolerance.

Abstract: A stacked semiconductor package includes a first semiconductor chip having a first active surface over which first bonding pads including peripheral bonding pads and central bonding pads are arranged, a first encapsulation member, two second semiconductor chips having second active surfaces over which second bonding pads are arranged at one side peripheries and disposed to be separated from each other such that the second active surfaces face the first active surface and the second bonding pads overlap with the peripheral bonding pads, first coupling members interposed between the peripheral bonding pads and the second bonding pads, a second encapsulation member formed over second side surfaces of the second semiconductor chips including a region between the second semiconductor chips, and a mold via formed through a portion of the second encapsulation member in the region between the second semiconductor chips and coupled with the central bonding pads.

Abstract: A method of managing delivery of a group of packages to a customer delivery address. A radio transceiver establishes a communication link between a tag and a computing device. The tag is associated with a package, the package being among a group of packages to be delivered to the customer delivery address. A radio signal is received at the computing device over the link. The radio signal is representative of tracking information associated with the package, the tracking information includes a unique package code and a unique group identification code. The signal strength of the radio signal is determined. The computing device determines that the package associated with the tag belongs with the group of packages based at least in part on proximity of the tag relative to the computing device and a unique group identification code associated with the customer delivery address.

Abstract: A semiconductor device may include a bottom package embedded with a first semiconductor chip. The semiconductor device may include a middle package stacked over the bottom package, and embedded with at least two second semiconductor chips in a fan-out structure. The semiconductor device may include a top package stacked over the middle package, and embedded with at least two third semiconductor chips.

Abstract: An electronic device which has a self diagnosis function and a self diagnosis method using the same are provided. The electronic device includes: an interface which receives a user's selection signal for a hardware of an object to be diagnosed; and a controller which provides a plurality of lines connected to the hardware of the object to be diagnosed with a signal for diagnosis according to the selection signal which is received through the interface and calculates a diagnosis result for the hardware of diagnosis object according to a comparison result of the signal for diagnosis with a return signal which is returned from the hardware of the object to be diagnosed by a loop-back.

Abstract: A semiconductor chip may include a semiconductor substrate having a front surface and a rear surface which faces away from the front surface. The semiconductor chip may include a fixed metal layer formed over the front surface of the semiconductor substrate, and having first metal lines formed in the fixed metal layer. The semiconductor chip may include a configurable metal layer formed over the fixed metal layer to have one surface which faces the fixed metal layer and the other surface which faces away from the one surface, and having second metal lines formed in the configurable metal layer such that at least one end of the second metal lines disposed on the one surface are respectively connected with the first metal lines and other ends of the second metal lines facing away from the at least one end are disposed at predetermined positions on the other surface.

Abstract: In accordance with one aspect of the present disclosure, an ultrasound imaging apparatus comprising: a display portion configured to display an ultrasonic image of a heart of an object; an input portion configured to receive a command for setting a region of interest (ROI) of the displayed ultrasonic image of the heart; and a controller configured to set the ROI of the ultrasonic image of the heart based on the command for setting the ROI input through the input portion and control at least one image of the set ROI and the ultrasonic image of the heart to be displayed together on the display portion.

Abstract: A semiconductor package may be provided. The semiconductor package may include a substrate. The semiconductor package may include a first semiconductor chip flip-chip bonded to a first surface of the substrate. The semiconductor package may include second semiconductor chips respectively flip-chip bonded to portions of the first surface of the substrate adjacent to both ends of the first semiconductor chip. The semiconductor package may include a third semiconductor chip solder-jointed to the first surface of the substrate covering the first semiconductor chip and portions of the second semiconductor chips.