Abstract: The present invention relates to an aerogel composite and a preparation method thereof. The preparation method of the aerogel composite of the present invention comprises the following steps; preparing a hydrophobic gel (step 1); dispersing fiber in a solvent to prepare a solution (step 2); adding the hydrophobic gel above in the solution of step 2 and stirring the mixture to prepare a fiber and hydrophobic gel mixed solution (step 3); separating floc from the mixed solution of step 3 (step 4); and drying the floc (step 5). According to the preparation method of the aerogel composite of the present invention, a high performance aerogel composite having various shapes can be prepared.

Abstract: The present invention concerns a human resistin receptor. More particularly, the present invention provides a method for screening a receptor of human resistin protein, a method for preventing or treating an inflammatory disease and arteriosclerosis using an expression- or activity-regulator for a human resistin receptor, and a pharmaceutical composition including an expression- or activity-regulator for the human resistin receptor. The method for screening a human resistin protein receptor according to the present invention enables separation of a receptor which directly binds to resistin from human monocyte, reveals a mechanism of signal transduction of the resistin receptor, and therefore, is expected to contribute to regulation of an inflammatory effect of monocyte, molecular detection of causes for vascular inflammation and arteriosclerosis, and developments of prevention and a treating agent for an inflammatory disease and arteriosclerosis.

Abstract: Provided are an ultrasound diagnosis apparatus and a method of operating the same, which are capable of providing a guide for improving quality of an ultrasound image according to a relative position between a transducer and an object. The ultrasound diagnosis apparatus includes: a probe configured to transmit ultrasound signals to an object and receive ultrasound echo signals reflected from the object; a display configured to display a state of contact between the object and the probe; and a processor configured to determine, based on the ultrasound echo signals, whether the probe is brought into contact with the object and the state of contact between the object and the probe, and to control the display to display an indicator indicating a result of the determining.

Abstract: A display apparatus includes a communication interface connected with a source device, a display that displays a video signal received from the source device, and a processor that establishes connection for receiving the video signal. The processor synchronizes a clock of the display apparatus with a clock of the source device such that the connection is established and executes calibration for the video signal, when detecting an error occurring as the clock of the display apparatus fails to be synchronized.

Abstract: A display apparatus is provided. The display apparatus includes a liquid crystal display panel configured to display an image; a backlight unit located at the rear of the liquid crystal display panel, and including a plurality of light sources; a bottom chassis in which the backlight unit is positioned; and a reflector located in the bottom chassis, and configured to forwardly reflect light emitted from the plurality of light sources toward the liquid crystal display panel; and a reflection angle adjuster located in each corner of the reflector, and configured to reflect light emitted from the plurality of light sources in order to cause the reflected light to be incident toward corner areas of the liquid crystal display panel.

Abstract: A semiconductor device may include a bottom package embedded with a first semiconductor chip. The semiconductor device may include a middle package stacked over the bottom package, and embedded with at least two second semiconductor chips in a fan-out structure. The semiconductor device may include a top package stacked over the middle package, and embedded with at least two third semiconductor chips.

Abstract: Systems, methods, and computer-readable media are disclosed for optimizing power consumption for smart electronic tracking tags. Example methods may include determining a destination address for a package, determining a shipping timeline for the package, the shipping timeline having a first segment and a second segment, and determining a transmission profile with a first frequency of package information data transmissions during the first segment and a second frequency of package information data transmissions during the second segment. Example methods may include sending the transmission profile to an electronic shipping tag associated with the package.

Abstract: The present disclosure provides a semiconductor chip including a semiconductor substrate having a front surface and a rear surface which faces away from the front surface. The semiconductor chip includes a fixed metal layer formed over the front surface of the semiconductor substrate, and having first metal lines formed in the fixed metal layer. The semiconductor chip includes a configurable metal layer formed over the fixed metal layer to have one surface which faces the fixed metal layer and the other surface which faces away from the one surface, and having second metal lines formed in the configurable metal layer such that at least one end of the second metal lines disposed on the one surface are respectively connected with the first metal lines and other ends of the second metal lines facing away from the at least one end are disposed at predetermined positions on the other surface.

Abstract: A semiconductor device may include a bottom package embedded with a first semiconductor chip. The semiconductor device may include a middle package stacked over the bottom package, and embedded with at least two second semiconductor chips in a fan-out structure. The semiconductor device may include a top package stacked over the middle package, and embedded with at least two third semiconductor chips.

Abstract: A semiconductor package may include a first semiconductor chip having a plurality of first bonding pads arranged at a first pitch on a first active surface. The semiconductor package may include one or more reconfigurable package units each including a second semiconductor chip having a plurality of second bonding pads arranged at a second pitch on a second active surface; a semiconductor chip connector arranged spaced apart from the second semiconductor chip and having a plurality of through vias arranged at the first pitch; a molding layer surrounding side surfaces of the second semiconductor chip and the semiconductor chip connector; and redistribution lines formed over the second semiconductor chip, the semiconductor chip connector, and the molding layer.

Abstract: A semiconductor package may include first semiconductor chips disposed in a rotationally symmetrical structure. First bonding pads are arranged over the bottom surfaces of the first semiconductor chips. The semiconductor package may also include a first encapsulation member formed to surround at least side surfaces of the first semiconductor chips. The semiconductor package may also include via patterns formed in the first encapsulation member. The semiconductor package may also include second semiconductor chips stacked over top surfaces of the first semiconductor chips and the first encapsulation member including the via patterns in such a way as to form step shapes with the first semiconductor chips. Second bonding pads electrically connected to the via patterns are arranged over bottom surfaces of the second semiconductor chips.

Abstract: Provided is a display apparatus. The display apparatus includes a display panel, a light source configured to generate light to be supplied to the display panel, and a reflecting member disposed behind the display panel and formed of a white foam resin to diffuse and reflect light generated from the light source.

Abstract: A data processing device includes a controller. The controller includes a compression circuit configured to compare a plurality of data groups, each of which has a first burst length and is transmitted in units of an input/output width, with a predetermined pattern, and perform data compression on the data groups based on a result of comparison. The controller further includes a compression data restructuring circuit configured to generate a transmission data group by restructuring the compressed data group to have a second burst length.

Abstract: A memory device includes a plurality of channels that respectively include memory cell arrays and local input/output lines electrically coupled to the memory cell arrays and are independently operable, shared global input/output lines electrically coupled to the local input/output lines included in the plurality of channels and having a connection relation controlled through one or more path switch circuits arranged among the plurality of channels, and the path switch circuits that control the connection relation of the shared global input/output lines according to a path control signal.

Abstract: A semiconductor package may be provided. The semiconductor package may include a substrate. The semiconductor package may include a first semiconductor chip flip-chip bonded to a first surface of the substrate. The semiconductor package may include second semiconductor chips respectively flip-chip bonded to portions of the first surface of the substrate adjacent to both ends of the first semiconductor chip. The semiconductor package may include a third semiconductor chip solder-jointed to the first surface of the substrate covering the first semiconductor chip and portions of the second semiconductor chips.

Abstract: A memory device includes a plurality of channels that respectively include memory cell arrays and local input/output lines electrically coupled to the memory cell arrays and are independently operable, shared global input/output lines electrically coupled to the local input/output lines included in the plurality of channels and having a connection relation controlled through one or more path switch circuits arranged among the plurality of channels, and the path switch circuits that control the connection relation of the shared global input/output lines according to a path control signal.

Abstract: Systems, methods, and apparatus are provided for enabling orientation of directional antennas even when one or more of the directional antennas are moving. Position information for each directional antenna is transmitted using an omnidirectional antenna transmitting at a low bandwidth and a low power. The position information of the directional antennas is used to orient the directional antennas so that a high bandwidth, low power wireless connection can be enabled and/or maintained between the directional antennas. The position information is periodically transmitted and the orientation of the directional antennas is updated as one or more of the directional antennas move so that the wireless connection between the directional antennas is maintained.