Patents by Inventor Sang-jun Choi

Sang-jun Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7507958
    Abstract: A conductive carbon nanotube tip and a manufacturing method thereof are provided. The conductive carbon nanotube tip includes a carbon nanotube tip substantially vertically placed on a substrate, and a ruthenium coating layer covering a surface of the carbon nanotube tip and extending to at least a part of the substrate. The manufacturing method includes substantially vertically placing a carbon nanotube tip on a substrate, and forming a ruthenium coating layer on the carbon nanotube tip and at least a part of the substrate.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: March 24, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-jun Choi, Jung-hyun Lee, Sang-bong Bang, Bum-seok Seo, Chang-soo Lee
  • Publication number: 20090023265
    Abstract: Provided are an anionic surfactant-containing etching solution for removal of an oxide film, preparation methods thereof, and methods of fabricating a semiconductor device using the etching solution. The etching solution includes a hydrofluoric acid (HF), deionized water, and an anionic surfactant. The anionic surfactant is a compound in which an anime salt is added as a counter ion, as represented by R1—OSO3?HA+, R1—CO2?HA+,R1—PO42—(HA+)2,(R1)2—PO4—HA+, or R1—SO3—HA+ where R1 is a straight or branched hydrocarbon group of C4 to C22 and A is ammonia or amine. The etching solution provides a high etching selectivity ratio of an oxide film to a nitride film or a polysilicon film. Therefore, in a semiconductor device fabrication process such as a STI device isolation process or a capacitor formation process, when an oxide film is exposed together with a nitride film or a polysilicon film, the etching solution can be efficiently used in selectively removing only the oxide film.
    Type: Application
    Filed: October 1, 2008
    Publication date: January 22, 2009
    Inventors: CHANG-SUP MUN, Hyung-Ho Ko, Woo-Gwan Shim, Chang-Ki Hong, Sang-Jun Choi
  • Publication number: 20080314868
    Abstract: The present invention provides etchant solutions including deionized water and an organic acid having a carboxyl radical and a hydroxyl radical. Methods of forming magnetic memory devices are also disclosed.
    Type: Application
    Filed: August 28, 2008
    Publication date: December 25, 2008
    Inventors: Yu-Kyung Kim, Chang-Ki Hong, Sang-Jun Choi, Jeong-Nam Han
  • Patent number: 7468235
    Abstract: Provided are a barrier coating composition and a method of forming photoresist pattern by an immersion photolithography process using the same. The barrier coating composition includes a polymer corresponding to formula I having a weight average molecular weight (Mw) of 5,000 to 100,000 daltons and an organic solvent, wherein the expressions 1+m+n=1; 0.1?1/(1+m+n)?0.7; 0.3?m/(1+m+n)?0.9; and 0.0?n/(1+m+n)?0.6 are satisfied; Rf is a C1 to C5 fluorine-substituted hydrocarbon group; and Z, if present, includes at least one hydrophilic group. Compositions according to the invention may be used to form barrier layers on photoresist layers to suppress dissolution of photoresist components during immersion photolithography while allowing the barrier layer to be removed by alkaline developing solutions.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: December 23, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mitsuhiro Hata, Sang-Jun Choi, Man-Hyoung Ryoo
  • Publication number: 20080309234
    Abstract: An alternating current driving type quantum dot electroluminescent device includes; a first electrode, a second electrode, a quantum dot light-emitting layer disposed between the first electrode and the second electrode, and at least one layer selected from the group consisting of a tunneling layer, a bipolar layer, a dielectric layer, an insulating layer, and a combination of layers thereof, disposed between at least one of the first electrode and the quantum dot light-emitting layer, and the second electrode and the quantum dot light-emitting layer.
    Type: Application
    Filed: October 31, 2007
    Publication date: December 18, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: KYUNG SANG CHO, BYOUNG LYONG CHOI, SANG JUN CHOI, EUN KYUNG LEE
  • Patent number: 7459370
    Abstract: In one aspect, a method of fabricating a semiconductor memory device is provided which includes forming a mold insulating film over first and second portions of a semiconductor substrate, where the mold insulating film includes a plurality of storage node electrode holes spaced apart over the first portion of the semiconductor substrate. The method further includes forming a plurality of storage node electrodes on inner surfaces of the storage node electrode holes, respectively, and forming a capping film which covers the storage node electrodes and a first portion of the mold insulating film located over the first portion of the semiconductor substrate, and which exposes a second portion of the mold insulating film located over the second portion of the semiconductor substrate.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: December 2, 2008
    Assignee: Samsung Electronics Co., ltd.
    Inventors: Dae-hyuk Kang, Jung-min Oh, Chang-ki Hong, Sang-jun Choi, Woo-gwan Shim
  • Patent number: 7443863
    Abstract: A cell switching method and system are disclosed that divide an input ATM cell into ATM adaptation layer (AAL) 2-type common part sublayer (CPS) packets. The divided CPS packets are stored in different first storage areas, in accordance with virtual paths/virtual channels (VPs/VCs) of the respective CPS packets, and identifiers of the first storage areas are also stored. The stored CPS packets are read in the order of the stored first identifiers. Thereafter, the read CPS packets are stored in second storage areas, in accordance with respective CIDs, and second identifiers of the second storage areas are stored. The CPS packets stored in the second storage areas are read in the order of the stored second identifiers and multiplexed to generate ATM cells.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: October 28, 2008
    Assignee: LG Nortel Co., Ltd.
    Inventor: Sang Jun Choi
  • Patent number: 7435678
    Abstract: Provided is a method of depositing a noble metal layer using an oxidation-reduction reaction. The method includes flowing a noble metal source gas, an oxidizing gas, and a reducing gas into a reaction chamber; and generating plasma in the reaction chamber to form a noble metal layer or a noble metal oxide layer on a bottom structure.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: October 14, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-hyun Lee, Sang-jun Choi
  • Patent number: 7435301
    Abstract: Disclosed are a cleaning solution for preventing damage of a silicon germanium layer when cleaning a semiconductor device including the silicon germanium layer and a cleaning method using the same. The cleaning solution of a silicon germanium layer includes from about 0.01 to about 2.5 percent by weight of a non-ionic surfactant with respect to 100 percent by weight of the cleaning solution, about 0.05 to about 5.0 percent by weight of an alkaline compound with respect to the cleaning solution and a remaining amount of pure water. The damage to an exposed silicon germanium layer can be prevented when cleaning a silicon substrate having a silicon germanium layer. Impurities present on the surface portion of the silicon germanium layer can be effectively removed.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: October 14, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Sup Mun, Doo-Won Kwon, Hyung-Ho Ko, Chang-Ki Hong, Sang-Jun Choi
  • Patent number: 7435644
    Abstract: Provided is a method of manufacturing a capacitor of a semiconductor device, which can prevent tilting or an electrical short of a lower electrode. In the method, a mesh-type bridge insulating layer is formed above the contact plug on a mold oxide layer. The mold oxide layer and the bridge insulating layer are etched to define an electrode region. The mold oxide layer is removed using an etching gas having an etch selectivity of 500 or greater for the mold oxide layer with respect to the bridge insulating layer.
    Type: Grant
    Filed: January 11, 2006
    Date of Patent: October 14, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-Gwan Shim, Jung-Min Oh, Chang-Ki Hong, Sang-Jun Choi, Sang-Yong Kim
  • Publication number: 20080199719
    Abstract: Provided is a data recording medium having improved data recording/storage characteristics and with an improved structure to have a higher data storage capacity, and a method of recording and/or easing data using the same. The data recording medium may include a Cu electrode layer on a substrate, and a data recording layer formed of a compound including a metal and at least one non-metal selected from the group consisting of S, Se, and Te, on the Cu electrode layer. Data is recordable to or erasable from the data recording layer by changing the resistance of the data recording layer by diffusing Cu ions from the Cu electrode layer to the data recording layer or by erasing Cu ions from the data recording layer by diffusing Cu ions from the data recording layer back to the Cu electrode layer, according to a voltage pulse applied to the data recording layer.
    Type: Application
    Filed: November 20, 2007
    Publication date: August 21, 2008
    Inventors: Jung-hyun Lee, Sang-jun Choi, Hyung-Jin Bae, Young-ju Kim
  • Publication number: 20080169459
    Abstract: Provided are a resistive random access memory device and a method of manufacturing the same. The resistive random access memory device includes a switching device and a storage node connected to the switching device, and the storage node includes a first electrode and a second electrode and a resistance change layer formed of Cu2-XO between the first electrode and the second electrode.
    Type: Application
    Filed: December 20, 2007
    Publication date: July 17, 2008
    Inventors: Sang-jun Choi, Jung-hyun Lee, Hyung-jin Bae, Chang-soo Lee
  • Publication number: 20080169118
    Abstract: Provided are a wire structure and a semiconductor device having the wire structure. The wire structure includes a first wire that has a first region having a width of several to tens of nanometers and a second region having a width wider than that of the first region.
    Type: Application
    Filed: December 27, 2007
    Publication date: July 17, 2008
    Inventors: Sang-jun Choi, Jung-hyun Lee, Hyung-jin Bae, Chang-soo Lee
  • Publication number: 20080170427
    Abstract: Example embodiments may provide resistive random access memory devices and/or methods of manufacturing resistive random access memory devices. Example embodiment resistive random access memory devices may include a switching device and/or a storage node connected to the switching device. The storage node may include a stack structure including a plurality of resistance change layers separated from one another and first and second electrodes each on a side wall of the stack structure. The resistance change layers may be connected to the first and the second electrodes in parallel and/or may have different switching voltages from each other.
    Type: Application
    Filed: December 20, 2007
    Publication date: July 17, 2008
    Inventors: Sang-jun Choi, Jung-hyun Lee, Chang -soo Lee
  • Publication number: 20080167200
    Abstract: The present invention provides a biochip kit including a first housing; a biochip disposed inside the first housing and configured to include a plurality of molecular probes; and a second housing joined to the first housing and configured to form a reaction space with the first housing and to cover the biochip, wherein the second housing and the first housing are removably joined in a configuration to allow exposure of an upper surface of the biochip. Methods of testing biological samples using the biochip kits are also provided.
    Type: Application
    Filed: December 19, 2007
    Publication date: July 10, 2008
    Inventors: Jung-hwan Hah, Sung-min Chi, Kyoung-seon Kim, Won-sun Kim, Sang-jun Choi
  • Publication number: 20080157055
    Abstract: Provided is a resistive random access memory (RRAM) device having a switching device and a storage node connected to the switching device, the storage node including a first electrode formed of a metal compound, the metal compound including metal with no more than a divalence and a metal compound having anions, a solid electrolyte layer formed on the first electrode, and a second electrode formed on the solid electrolyte layer.
    Type: Application
    Filed: November 9, 2007
    Publication date: July 3, 2008
    Inventors: Jung-hyun Lee, Hyung-jin Bae, Sang-jun Choi
  • Publication number: 20080113876
    Abstract: A probe array includes a substrate having at least two projecting features adjacent to one another, each feature including a top surface and a side surface, an isolation region separating the at least two features, at least two active regions, the at least two active regions including the top surfaces of the at least two features, and an inactive region separating the at least two active regions, the inactive region including the isolation region.
    Type: Application
    Filed: August 13, 2007
    Publication date: May 15, 2008
    Inventors: Won-sun Kim, Sung-min Chi, Jung-hwan Hah, Kyoung-seon Kim, Sang-jun Choi, Man-hyoung Ryoo
  • Publication number: 20080113300
    Abstract: A coating composition for forming etch mask patterns may include a polymer and an organic solvent. The polymer may have an aromatic ring substituted by a vinyl ether functional group. The polymer may be, for example, a Novolak resin partially substituted by a vinyl ether functional group or poly(hydroxystyrene) partially substituted by a vinyl ether functional group.
    Type: Application
    Filed: April 5, 2006
    Publication date: May 15, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-jun Choi, Mitsuhiro Hata, Man-hyoung Ryoo, Jung-hwan Hah
  • Publication number: 20080094455
    Abstract: An inkjet printhead heater including a plurality of unit heater layers each including a first nitride layer and a second nitride layer stacked on the first nitride layer, and an inkjet printhead including the heater, and a method of manufacturing an inkjet printhead heater including stacking a plurality of unit heater layers, each including a substrate having a first nitride layer and a second nitride layer stacked on the first nitride layer.
    Type: Application
    Filed: May 1, 2007
    Publication date: April 24, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung-hyun LEE, Sang-jun Choi, Hyung-jin Bae, Chan-bong Jun
  • Patent number: 7361612
    Abstract: Provided are example embodiments of the invention including a range of polymer structures suitable for incorporation in barrier compositions for use, for example, in immersion photolithography in combination with a suitable solvent or solvent system. These polymers exhibit a weight average molecular weight (Mw) of 5,000 to 200,000 daltons and may be generally represented by formula I: wherein the expressions (1+m+n)=1; 0.1?(1/(1+m+n))?0.7; 0.3?(m/(1+m+n))?0.9; and 0.0?(n/(1+m+n))?0.6 are satisfied; R1, R2 and R3 are C1 to C5 alkyl, C1 to C5 alkoxy and hydroxyl groups; and Z represents an alkene that includes at least one hydrophilic group. Barrier coating compositions will include an organic solvent or solvent system selected from C3 to C10 alcohol-based organic solvents, C4 to C12 alkane-based organic solvents and mixtures thereof.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: April 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jun Choi, Mitsuhiro Hata, Han-Ku Cho