Abstract: A position control apparatus detects currents of processing object phases which flow through the three-phase AC motor, applies offset compensation processing to current detected values of the processing object phases based on offset compensation amounts, and controls the three-phase AC motor based on the current detected values of the processing object phases after the offset compensation processing. Processing of obtaining the offset compensation amounts includes processing of obtaining a Fourier coefficient of a frequency component of a torque ripple based on a torque command value signal, processing of obtaining torque amplitude components of the processing object phases, and processing of obtaining the offset compensation amounts with respect to the processing object phases based on the torque amplitude components of the processing object phases.

Abstract: A drift layer is formed over a semiconductor substrate which is an SiC substrate. The drift layer includes first to third n-type semiconductor layers and a p-type impurity region. Herein, an impurity concentration of the second n-type semiconductor layer is higher than an impurity concentration of the first n-type semiconductor layer and an impurity concentration of the third n-type semiconductor layer. Also, in plan view, the second semiconductor layer located between the p-type impurity regions adjacent to each other overlaps with at least a part of a gate electrode formed in a trench.

Abstract: A torque ripple and a position error caused by an offset error of the current sensor affects an electrical angle frequency of a motor. In an apparatus of the present disclosure, a computation device executes a power spectrum computing process when a three-phase alternating current motor is at a constant speed, and a value obtained by subtracting a position command value from a position detected by a position detector is fast Fourier transformed, to compute a power spectrum of a position error signal at the electrical angle frequency. Then, the computation device executes an offset correction computing process, to evaluate the power spectrum and to update an offset correction amount. By repeatedly executing these processes when the three-phase alternating current motor is driven at a constant speed, the torque ripple and position error caused by the offset error are reduced.

Abstract: To improve characteristics of a semiconductor device. A first p-type semiconductor region having an impurity of a conductivity type opposite from that of a drift layer is arranged in the drift layer below a trench, and a second p-type semiconductor region is further arranged that is spaced at a distance from a region where the trench is formed as seen from above and that has the impurity of the conductivity type opposite from that of the drift layer. The second p-type semiconductor region is configured by a plurality of regions arranged at a space in a Y direction (depth direction in the drawings). Thus, it is possible to reduce the specific on-resistance while maintaining the breakdown voltage of the gate insulating film by providing the first and second p-type semiconductor regions and further by arranging the second p-type semiconductor region spaced by the space.

Abstract: A position control device includes a subtracter for subtracting a q-axis current detection value iq from a q-axis current command value iq* to output a q-axis current error ?iq, an adder for adding a q-axis current compensation amount iqc* for compensating for response timing of q-axis current to the q-axis current error ?iq, a q-axis current controller for amplifying an output of the adder by I-P control to calculate a q-axis voltage error ?vq and calculating a q-axis voltage command value vq* on the basis of the q-axis voltage error ?vq, and a second adder for adding a q-axis voltage feedforward amount vqf corresponding to a time derivative value s·iq of the q-axis current to the q-axis voltage command value vq* to calculate a final q-axis voltage command value.

Abstract: In a vertical power MOSFET having a superjunction structure, the withstand voltage of the power MOSFET can be ensured even if the aspect ratios of an n-type column region and a p-type column region are increased so as to vary the impurity concentration of the p-type column region. P-type semiconductor regions PR1 are formed on the sides of an n-type column NC1 adjacent to a p-type column region PC1. In this configuration, the p-type semiconductor region PR1 is formed from the upper end of the n-type column region NC1 to about a half depth of a height from the upper end to the lower end of the side of the n-type column region NC1. This inclines the sides of the overall p-type column region including the p-type semiconductor regions PR1 and the p-type column region PC1.

Abstract: A controller for a motor determines a voltage limit circle based on a velocity of the motor, a DC bus voltage of an inverter, calculates a q axis current limit value based on the voltage limit circle and a predetermined current limit circle, determines, as a q axis current command value, a value obtained through a limit process which is applied using the q axis current limit value to a q axis current value calculated in accordance with a torque command value, and determines a corresponding d axis current value based on the q axis current command value.

Abstract: An aspect of the present invention allows a natural, humanlike conversation to be carried out between electronic apparatus. The audio adjustment device (1) includes: a sound analyzing section (21) for analyzing a second sound outputted from a second electronic apparatus; and an element adjusting section (24) for adjusting a first element characterizing the first sound, the first element being adjusted on a basis of either a content of a text in the second sound or a second element characterizing the second sound, the content of the text in the second sound and the second element being obtained by analysis by the sound analyzing section (21).

Abstract: A torque ripple and a position error caused by an offset error of the current sensor affects an electrical angle frequency of a motor. In an apparatus of the present disclosure, a computation device executes a power spectrum computing process when a three-phase alternating current motor is at a constant speed, and a value obtained by subtracting a position command value from a position detected by a position detector is fast Fourier transformed, to compute a power spectrum of a position error signal at the electrical angle frequency. Then, the computation device executes an offset correction computing process, to evaluate the power spectrum and to update an offset correction amount. By repeatedly executing these processes when the three-phase alternating current motor is driven at a constant speed, the torque ripple and position error caused by the offset error are reduced.

Abstract: A position control device includes a subtracter for subtracting a q-axis current detection value iq from a q-axis current command value iq* to output a q-axis current error ?iq, an adder for adding a q-axis current compensation amount iqc* for compensating for response timing of q-axis current to the q-axis current error ?iq, a q-axis current controller for amplifying an output of the adder by I-P control to calculate a q-axis voltage error ?vq and calculating a q-axis voltage command value vq* on the basis of the q-axis voltage error ?vq, and a second adder for adding a q-axis voltage feedforward amount vqf corresponding to a time derivative value s·iq of the q-axis current to the q-axis voltage command value vq* to calculate a final q-axis voltage command value.

Abstract: A position control apparatus is provided that can perform accurate nonlinear compensation control immediately after the apparatus is activated. At a time of acceleration, a signal amplification ratio is calculated and designated for each signal vector element based on information related to acceleration/deceleration at a starting time and the structure of a signal vector that is determined for a target plant, and as a result, a signal vector for which the strength of linear independence is increased is generated. Because the strength of the linear independence condition of the signal vector is increased, the speed of convergence of identification for a low-frequency disturbance element, such as a gravitational torque or a sliding-mode load torque, can be increased.

Abstract: A drift layer is formed over a semiconductor substrate which is an SiC substrate. The drift layer includes first to third n-type semiconductor layers and a p-type impurity region. Herein, an impurity concentration of the second n-type semiconductor layer is higher than an impurity concentration of the first n-type semiconductor layer and an impurity concentration of the third n-type semiconductor layer. Also, in plan view, the second semiconductor layer located between the p-type impurity regions adjacent to each other overlaps with at least a part of a gate electrode formed in a trench.

Abstract: A controller for a motor determines a voltage limit circle based on a velocity of the motor, a DC bus voltage of an inverter, calculates a q axis current limit value based on the voltage limit circle and a predetermined current limit circle, determines, as a q axis current command value, a value obtained through a limit process which is applied using the q axis current limit value to a q axis current value calculated in accordance with a torque command value, and determines a corresponding d axis current value based on the q axis current command value.

Abstract: Properties of a semiconductor device are improved. A semiconductor device having a superjunction structure, in which p-type column regions and n-type column regions are periodically arranged, is configured as follows. Each n-type column region has a vertical section including an n-type epitaxial layer located between trenches and a tapered embedded n-type epitaxial film disposed on a side face of the trench. Each p-type column region includes an embedded p-type epitaxial film disposed within the trench. The tapered embedded n-type epitaxial film is thus provided on the sidewall of the trench in which the p-type column region is to be disposed, thereby the p-type column region is allowed to have an inverted trapezoidal shape, leading to an increase in margin for a variation in concentration of a p-type impurity in the p-type column region. On resistance can be reduced by lateral diffusion of an n-type impurity (for example, As).

Abstract: In a vertical power MOSFET having a superjunction structure, the withstand voltage of the power MOSFET can be ensured even if the aspect ratios of an n-type column region and a p-type column region are increased so as to vary the impurity concentration of the p-type column region. P-type semiconductor regions PR1 are formed on the sides of an n-type column NC1 adjacent to a p-type column region PC1. In this configuration, the p-type semiconductor region PR1 is formed from the upper end of the n-type column region NC1 to about a half depth of a height from the upper end to the lower end of the side of the n-type column region NC1. This inclines the sides of the overall p-type column region including the p-type semiconductor regions PR1 and the p-type column region PC1.

Abstract: To improve characteristics of a semiconductor device. A first p-type semiconductor region having an impurity of a conductivity type opposite from that of a drift layer is arranged in the drift layer below a trench, and a second p-type semiconductor region is further arranged that is spaced at a distance from a region where the trench is formed as seen from above and that has the impurity of the conductivity type opposite from that of the drift layer. The second p-type semiconductor region is configured by a plurality of regions arranged at a space in a Y direction (depth direction in the drawings). Thus, it is possible to reduce the specific on-resistance while maintaining the breakdown voltage of the gate insulating film by providing the first and second p-type semiconductor regions and further by arranging the second p-type semiconductor region spaced by the space.

Abstract: In a semiconductor device including a super junction structure that p-type columns and n-type columns are periodically arranged, a depth of a p-type column region in a cell region that a semiconductor element is formed is made shallower than a depth of a p-type column region in an intermediate region which surrounds the cell region. Thereby, a breakdown voltage of the cell region becomes lower than a breakdown voltage of the intermediate region. An avalanche breakdown phenomenon is caused to occur preferentially in the cell region in which even when an avalanche current is generated, the current is dispersed and smoothly flows. Thereby, it is possible to avoid local current constriction and breakage incidental thereto and consequently it becomes possible to improve avalanche resistance (an avalanche current amount with which a semiconductor device comes to be broken).

Abstract: A super junction structure having a high aspect ratio is formed. An epitaxial layer is dividedly formed in layers using the trench fill process, and when each of the layers has been formed, trenches are formed in that layer. For example, when a first epitaxial layer has been formed, first trenches are formed in the epitaxial layer. Subsequently, when a second epitaxial layer has been formed, second trenches are formed in the epitaxial layer. Subsequently, when a third epitaxial layer has been formed, third trenches are formed in the third epitaxial layer.

Abstract: In a vertical power MOSFET having a superjunction structure, the withstand voltage of the power MOSFET can be ensured even if the aspect ratios of an n-type column region and a p-type column region are increased so as to vary the impurity concentration of the p-type column region. P-type semiconductor regions PR1 are formed on the sides of an n-type column NC1 adjacent to a p-type column region PC1. In this configuration, the p-type semiconductor region PR1 is formed from the upper end of the n-type column region NC1 to about a half depth of a height from the upper end to the lower end of the side of the n-type column region NC1. This inclines the sides of the overall p-type column region including the p-type semiconductor regions PR1 and the p-type column region PC1.

Abstract: A fully-closed loop position controller with a velocity control system based on a velocity feedback of mixed velocities of a motor velocity and a load velocity. The fully-closed loop position controller identifies a ratio of load moment of inertia in real time to select an optimum mix gain in accordance with a changing ratio of load moment of inertia such that a position loop gain and a speed loop gain can be varied accordingly. The fully-closed loop position controller controls the load position based on the mix gain, the position loop gain, and the velocity loop gain.