Patents by Inventor Satoshi Horiuchi

Satoshi Horiuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110310343
    Abstract: A display device includes: a display panel (40a) having a plurality of display interconnects (3) provided so as to extend parallel to each other; a drive circuit (44a) provided on a side of one ends of the display interconnects (3), and connected to the display interconnects (3); a first interconnect path (Wa) and a second interconnect path (Wb) that are provided so as to cross the one ends of the display interconnects (3) in an insulating state; and a third interconnect path (Wc) that crosses the other ends of the display interconnects (3) in an insulating state, and is connected to the first interconnect path (Wa) and the second interconnect path (Wb). An amplifier circuit (A) is provided in a path including the first interconnect path (Wa) and the second interconnect path (Wb), and in a path including the first interconnect path (Wa) and the third interconnect path (Wc).
    Type: Application
    Filed: October 14, 2009
    Publication date: December 22, 2011
    Inventors: Nobuyoshi Ueda, Takaharu Yamada, Tadatoshi Ozeki, Satoshi Horiuchi, Takashi Okamoto, Teruhiko Yamaguchi, Isao Ogasawara
  • Publication number: 20110291097
    Abstract: An embodiment of the present invention provides a TFT array substrate, in which TFT elements and pixel electrodes being correspondingly connected with the TFT elements are arrayed in matrix on an insulating substrate, the TFT array substrate including: gate bus lines made from a first metal material; source bus lines made from a second metal material; pixel electrodes made from a third metal material; a clock wiring made from the first metal material; a branch wiring made from the second metal material; and a connection conductor made from the third metal material, the connection conductor connecting the clock wiring and the branch wiring at a connection part in a periphery area, the connection part having a branch-wiring via hole, which exposes the branch wiring which is covered with the connection conductor, and overlaps the clock wiring at least partly in a plane view.
    Type: Application
    Filed: November 5, 2009
    Publication date: December 1, 2011
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Isao Ogasawara, Takaharu Yamada, Masahiro Yoshida, Satoshi Horiuchi, Shinya Tanaka, Tetsuo Kikuchi
  • Publication number: 20110273653
    Abstract: An array substrate of the present invention includes: an insulating substrate; a plurality of scanning lines on the insulating substrate; a plurality of data lines each disposed so as to intersect the plurality of scanning lines on the insulating substrate; picture element electrodes each formed in a substantially rectangular shape, the picture element electrodes each being connected, via a switching element, to a corresponding scanning line and a corresponding data line, the picture element electrodes each having a long side disposed along a direction in which the plurality of scanning lines are extended and a short side disposed along a direction in which the plurality of data lines are extended, the picture element electrodes each having cut sections formed by cutting two corners of each of the picture element electrodes, the cut sections being formed so as to serve as alignment dividing means.
    Type: Application
    Filed: October 8, 2009
    Publication date: November 10, 2011
    Inventors: Masahiro Yoshida, Satoshi Horiuchi, Takaharu Yamada, Yuhko Hisada, Ryohki Itoh
  • Publication number: 20110242073
    Abstract: A high-quality display is achieved by suppressing a disturbance in alignment in a liquid crystal display panel including a substrate structured so that a slit in a pixel electrode intersects with a scanning signal line or an auxiliary capacitor line. An active matrix substrate (10) includes: a pixel electrode (12) having a slit; and an auxiliary capacitor line (14). In a region of intersection between the slit (15) and the auxiliary capacitor line (14) or a scanning signal line (21), at least a drain line (13) or a data signal line (22) is provided between a layer of the pixel electrode (12) and a layer of the auxiliary capacitor line (14) or of the scanning signal line (21) in such a way as to cover the auxiliary capacitor line (12) or the scanning signal line (21).
    Type: Application
    Filed: August 7, 2009
    Publication date: October 6, 2011
    Inventors: Satoshi Horiuchi, Takaharu Yamada, Yuhko Hisada, Ryohki Itoh
  • Publication number: 20110075087
    Abstract: Each of picture elements (14) has a plurality of alignment regions (R1, R2, R3, and R4), in each of which liquid crystal molecules contained in a liquid crystal layer are aligned in a direction that is different from those in the others of the plurality of alignment regions. Each of a plurality of scanning signal lines (32) and a border region (R11 and R12) between corresponding adjacent ones of the plurality of alignment regions (R1, R2, R3, and R4) at least partially overlap each other when viewed from above.
    Type: Application
    Filed: March 27, 2009
    Publication date: March 31, 2011
    Inventors: Junichi Morinaga, Katsushige Asada, Masahiro Yoshida, Tetsuya Fujikawa, Katsuhiro Mikumo, Kuniko Maeno, Ryohki Itoh, Satoshi Horiuchi, Tatsuji Saitoh, Isao Ogasawara, Kazunori Tanimoto, Katsuhiro Okada, Toshiaki Fujihara, Masakatsu Tominaga
  • Patent number: 7893471
    Abstract: A semiconductor apparatus is proposed which is provided with a crystalline dielectric film having a perovskite structure, between electrodes. The semiconductor apparatus includes at least a discontinuous interface through which crystallinity becomes discontinuous, in a columnar crystal portion of the crystalline dielectric film.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: February 22, 2011
    Assignee: Sony Corporation
    Inventor: Satoshi Horiuchi
  • Publication number: 20100296017
    Abstract: A liquid crystal display device in which lengths (d1 and d2) of respective picture element electrodes (60) in an extended direction of scanning signal lines (32) are longer than lengths (d3) of the respective picture element electrodes (60) in an extended direction of video signal lines (35) is arranged such that storage capacitor lines (36) are provided along the respective scanning signal lines (32) so as to overlap the respective picture element electrodes (60) via an insulating film (70) in plan view.
    Type: Application
    Filed: December 1, 2008
    Publication date: November 25, 2010
    Inventors: Masahiro Yoshida, Satoshi Horiuchi, Masakatsu Tominaga, Junichi Morinaga, Ryohki Itoh, Katsushige Asada, Hironobu Sawada, Hitoshi Matsumoto
  • Patent number: 7834946
    Abstract: A display device includes multiple signal lines that are connected to multiple pixel electrodes including first and second pixel electrodes. The distance between one end of the first pixel electrode and the centerline of a first signal line is greater than the distance between one end of the second pixel electrode and the centerline of a second signal line. Alternatively, the distance between the other end of the first pixel electrode and the centerline of an adjacent signal line, which is located on the opposite side of the first pixel electrode from the first signal line, is greater than the distance between the other end of the second pixel electrode and the centerline of another adjacent signal line, which is located on the opposite side of the second pixel electrode from the second signal line.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: November 16, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Satoshi Horiuchi, Yuhko Hisada, Ryohki Itoh, Takaharu Yamada
  • Publication number: 20100283931
    Abstract: In a TFT array substrate (20), connecting points (P10) of a first metal layer (M1) and a second metal layer (M2) are provided in a peripheral region (A20). A driving circuit (B60b), which is at least a part of a driving circuit (60), is provided between the connecting points (P10) and an edge (24) of the TFT array substrate (20).
    Type: Application
    Filed: December 2, 2008
    Publication date: November 11, 2010
    Inventors: Satoshi Horiuchi, Takaharu Yamada, Isao Ogasawara
  • Publication number: 20100277661
    Abstract: In an auxiliary capacitance electrode of each pixel region, a side end on one side in a direction in which a drain electrode crosses an end of a gate electrode so as to enter from the outside of the gate electrode to the inside thereof is disposed inside of an auxiliary capacitance line, and a side end on the other side in a direction in which the drain electrode crosses the end of the gate electrode so as to go out from the inside of the gate electrode to the outside thereof is disposed outside of the auxiliary capacitance line.
    Type: Application
    Filed: February 4, 2009
    Publication date: November 4, 2010
    Inventors: Nobuyoshi Ueda, Hiroyuki Iida, Takaharu Yamada, Ryoki Ito, Satoshi Horiuchi
  • Publication number: 20100277447
    Abstract: The present invention provides a liquid crystal display device including an active matrix substrate with improved characteristics and providing high-contrast between black and white displays.
    Type: Application
    Filed: December 26, 2008
    Publication date: November 4, 2010
    Inventors: Ryohki Itoh, Satoshi Horiuchi, Takaharu Yamada
  • Publication number: 20100259702
    Abstract: An active matrix substrate (10) included in a liquid crystal display device of the present invention is arranged such that (i) source bus lines (12) (signal wires) are disposed so that each of the source bus lines (i) partially overlaps its corresponding pixel electrodes (14) adjacent to each other along a direction in which gate bus lines (11) (scanning wires) extend and (ii) leads from a border between the pixel electrodes (14) toward a central part of each of the pixel electrodes (14), and in the meantime, the source bus lines (12) are disposed so that at least part of overlap between each of the source bus lines (12) and the pixel electrodes (14) overlaps ribs (26) (orientation-changing sections) that change orientation of liquid crystal molecules contained in a liquid crystal layer.
    Type: Application
    Filed: September 9, 2008
    Publication date: October 14, 2010
    Inventors: Ryohki Itoh, Satoshi Horiuchi
  • Publication number: 20100188437
    Abstract: A display device prevents luminance unevenness that occurs in the case of inversion driving being performed, and performs high quality image display, while selectively scanning two lines of picture elements constituting a single pixel using a single gate wiring, as in the case of multi-primary color image display.
    Type: Application
    Filed: June 9, 2008
    Publication date: July 29, 2010
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Ryohki Itoh, Satoshi Horiuchi, Yuhko Hisada
  • Publication number: 20100141570
    Abstract: In one embodiment of the present invention, a display panel includes an active matrix type pixel region including scanning signal lines each of which is connected to three terminal elements each of which serves as an active element, the active matrix type pixel region including a non-rectangular shape by being configured such that the respective scanning signal lines are connected with various numbers of the three terminal elements according to where the scanning signal lines are located, and a shift register which drives the scanning signal lines, the shift register being formed in a region on a panel substrate, the region being adjacent to the pixel region in a direction in which the scanning signal lines extend.
    Type: Application
    Filed: July 4, 2008
    Publication date: June 10, 2010
    Inventors: Satoshi Horiuchi, Toshiaki Fujihara, Takaharu Yamada, Isao Ogasawara, Hironobu Sawada
  • Patent number: 7666793
    Abstract: A film deposition process for depositing an amorphous metal oxide film, for example, an amorphous tantalum oxide film and a film treatment process for improving film quality of the amorphous tantalum oxide film in the state in which an amorphous state of the amorphous metal oxide film is being maintained by a high-density plasma radiation treatment based upon ion and radical reactions and which contains at least oxygen at an ion current density higher than 5 mA/cm2 are carried out, whereby a low-temperature treatment in the whole process is made possible. In addition, since the amorphous metal oxide film, which is excellent in film quality, can be deposited, the amorphous metal oxide film can be made high in reliability and can be produced inexpensively. The amorphous tantalum oxide film which is excellent in film quality can be manufactured inexpensively by a low-temperature treatment.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: February 23, 2010
    Assignees: Sony Corporation, CV Research Corporation
    Inventors: Kiwamu Adachi, Satoshi Horiuchi, Tetsuya Yukimoto
  • Publication number: 20100033643
    Abstract: The present invention provides a liquid crystal display panel capable of providing a high contrast ratio with a storage capacitance being secured, and also provides a liquid crystal display device including such a panel. The present invention is a liquid crystal display panel having a structure in which a liquid crystal layer is interposed between a first substrate and a second substrate, wherein at least one of the first substrate and the second substrate includes a projection for liquid crystal alignment control, the first substrate includes a scanning signal line, a data signal line, a drain electrode electrically connected to a pixel electrode, a switching element, and a storage capacitor wiring, the storage capacitor wiring includes a main wiring part and a branch part, the branch part being connected to the main wiring part and overlapping with the projection for liquid crystal alignment control.
    Type: Application
    Filed: September 4, 2007
    Publication date: February 11, 2010
    Inventors: Satoshi Horiuchi, Toshiaki Fujihara, Masakatsu Tominaga, Hitoshi Matsumoto, Hironobu Sawada, Ryohki Itoh
  • Publication number: 20090290080
    Abstract: A display device includes multiple signal lines that are connected to multiple pixel electrodes including first and second pixel electrodes. The distance between one end of the first pixel electrode and the centerline of a first signal line is greater than the distance between one end of the second pixel electrode and the centerline of a second signal line. Alternatively, the distance between the other end of the first pixel electrode and the centerline of an adjacent signal line, which is located on the opposite side of the first pixel electrode from the first signal line, is greater than the distance between the other end of the second pixel electrode and the centerline of another adjacent signal line, which is located on the opposite side of the second pixel electrode from the second signal line.
    Type: Application
    Filed: March 20, 2007
    Publication date: November 26, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Satoshi Horiuchi, Yuhko Hisada, Ryohki Itoh, Takaharu Yamada
  • Publication number: 20090051638
    Abstract: A display device improves brightness while minimizing an increase in the number of source drivers. When a value obtained by dividing the length of a display screen in a row direction by the number of pixels in the row direction is a length corresponding to one pixel in the row direction, one period of color arrangement in the row direction is a length corresponding to two pixels. One such period of color arrangement include two groups of subpixels that include first subpixel of the light's three primary colors of red (R), green (G) and blue (B), that are arranged in a row and that have the same subpixel configuration; and at least one additional subpixel. Scanning lines extending in the row direction and signal lines extending in the column direction are connected to the first subpixels and the at least one additional subpixel.
    Type: Application
    Filed: October 11, 2006
    Publication date: February 26, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Satoshi Horiuchi, Yuhko Hisada, Tomoo Furukawa, Ryohki Itoh, Takahara Yamada
  • Publication number: 20080029764
    Abstract: A capacitor includes a first electrode, a dielectric layer, and a second electrode that are sequentially stacked. The dielectric layer has a stacked layer structure including a predetermined number of hafnium oxide sublayers and predetermined number of tantalum oxide sublayers. The number, materials, and thicknesses of the sublayers are determined so that the thickness ratio has a range in which, in voltage-leakage current characteristics showing the relationship between the voltage between the first and second electrodes and the leakage current, a start voltage at which the slope of an increase in the current starts to discontinuously increase satisfies an electric field strength of 3 [MV/cm] or more when the ratio of the total thickness of the predetermined number of tantalum oxide sublayers to the total thickness of the dielectric layer is varied, and the thickness ratio is within the range such that the start voltage is within the range.
    Type: Application
    Filed: July 23, 2007
    Publication date: February 7, 2008
    Inventors: Kiwamu Adachi, Satoshi Horiuchi
  • Publication number: 20070212843
    Abstract: A semiconductor apparatus is proposed which is provided with a crystalline dielectric film having a perovskite structure, between electrodes. The semiconductor apparatus includes at least a discontinuous interface through which crystallinity becomes discontinuous, in a columnar crystal portion of the crystalline dielectric film.
    Type: Application
    Filed: February 21, 2007
    Publication date: September 13, 2007
    Applicant: Sony Corporation
    Inventor: Satoshi Horiuchi