Abstract: Provided is a technique of suppressing display defects such as flicker, without limiting the arrangement of data lines, in a liquid crystal display device having a display area in a non-rectangular shape. A liquid crystal display device includes an active matrix substrate 10, a counter substrate, and a liquid crystal layer. The active matrix substrate 10 includes a plurality of gate lines 11, and a plurality of data lines 12. In each of pixels defined by the gate lines 11 and the data lines 12, a pixel electrode 14 is arranged, and in a display area R, common electrodes 15 are provided. Outside the display area R, capacitance-generating parts C that generate capacitances between some gate lines 11 among the plurality of gate lines 11 and the common electrode are provided. The some gate lines 11 have lengths smaller than the gate lines having the maximum length, and intersect with some data lines 12 among the plurality of data lines 12.

Abstract: The present invention reduces a circuit scale of a driving circuit while maintaining a characteristic of the driving circuit. In a driving circuit of the present invention, a transistor (TRc) including a gate electrode, a semiconductor film (HF), and first and second conductive electrodes (S, D) is provided on an upper side of the substrate. The driving circuit further includes a first conductive film (21) provided in a layer lower than the gate electrode, a second conductive film (22) that serves as the gate electrode, and a first capacitor (C1) defined between the first conductive film (21) and the second conductive film (22).

Abstract: To a unit circuit, provided are a transistor to which a first clock signal is supplied, a transistor for applying an off-level voltage to a first node, a transistor for applying the off-level voltage to a second node, a transistor for applying an on-level voltage to the second node based on a clock signal being ahead of the first clock signal in a forward direction scanning, a transistor for applying the on-level voltage to the second node based on a clock signal being ahead of the first clock signal in a backward direction scanning, and a circuit for controlling a voltage of the first node based on output signals of the unit circuits in a front-side stage and a back-side stage. The unit circuit is configured so that a voltage of the second node is changed to an ON level and an OFF level while a voltage of the first node is in the OFF level and the voltage of the second node is in the ON level when the first clock signal is changed to the ON level while the voltage of the first node is in the OFF level.

Abstract: An active-matrix substrate according to an embodiment of the present invention includes a plurality of first TFTs that are arranged within a display area, an inorganic insulating layer that covers the plurality of first TFTs, an organic insulating layer that is provided on the inorganic insulating layer, a plurality of second TFTs that are arranged within a non-display area, and a source and gate metal connection portion that is positioned within the non-display area, a first conductive layer that is formed from an identical conductive film with a gate wiring line and a second conductive layer that is formed from an identical conductive film with a source wiring line being connected to each other at the source and gate metal connection portion. Each of the plurality of first TFTs is an oxide semiconductor TFT. At least one second TFT among the plurality of second TFTs is covered with the organic insulating layer. The source and gate metal connection portion is not covered with the organic insulating layer.

Abstract: A display device has a display panel including gate lines, a driving circuit, and an auxiliary circuit corresponding to each gate lines. To the driving circuit and the auxiliary circuit, one driving signal of M-phase driving signals (M?4) having selection potential and non-selection potential, is supplied. The driving circuit outputs the driving signal to a corresponding gate line. A selection period for the gate line includes a pre-charging period and a main charging period, and the main charging period overlaps with the pre-charging period for the adjacent gate line. The auxiliary circuit is driven during the main charging period for the corresponding gate line and during the main charging period for the next gate line. The auxiliary circuit outputs the selection potential during the main charging period for the corresponding gate line, and outputs the non-selection potential during the main charging period for the next gate line.

Abstract: Provided is a touch-panel-equipped display device that can improve the touch sensing accuracy, without decreases in the display quality, and a method for producing the same. A touch-panel-equipped display device includes an active matrix substrate 1. The active matrix substrate 1 includes a plurality of pixel electrodes 31; a plurality of counter electrodes 21 forming capacitors between the same and the pixel electrodes 31; a plurality of touch detection lines 22; a first insulating layer 461; and a second insulating layer 462. The touch detection lines 22 are connected with any of the counter electrodes 21, and supply a driving signal for touch detection to the counter electrodes 21 connected therewith. Between each pixel electrode 31 and the corresponding one of the counter electrodes 21, the second insulating layer 462 is arranged.

Abstract: Provided is a display device in which connection defects in terminal parts can be suppressed, and a method for producing the same. An active matrix substrate 1 of a display device includes gate lines, data lines arranged so as to intersect with the gate lines, pixel electrodes, counter electrodes forming capacitors between the same and the pixel electrodes, and signal lines that are connected with the counter electrodes and supply a driving signal for touch detection. Further, the active matrix substrate 1 includes a display driving circuit that supplies a control signal to at least either the gate lines or the data lines, and a touch detection driving circuit that supplies a driving signal for touch detection. Still further, the active matrix substrate 1 includes a plurality of terminal parts Ta to which the display driving circuit and the touch detection driving circuit are connected, and the terminal parts Ta have a common layer structure.

Abstract: Provided is a technique of suppressing display defects such as flicker, without limiting the arrangement of data lines, in a liquid crystal display device having a display area in a non-rectangular shape. A liquid crystal display device includes an active matrix substrate 10, a counter substrate, and a liquid crystal layer. The active matrix substrate 10 includes a plurality of gate lines 11, and a plurality of data lines 12. In each of pixels defined by the gate lines 11 and the data lines 12, a pixel electrode 14 is arranged, and in a display area R, common electrodes 15 are provided. Outside the display area R, capacitance-generating parts C that generate capacitances between some gate lines 11 among the plurality of gate lines 11 and the common electrode are provided. The some gate lines 11 have lengths smaller than the gate lines having the maximum length, and intersect with some data lines 12 among the plurality of data lines 12.

Abstract: To a unit circuit, provided are a transistor to which a first clock signal is supplied, a transistor for applying an off-level voltage to a first node, a transistor for applying the off-level voltage to a second node, a transistor for applying an on-level voltage to the second node based on a clock signal being ahead of the first clock signal in a forward direction scanning, a transistor for applying the on-level voltage to the second node based on a clock signal being ahead of the first clock signal in a backward direction scanning, and a circuit for controlling a voltage of the first node based on output signals of the unit circuits in a front-side stage and a back-side stage. The unit circuit is configured so that a voltage of the second node is changed to an ON level and an OFF level while a voltage of the first node is in the OFF level and the voltage of the second node is in the ON level when the first clock signal is changed to the ON level while the voltage of the first node is in the OFF level.

Abstract: Problem to be Solved To provide a waste gasification melting apparatus which, even if a fuel gas is used as an alternative to a part of the coke, the temperature of the coke bed can be sufficiently raised, and a method using the same. Solution A waste gasification melting apparatus including an oxygen rich air supply apparatus 14 for blowing oxygen rich air into a tuyere 5, and a fuel gas supply apparatus 15 for supplying a fuel gas to the tuyere 5, and a controller 16 for controlling the oxygen rich air supply apparatus 14; the oxygen rich air supply apparatus 14 mixing air and oxygen to prepare oxygen rich air and supply the oxygen rich air to the tuyere 5; and the controller 16 controlling the amount of air to be mixed and the amount of oxygen to be mixed in the oxygen rich air supply apparatus 14 so as to give an oxygen concentration of the oxygen rich air in accordance with the amount of fuel gas supplied to the tuyere 5 from the fuel gas supply apparatus 15.

Abstract: A gate driving circuit includes circuits each provided in such a manner as to, as a scanning signal, select a single clock pulse of a clock signal and output the clock pulse. The circuits each include: a transistor for outputting a scanning signal; a transistor for controlling an electric potential of a gate of the transistor so that the electric potential of the gate is at a low level; a transistor for, while the transistor is not outputting the scanning signal, controlling an electric potential of a gate of the transistor so that the electric potential of the gate is at a high level; and a transistor for, while the transistor is not in operation during a period during which an operation of the selection circuit is paused, controlling the electric potential of the gate of the transistor so that the electric potential becomes high.

Abstract: In the present liquid crystal display device, a conventional first auxiliary capacitance trunk line 430 is formed to be narrow, and a second auxiliary capacitance trunk line 440 is additionally provided and disposed at the closest position to the periphery of a substrate. Thus, a shift register can be distanced from the periphery of the substrate without increasing a frame area as a whole, so that the shift register is not overlaid with a seal material. Moreover, the extent of an area overlaid with a seal material within a wiring area for providing signals to the shift register can be reduced.

Abstract: In the present liquid crystal display device, a conventional first auxiliary capacitance trunk line 430 is formed to be narrow, and a second auxiliary capacitance trunk line 440 is additionally provided and disposed at the closest position to the periphery of a substrate. Thus, a shift register can be distanced from the periphery of the substrate without increasing a frame area as a whole, so that the shift register is not overlaid with a seal material. Moreover, the extent of an area overlaid with a seal material within a wiring area for providing signals to the shift register can be reduced.

Abstract: An embodiment of the present invention provides a TFT array substrate, in which TFT elements and pixel electrodes being correspondingly connected with the TFT elements are arrayed in matrix on an insulating substrate, the TFT array substrate including: gate bus lines made from a first metal material; source bus lines made from a second metal material; pixel electrodes made from a third metal material; a clock wiring made from the first metal material; a branch wiring made from the second metal material; and a connection conductor made from the third metal material, the connection conductor connecting the clock wiring and the branch wiring at a connection part in a periphery area, the connection part having a branch-wiring via hole, which exposes the branch wiring which is covered with the connection conductor, and overlaps the clock wiring at least partly in a plane view.

Abstract: A shift register is configured so that each of first and second intermediate stages includes (i) a first input terminal supplied with a clock signal, (ii) a second input terminal supplied with a clock signal different in phase from the clock signal supplied to the first input terminal, (iii) an output terminal connected to the first input terminal via an output transistor, and (iv) a setting circuit, which is connected to the second input terminal and the output transistor, for setting an electric potential of a control terminal of the output transistor, the second intermediate stage includes a control circuit which is (i) connected to the setting circuit of the second intermediate stage and (ii) supplied with a control signal, an operation period (i) starts at a time when a shift start signal supplied to an initial stage is activated and (ii) ends at a time when an output of a final stage changes from activation to inactivation, and when the clock signal supplied to the first input terminal of the second int

Abstract: An embodiment of the present invention provides a TFT array substrate, in which TFT elements and pixel electrodes being correspondingly connected with the TFT elements are arrayed in matrix on an insulating substrate, the TFT array substrate including: gate bus lines made from a first metal material; source bus lines made from a second metal material; pixel electrodes made from a third metal material; a clock wiring made from the first metal material; a branch wiring made from the second metal material; and a connection conductor made from the third metal material, the connection conductor connecting the clock wiring and the branch wiring at a connection part in a periphery area, the connection part having a branch-wiring via hole, which exposes the branch wiring which is covered with the connection conductor, and overlaps the clock wiring at least partly in a plane view.

Abstract: An embodiment of the present invention provides a TFT array substrate, in which TFT elements and pixel electrodes being correspondingly connected with the TFT elements are arrayed in matrix on an insulating substrate, the TFT array substrate including: gate bus lines made from a first metal material; source bus lines made from a second metal material; pixel electrodes made from a third metal material; a clock wiring made from the first metal material; a branch wiring made from the second metal material; and a connection conductor made from the third metal material, the connection conductor connecting the clock wiring and the branch wiring at a connection part in a periphery area, the connection part having a branch-wiring via hole, which exposes the branch wiring which is covered with the connection conductor, and overlaps the clock wiring at least partly in a plane view.

Abstract: In the present liquid crystal display device, a conventional first auxiliary capacitance trunk line 430 is formed to be narrow, and a second auxiliary capacitance trunk line 440 is additionally provided and disposed at the closest position to the periphery of a substrate. Thus, a shift register can be distanced from the periphery of the substrate without increasing a frame area as a whole, so that the shift register is not overlaid with a seal material. Moreover, the extent of an area overlaid with a seal material within a wiring area for providing signals to the shift register can be reduced.

Abstract: Provided are: a liquid crystal display device capable of rapidly removing residual electric charges in a panel when a power supply is turned off, and in particular, suitable for a case where IGZO-GDM is adopted; and a driving method of the liquid crystal display device. In the liquid crystal display device, when an OFF state of the power supply is detected, a power supply OFF sequence including an initialization step, a first discharge step and a second discharge step is executed. In the initialization step, only a clear signal (H_CLR) among GDM signals is set at a high level, and a state of each of bistable circuits which constitute a shift register is initialized. In the first discharge step, only the clear signal (H_CLR) among the GDM signals is set at a low level, all of gate bus lines are turned to a selected state, and electric charges in pixel formation portions are discharged.

Abstract: The invention provides a liquid crystal display device that includes an IGZO-GDM which can quickly remove a residual charge in a panel when the power supply is turned off, and a driving method of the liquid crystal display device. Each bistable circuit that configures a shift register includes a thin film transistor TI for increasing a potential of an output terminal based on a first clock, a region netA connected to a gate terminal of the thin film transistor TI, a thin film transistor TC for lowering a potential of the region netA, and a region netB connected to a gate terminal of the thin film transistor TC. In such a configuration, a power supply off sequence includes a display off sequence and a gate off sequence. The gate off sequence includes at least a gate-bus-line discharge step (t14 to t15), a netB discharge step (t15 to t16), and a netA discharge step (t16 to t17).