Patents by Inventor Satoshi Horiuchi
Satoshi Horiuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8716709Abstract: The present invention provides an inexpensive display device that includes an ion sensor portion and a display and that can be miniaturized. The present invention is a display device that includes an ion sensor portion including an ion sensor circuit and a display including a display-driving circuit. The display device has a substrate, and at least one portion of the ion sensor circuit and at least one portion of the display-driving circuit are formed on the same main surface of the substrate.Type: GrantFiled: May 18, 2011Date of Patent: May 6, 2014Assignee: Sharp Kabushiki KaishaInventors: Atsuhito Murai, Yoshiharu Kataoka, Takuya Watanabe, Yuhko Hisada, Satoshi Horiuchi
-
Patent number: 8686980Abstract: A gate driving circuit (60) separated into a plurality of stages (ST) is provided. In each of the stages (ST), TFT elements (T1) through (T4) are provided, branch lines (78) that connect clock lines (72, 74) to the TFT elements are provided. Junction lines (79A, 79B) are each extended from the branch line (78A) of interest to electrically connect the branch line (78A) of interest to the TFT elements (T2, T4) provided in the stage (ST(j)) different from the stage (ST (j?1)) where the TFT elements (T1, T3) connected to the branch line (78A) of interest are provided.Type: GrantFiled: December 1, 2010Date of Patent: April 1, 2014Assignee: Sharp Kabushiki KaishaInventors: Masahiro Yoshida, Isao Ogasawara, Satoshi Horiuchi, Takaharu Yamada, Shinya Tanaka, Tetsuo Kikuchi
-
Patent number: 8681297Abstract: When viewed from the top of the liquid crystal display panel, a projecting section (4a) of a picture element electrode (4) is formed so as to at least partially match a contact hole (17). It is therefore possible to provide the liquid crystal display panel which achieves a high quality display and has a high aperture ratio and high transmittance.Type: GrantFiled: November 19, 2010Date of Patent: March 25, 2014Assignee: Sharp Kabushiki KaishaInventors: Yuhko Hisada, Takaharu Yamada, Satoshi Horiuchi, Ryohki Itoh
-
Publication number: 20130313554Abstract: The present invention provides an ion sensor with which an ion concentration can be stably measured with high accuracy, and a display device. The present invention is an ion sensor that includes a field effect transistor. The ion sensor also includes an ion sensor antenna and a reset device. The ion sensor antenna and the reset device are connected to a gate electrode of the field effect transistor. The reset device is capable of controlling the potential of the gate electrode and the ion sensor antenna to a predetermined potential.Type: ApplicationFiled: May 18, 2011Publication date: November 28, 2013Inventors: Atsuhito Murai, Yoshiharu Kataoka, Takuya Watanabe, Yuhko Hisada, Satoshi Horiuchi
-
Patent number: 8593584Abstract: The present invention provides a liquid-crystal display device in which a pixel defect does not occur even when an electrode becomes disconnected. The liquid-crystal display device according to the present invention comprises a liquid crystal layer and a pair of substrates between which the liquid crystal layer is interposed. At least one of the pair of substrates includes an electrode that applies a voltage to the liquid crystal layer. The electrode that applies the voltage to the liquid crystal layer includes two or more linear portions. The substrate comprising the electrode that applies the voltage to the liquid crystal layer, from among the pair of substrates, includes a floating electrode that overlaps at least two of the two or more linear portions via an insulating film.Type: GrantFiled: March 11, 2010Date of Patent: November 26, 2013Assignee: Sharp Kabushiki KaishaInventors: Ryohki Itoh, Takaharu Yamada, Yuhko Hisada, Satoshi Horiuchi
-
Publication number: 20130307085Abstract: An active matrix substrate of the present invention includes: a first signal line and a second signal line which are aligned in a column direction in which the first signal line and the second signal line extend; a first transistor and a second transistor; and a first electrode and a second electrode, the first signal line being connected via the first transistor to the first electrode, and the second signal line being connected via the second transistor to the second electrode, and the first signal line having a first end which is one of both ends of the first signal line and faces the second signal line, the first end including a tapered part which is tapered toward the second signal line. This makes it possible to prevent a leakage defect from occurring between two signal lines which are aligned in a direction in which the two signal lines extend.Type: ApplicationFiled: February 2, 2012Publication date: November 21, 2013Applicant: SHARP KABUSHIKI KAISHAInventors: Yoshihiro Asai, Satoshi Horiuchi, Kazuyori Mitsumoto
-
Patent number: 8582064Abstract: Disclosed is an MVA type liquid crystal display device (LCD 100A) forming four domains in which liquid crystal molecules fall in different directions that are about 90° apart. The MVA type liquid crystal display device includes a plurality of pixels arranged in a matrix of rows and columns, which pixels are horizontally long pixels having longer sides extending in the row direction. Each pixel includes two first electrodes (21a and 21b) arranged side by side along the row direction. Preferably, at least one of the two first electrodes (21a and 21b) has a first corner section including a first edge that is parallel to the row direction and a second edge that is parallel to the column direction, and the first substrate further includes an electrode layer (16c) overlapping at least a portion of the first edge or the second edge of the first corner section.Type: GrantFiled: December 21, 2010Date of Patent: November 12, 2013Assignee: Sharp Kabushiki KaishaInventors: Satoshi Horiuchi, Takaharu Yamada, Yuhko Hisada, Ryohki Itoh, Masahiro Yoshida
-
Publication number: 20130292681Abstract: The active matrix substrate is provided with: first and second scan lines (20a, 20b) that extend in a first direction; first and second signal lines (30a, 30b) that extend in a second direction; first and second pixels (10a, 10b) that are arranged adjacent to each other along the second direction; an auxiliary capacitor line (40); first and second pixel electrodes (60a, 60b); a first TFT (50a); a second TFT (50b); an auxiliary capacitor electrode (42) that is connected to the auxiliary capacitor line (40) and extends below the first and second pixel electrodes (60a, 60b); a first auxiliary capacitor counter electrode (62a) that is connected to the first pixel electrode (60a); and a second auxiliary capacitor counter electrode (62b) that is connected to the second pixel electrode (60b).Type: ApplicationFiled: December 22, 2011Publication date: November 7, 2013Applicant: SHARP KABUSHIKI KAISHAInventors: Kazuyori Mitsumoto, Masahiro Yoshida, Satoshi Horiuchi
-
Publication number: 20130240746Abstract: The present invention provides an ion sensor and a display device which are capable of detecting positive ions and negative ions with high precision, at low cost. The ion sensor includes: a field effect transistor; an ion sensor antenna; and a capacitor, the ion sensor antenna and one terminal of the capacitor connected to a gate electrode of the field effect transistor, the other terminal of the capacitor receiving voltage.Type: ApplicationFiled: May 18, 2011Publication date: September 19, 2013Inventors: Atsuhito Murai, Yoshiharu Kataoka, Takuya Watanabe, Yuhko Hisada, Satoshi Horiuchi
-
Patent number: 8531224Abstract: An object is shortening a clock fall-rise period while suppressing an increase in a circuit area, an increase in current consumption, and a cost increase, without generating an abnormal operation, in a shift register within a monolithic gate driver. In a shift register (410) that operates based on four-phase clock signals, including two-phase clock signals (GCK1, GCK3) that are provided to odd-order stages and two-phase clock signals (GCK2, GCK4) that are provided to even-order stages, of which phases are shifted by 90 degrees from each other, a potential of a first clock (CKA) appears as a potential of a scanning signal (GOUT), when a potential of a first node is at a high level, in each stage. In this configuration, the potential of the first node included in each stage is set to a high level based on a pulse of a scanning signal outputted from a pre-stage, and is set to a low level based on a pulse of a scanning signal outputted from a third stage after a stage concerned.Type: GrantFiled: July 15, 2010Date of Patent: September 10, 2013Assignee: Sharp Kabushiki KaishaInventors: Akihisa Iwamoto, Hideki Morii, Takayuki Mizunaga, Shinya Tanaka, Tetsuo Kikuchi, Takaharu Yamada, Satoshi Horiuchi, Chikao Yamasaki, Kei Ikuta
-
Publication number: 20130200373Abstract: The present invention provides an inexpensive display device that includes an ion sensor portion and a display and that can be miniaturized. The present invention is a display device that includes an ion sensor portion including an ion sensor circuit and a display including a display-driving circuit. The display device has a substrate, and at least one portion of the ion sensor circuit and at least one portion of the display-driving circuit are formed on the same main surface of the substrate.Type: ApplicationFiled: May 18, 2011Publication date: August 8, 2013Inventors: Atsuhito Murai, Yoshiharu Kataoka, Takuya Watanabe, Yuhko Hisada, Satoshi Horiuchi
-
Publication number: 20130153912Abstract: An active matrix substrate includes: an electrode layer formed on the insulating substrate within a display region; a mark disposed on the insulating substrate within a non-display region, and made of a same material as the electrode layer; a first insulating film directly covering each of the electrode layer and the mark; and a second insulating film covering a part of the first insulating film. Within at least a part of the sealing region, the second insulating film is removed from the insulating substrate. The mark is disposed in the at least the part of the sealing region in which the second insulating film is removed, and is provided to overlap at least a part of the sealing region. A protective film is formed on the insulating substrate to cover a side surface and a surface of the first insulating film covering the mark, the surface of the first insulating film being located opposite from the insulating substrate.Type: ApplicationFiled: August 29, 2011Publication date: June 20, 2013Applicant: Sharp Kabushiki KaishaInventors: Masahiro Yoshida, Takaharu Yamada, Satoshi Horiuchi, Kazuyori Mitsumoto
-
Patent number: 8462099Abstract: In one embodiment of the present invention, a display panel includes an active matrix type pixel region including scanning signal lines each of which is connected to three terminal elements each of which serves as an active element, the active matrix type pixel region including a non-rectangular shape by being configured such that the respective scanning signal lines are connected with various numbers of the three terminal elements according to where the scanning signal lines are located, and a shift register which drives the scanning signal lines, the shift register being formed in a region on a panel substrate, the region being adjacent to the pixel region in a direction in which the scanning signal lines extend.Type: GrantFiled: July 4, 2008Date of Patent: June 11, 2013Assignee: Sharp Kabushiki KaishaInventors: Satoshi Horiuchi, Toshiaki Fujihara, Takaharu Yamada, Isao Ogasawara, Hironobu Sawada
-
Patent number: 8411239Abstract: An array substrate of the present invention includes: an insulating substrate; a plurality of scanning lines on the insulating substrate; a plurality of data lines each disposed so as to intersect the plurality of scanning lines on the insulating substrate; picture element electrodes each formed in a substantially rectangular shape, the picture element electrodes each being connected, via a switching element, to a corresponding scanning line and a corresponding data line, the picture element electrodes each having a long side disposed along a direction in which the plurality of scanning lines are extended and a short side disposed along a direction in which the plurality of data lines are extended, the picture element electrodes each having cut sections formed by cutting two corners of each of the picture element electrodes, the cut sections being formed so as to serve as alignment dividing means.Type: GrantFiled: October 8, 2009Date of Patent: April 2, 2013Assignee: Sharp Kabushiki KaishaInventors: Masahiro Yoshida, Satoshi Horiuchi, Takaharu Yamada, Yuhko Hisada, Ryohki Itoh
-
Publication number: 20130069121Abstract: The present invention provides an ion sensor with which an ion concentration in a sample in which both ions are mixed can be measured with high accuracy, a display device, a method for driving the ion sensor, and a method for calculating an ion concentration. The present invention is an ion sensor that includes a field effect transistor. The ion sensor detects one of negative ions and positive ions using the field effect transistor, and consecutively thereafter detects the other of the negative ions and positive ions using the field effect transistor.Type: ApplicationFiled: May 18, 2011Publication date: March 21, 2013Inventors: Atsuhito Murai, Yoshiharu Kataoka, Takuya Watanabe, Yuhko Hisada, Satoshi Horiuchi
-
Patent number: 8400597Abstract: Each of picture elements (14) has a plurality of alignment regions (R1, R2, R3, and R4), in each of which liquid crystal molecules contained in a liquid crystal layer are aligned in a direction that is different from those in the others of the plurality of alignment regions. Each of a plurality of scanning signal lines (32) and a border region (R11 and R12) between corresponding adjacent ones of the plurality of alignment regions (R1, R2, R3, and R4) at least partially overlap each other when viewed from above.Type: GrantFiled: March 27, 2009Date of Patent: March 19, 2013Assignee: Sharp Kabushiki KaishaInventors: Junichi Morinaga, Katsushige Asada, Masahiro Yoshida, Tetsuya Fujikawa, Katsuhiro Mikumo, Kuniko Maeno, Ryohki Itoh, Satoshi Horiuchi, Tatsuji Saitoh, Isao Ogasawara, Kazunori Tanimoto, Katsuhiro Okada, Toshiaki Fujihara, Masakatsu Tominaga
-
Publication number: 20130039455Abstract: A shift register stage includes a first transistor having a capacitor electrode (CAPm) that faces, in a film thickness direction, at least one of source and drain electrodes (Tr4s and Tr4d) of the first transistor in a side opposite to a gate electrode (Tr4g) of the first transistor. One of (i) the capacitor electrode (CAPm) and (ii) the one of the source and drain electrodes (Tr4s and Tr4d) which faces the capacitor electrode (CAPm), is electrically connected to a control electrode of an output transistor of the shift register stage.Type: ApplicationFiled: January 21, 2011Publication date: February 14, 2013Inventors: Satoshi Horiuchi, Masahiro Yoshida, Takaharu Yamada, Isao Ogasawara, Shinya Tanaka, Tetsuo Kikuchi
-
Publication number: 20130038583Abstract: Provided is a shift register circuit which includes: first through N-th circuit sections (1a, 1b) (N is an integer equal to or larger than 2) in each of which a plurality of shift register stages (SR1, SR2, . . . , SRn) are connected in cascade; and supply wires (10b, 10c, 10e, 10f). Each of the first through N-th circuit sections (1a, 1b) receives drive signals (CKA1, CKA2, CKB1, CKB2) for driving the shift register stages (SR1, SR2, . . . , SRn) via supply wires (10b, 10c, 10e, 10f) exclusive for the each of the first through N-th circuit sections (1a, 1b).Type: ApplicationFiled: January 28, 2011Publication date: February 14, 2013Inventors: Junya Shimada, Shinya Tanaka, Tetsuo Kikuchi, Chikao Yamasaki, Masahiro Yoshida, Satoshi Horiuchi, Isao Ogasawara
-
Publication number: 20130033469Abstract: Picture element electrodes (7) are electrically connected with drain electrodes (18D) of respective transistor elements (18). The picture element electrodes (7) and data signal lines (SLn, SLn+1, . . . ) are provided above scanning signal lines (GLn, GLn+1, . . . ). The picture element electrodes (7) overlap scanning signal lines (GLn, GLn+1, . . . ) when viewed from above. Notch parts 7a and 7b are provided in each picture element electrode (7) so as to overlap each of the scanning signal lines (GLn, GLn+1, . . . ). Shield electrodes (4a, 4b) are formed in the same layer as the data signal lines (SLn, SLn+1, . . . ). Each of the scanning signal lines (GLn, GLn+1, . . . ) at least partially overlaps the shield electrodes (4a, 4b) in the notch parts (7a, 7b), when viewed from above. This provides the liquid crystal display panel having wide viewing angle characteristic and carrying out high quality display.Type: ApplicationFiled: February 18, 2011Publication date: February 7, 2013Inventors: Ryohki Itoh, Yuhko Hisada, Satoshi Horiuchi, Takaharu Yamada, Masahiro Yoshida
-
Publication number: 20130009925Abstract: On a display panel 10, a first scanning signal line drive circuit 12 is formed along a side of a display region 11 and a second scanning signal line drive circuit 13 is formed along the opposite side by the same process as pixel circuits. The size of a transistor included, the width of a wiring line, or the like, differs between the first and second scanning signal line drive circuits 12 and 13, and the two scanning signal line drive circuits have different sizes in a lateral direction. By this, the center of the display region matches that of a non-integral-type display panel, ensuring compatibility with the non-integral-type display panel. Moreover, by suitably determining the widths of or spacings between wiring lines included in the two scanning signal line drive circuits, leakage between the wiring lines and breaks in the wiring lines are reduced, improving yield of display panels.Type: ApplicationFiled: January 28, 2011Publication date: January 10, 2013Inventors: Nobuyoshi Ueda, Isao Ogasawara, Satoshi Horiuchi, Shinya Tanaka, Tetsuo Kikuchi, Masahiro Yoshida