Abstract: There is provided a MISFET which suppresses a short-channel effect in a deep submicron region and has a low parasitic resistance, a low parasitic capacitance, and a small drain junction leakage current. A shallow concave is formed in a channel forming portion and an extension region forming portion of a MISFET, shallow ion implantation for forming an extension region is performed to a bottom surface of the shallow concave. Deep ion implantation for forming a source/drain region is performed to a silicon substrate adjacent to the concave, and the position of a peak concentration of the shallow ion implantation is caused to coincide with the position of a peak concentration of the deep ion implantation, so that a MISFET which suppresses a short-channel effect and has a low source/drain parasitic resistance, a low source/drain parasitic capacitance, and a small drain junction leakage current generated by SALICIDE steps can be provided.

Abstract: In a method of manufacturing a semiconductor device having MIS field effect transistors (MIS-FETs) with gate insulating films of two or more different film thicknesses formed on the same silicon semiconductor substrate, first, impurity for enhancing the growth rate of a gate insulating film is selectively doped into an element region on which the gate insulating film is to be formed thick and which is contained in element regions in which the MIS-FETs are to be formed. On the other hand, impurity for lowering the growth rate of a gate insulating film is selectively doped into an element region on which the gate insulating film is to be formed thin and which is contained in the element regions in which the MIS-FETs are to be formed. Next, gate insulating films are formed on the respective element regions by use of the anodic oxidation method or the like.

Abstract: In a DRAM, a plurality of first MOSFETs are formed in a cell region on a semiconductor substrate based on the minimum design rule, and a first gate side-wall having a side-wall insulation film is formed on the side-wall portion of a first gate electrode of each of the first MOSFETs. At least one second MOSFET is formed in a peripheral circuit region on the semiconductor substrate, and a second gate side-wall having side-wall insulation films is formed on the side-wall portion of a second gate electrode of the second MOSFET. Both the first MOSFETs, which is capable of forming a fine contact hole self-aligned with the first gate electrode, and the second MOSFET, which is capable of sufficiently mitigating the parasitic resistance while suppressing the short channel effect, can be formed on the same substrate.

Abstract: Element isolation technique for LSIs having a fine pattern of sub-micron class or finer. A high strained region doped with impurities at a high concentration is formed under, and remote from, a buried insulating material (dielectrics) layer for element isolation. With this buried dielectrics element isolation (BDEI) structure, since the high strained layer exists just under the buried dielectrics layer, crystal defects generated near the buried dielectrics layer due to strain caused by a difference of thermal expansion coefficient between a semiconductor layer and the buried dielectrics layer, are moved toward the high strained layer. Accordingly, the crystal defects do not reach an active region where active elements are formed, so that leakage current in the p-n junction formed in the active layer can be advantageously reduced.

Abstract: A structure of a semiconductor device and a method of manufacturing the same is provided wherein a leakage current can be reduced while improving a drain breakdown voltage of an Insulated-Gate transistor such as a MOSFET, MOSSIT and a MISFET, and a holding characteristic of a memory cell such as a DRAM using these transistors as switching transistors can be improved, and further a reliability of a gate oxide film in a transfer gate can be improved. More particularly, a narrow band gap semiconductor region such as Si.sub.x Ge.sub.1-x, Si.sub.x Sn.sub.1-x, PbS is formed in an interior of a source region or a drain region in the SOI.IG-device. By selecting location and/or mole fraction of the narrow band gap semiconductor region in a SOI film, or selecting a kind of impurity element to compensate the crystal lattice mismatching due to the narrow-bandgap semiconductor region, the generation of crystal defects can be suppressed.

Abstract: A semiconductor device has a semiconductor substrate having a groove, and a semiconductor element formed in a surface region of the semiconductor substrate. A substance having a thermal expansion coefficient different from the semiconductor substrate is embedded in at least a portion of the groove, a crystal defect is generated from the region near the bottom of the groove in the semiconductor substrate, thereby alleviating stress and strain in other regions of the semiconductor substrate, such that such regions cannot generate crystal defects in a region necessary for a circuit operation of the semiconductor element of the surface region.

Abstract: An antibacterial agent characterized by containing a polyelectrolyte complex prepared by reacting a cationic polymer containing N.sup.+ atoms in repeating units thereof and an anionic polymer containing --COO.sup.-, --SO.sub.3.sup.-, or --PO.sub.3.sup.- groups in repeating units thereof, and an antibacterial material carrying the above polyelectrolyte complex on a carrier.

Abstract: An antibacterial agent characterized by containing a polyelectrolyte complex prepared by reacting a cationic polymer containing N.sup.+ atoms in repeating units thereof and an anionic polymer containing --COO.sup.--, --SO.sub.3.sup.--, or --PO.sub.3.sup.-- groups in repeating units thereof, and an antibacterial material carrying the above polyelectrolyte complex on a carrier.

Abstract: A method is provided for determining glucose-6-phosphate, including the step of dehydrogenating glucose-6-phosphate and NAD or NADP in the presence of glucose-6-phosphate dehydrogenase to produce 6-phosphogluconate and NADH or NADPH, wherein the determination is carried out in the presence of 6-phosphogluconolactonase. Also provided is a composition for determining glucose-6-phosphate, characterized by containing 6-phosphogluconolactonase, glucose-6-phosphate dehydrogenase, and NAD or NADP.