Patents by Inventor Satoshi Sugahara

Satoshi Sugahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9225326
    Abstract: A voltage controlled switching element gate drive circuit makes it possible to suppress an occurrence of a malfunction, while suppressing surge voltage, surge current, and switching noise, when switching in a voltage controlled switching element. A gate drive circuit that supplies a gate voltage to the gate of a voltage controlled switching element, thus driving the voltage controlled switching element, includes a high potential side switching element and low potential side switching element connected in series, first variable resistors interposed between at least the high potential side switching element and a high potential power supply or the low potential side switching element and a low potential power supply, and a control circuit that adjusts the resistance values of the first variable resistors.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: December 29, 2015
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Satoshi Sugahara
  • Publication number: 20150318847
    Abstract: A voltage controlled switching element gate drive circuit makes it possible to suppress an occurrence of a malfunction, while suppressing surge voltage, surge current, and switching noise, when switching in a voltage controlled switching element. A gate drive circuit that supplies a gate voltage to the gate of a voltage controlled switching element, thus driving the voltage controlled switching element, includes a high potential side switching element and low potential side switching element connected in series, first variable resistors interposed between at least the high potential side switching element and a high potential power supply or the low potential side switching element and a low potential power supply, and a control circuit that adjusts the resistance values of the first variable resistors.
    Type: Application
    Filed: July 15, 2015
    Publication date: November 5, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Satoshi SUGAHARA
  • Publication number: 20150244265
    Abstract: In a startup circuit, an error amplifier receives a target voltage in a startup period that is a terminal voltage with a shape of a slope generated by charging a capacitor for soft starting with a current from a constant current circuit. A detecting circuit monitors variation of the terminal voltage and blocks pulse from a logic circuit until the terminal voltage, which has been zero volts at the moment of startup, reaches a predetermined threshold value. In this period, the detecting circuit disables the function of the error amplifier. It is not until the terminal voltage VCS reaches the predetermined threshold value and the PWM pulse begins to be delivered that the error amplifier is enabled. At this moment, startup control begins based on the difference between the terminal voltage and the feedback signal. Therefore, the output voltage never rises abruptly.
    Type: Application
    Filed: December 24, 2014
    Publication date: August 27, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Satoshi SUGAHARA
  • Patent number: 9112502
    Abstract: A voltage controlled switching element gate drive circuit makes it possible to suppress an occurrence of a malfunction, while suppressing surge voltage, surge current, and switching noise, when switching in a voltage controlled switching element. A gate drive circuit that supplies a gate voltage to the gate of a voltage controlled switching element, thus driving the voltage controlled switching element, includes a high potential side switching element and low potential side switching element connected in series, first variable resistors interposed between at least the high potential side switching element and a high potential power supply or the low potential side switching element and a low potential power supply, and a control circuit that adjusts the resistance values of the first variable resistors.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: August 18, 2015
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Satoshi Sugahara
  • Patent number: 9093837
    Abstract: An abnormal voltage detecting device monitors abnormal decrease in monitoring voltage during a start up period of a voltage generating apparatus. The abnormal voltage detecting device comprises a level shift circuit that generates a reference voltage for a start up period by reducing, in a predetermined amount, voltage from a reference voltage for soft starting, and further comprises a three input comparator that receives a monitoring voltage, a reference voltage Vref, and the reference voltage for the start up period, and that reverses a logical output when the monitoring voltage is lower than the reference voltage Vref and the reference voltage for the start up period. An abnormality detecting signal is delivered when the logical output of the three input comparator is reversed, and operation of an output circuit is inhibited until the reference voltage for the start up period exceeds a predetermined start up determining voltage.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: July 28, 2015
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Satoshi Sugahara
  • Publication number: 20150137872
    Abstract: A voltage controlled switching element gate drive circuit makes it possible to suppress an occurrence of a malfunction, while suppressing surge voltage, surge current, and switching noise, when switching in a voltage controlled switching element. A gate drive circuit that supplies a gate voltage to the gate of a voltage controlled switching element, thus driving the voltage controlled switching element, includes a high potential side switching element and low potential side switching element connected in series, first variable resistors interposed between at least the high potential side switching element and a high potential power supply or the low potential side switching element and a low potential power supply, and a control circuit that adjusts the resistance values of the first variable resistors.
    Type: Application
    Filed: December 22, 2014
    Publication date: May 21, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Satoshi SUGAHARA
  • Publication number: 20150092819
    Abstract: A sensor signal output circuit includes: a buffer amplifier which amplifies an output of a temperature sensor; an operational amplifier which amplifies an output of the buffer amplifier; an oscillator which generates a triangular wave signal; and a comparator which compares the triangular wave signal with an output of the operational amplifier to generate a PWM signal. After an offset adjusting resistor of the operational amplifier is adjusted at first temperature, the amplitude of the triangular wave signal is set to adjust the pulse width of the PWM signal at the first temperature. After that, a gain adjusting resistor of the operational amplifier is set to adjust the pulse width of the PWM signal at a second temperature.
    Type: Application
    Filed: August 8, 2014
    Publication date: April 2, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Satoshi SUGAHARA
  • Patent number: 8994414
    Abstract: A voltage controlled switching element gate drive circuit makes it possible to suppress an occurrence of a malfunction, while suppressing surge voltage, surge current, and switching noise, when switching in a voltage controlled switching element. A gate drive circuit that supplies a gate voltage to the gate of a voltage controlled switching element, thus driving the voltage controlled switching element, includes a high potential side switching element and low potential side switching element connected in series, first variable resistors interposed between at least the high potential side switching element and a high potential power supply or the low potential side switching element and a low potential power supply, and a control circuit that adjusts the resistance values of the first variable resistors.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: March 31, 2015
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Satoshi Sugahara
  • Publication number: 20150070975
    Abstract: A memory circuit includes: a bistable circuit (30) that writes data; nonvolatile elements (MTJ1, MTJ2) that store the data written in the bistable circuit into the nonvolataole element in a nonvolatile manner, and restore the data stored in a nonvolatile manner into the bistable circuit; and a determining unit (50) that does not store the data written in the bistable circuit into the nonvolatile elements when the data in the bistable circuit is the same as the data in the nonvolatile elements, but stores the data in the bistable circuit into the nonvolatile elements when the data in the bistable circuit is not the same as the data in the nonvolatile elements.
    Type: Application
    Filed: November 18, 2014
    Publication date: March 12, 2015
    Inventors: Shuichiro Yamamoto, Yusuke Shuto, Satoshi Sugahara
  • Publication number: 20150070974
    Abstract: A memory circuit includes: a bistable circuit (30) that stores data; nonvolatile elements (MTJ1, MTJ2) that store data written in the bistable circuit in a nonvolatile manner, and restore data stored in a nonvolatile manner into the bistable circuit; and a control unit that stores data written in the bistable circuit in a nonvolatile manner and cuts off a power supply to the bistable circuit when the period not to read data from or write data into the bistable circuit is longer than a predetermined time period, and does not store data written in the bistable circuit in a nonvolatile manner and makes the supply voltage for the bistable circuit lower than a voltage during the period to read data from or write data into the bistable circuit when the period not to read or write data is shorter than the predetermined time period.
    Type: Application
    Filed: November 17, 2014
    Publication date: March 12, 2015
    Inventors: Yusuke Shuto, Shuichiro Yamamoto, Satoshi Sugahara
  • Patent number: 8952731
    Abstract: A voltage controlled switching element gate drive circuit makes it possible to suppress an occurrence of a malfunction, while suppressing surge voltage, surge current, and switching noise, when switching in a voltage controlled switching element. A gate drive circuit that supplies a gate voltage to the gate of a voltage controlled switching element, thus driving the voltage controlled switching element, includes a high potential side switching element and low potential side switching element connected in series, first variable resistors interposed between at least the high potential side switching element and a high potential power supply or the low potential side switching element and a low potential power supply, and a control circuit that adjusts the resistance values of the first variable resistors.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: February 10, 2015
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Satoshi Sugahara
  • Publication number: 20150002208
    Abstract: A voltage controlled switching element gate drive circuit makes it possible to suppress an occurrence of a malfunction, while suppressing surge voltage, surge current, and switching noise, when switching in a voltage controlled switching element. A gate drive circuit that supplies a gate voltage to the gate of a voltage controlled switching element, thus driving the voltage controlled switching element, includes a high potential side switching element and low potential side switching element connected in series, first variable resistors interposed between at least the high potential side switching element and a high potential power supply or the low potential side switching element and a low potential power supply, and a control circuit that adjusts the resistance values of the first variable resistors.
    Type: Application
    Filed: September 18, 2014
    Publication date: January 1, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Satoshi SUGAHARA
  • Patent number: 8884661
    Abstract: A driver circuit has a detector circuit including a high side detection transistor, a resistor, and a low side detection transistor connected to a high side output transistor and a low side output transistor. A clamping circuit converts a high voltage amplitude change signal generated at a connection point of the high side detection transistor and resistor to a signal clamped to a voltage range applied on the low side. An OR circuit outputs a signal taking the logical sum of an inverted control signal and an output of a low side first stage drive circuit. A level shifter circuit outputs a level-shifted signal of the OR circuit to a high side first stage drive circuit. A second OR circuit outputs a signal wherein the logical sum of an output signal of the clamping circuit and the control signal is inverted to the low side first stage drive circuit.
    Type: Grant
    Filed: February 14, 2013
    Date of Patent: November 11, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Satoshi Sugahara
  • Patent number: 8878573
    Abstract: A voltage controlled switching element gate drive circuit makes it possible to suppress an occurrence of a malfunction, while suppressing surge voltage, surge current, and switching noise, when switching in a voltage controlled switching element. A gate drive circuit that supplies a gate voltage to the gate of a voltage controlled switching element, thus driving the voltage controlled switching element, includes a high potential side switching element and low potential side switching element connected in series, first variable resistors interposed between at least the high potential side switching element and a high potential power supply or the low potential side switching element and a low potential power supply, and a control circuit that adjusts the resistance values of the first variable resistors.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: November 4, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Satoshi Sugahara
  • Publication number: 20130342947
    Abstract: An abnormal voltage detecting device monitors abnormal decrease in monitoring voltage during a start up period of a voltage generating apparatus. The abnormal voltage detecting device comprises a level shift circuit that generates a reference voltage for a start up period by reducing, in a predetermined amount, voltage from a reference voltage for soft starting, and further comprises a three input comparator that receives a monitoring voltage, a reference voltage Vref, and the reference voltage for the start up period, and that reverses a logical output when the monitoring voltage is lower than the reference voltage Vref and the reference voltage for the start up period. An abnormality detecting signal is delivered when the logical output of the three input comparator is reversed, and operation of an output circuit is inhibited until the reference voltage for the start up period exceeds a predetermined start up determining voltage.
    Type: Application
    Filed: May 15, 2013
    Publication date: December 26, 2013
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Satoshi SUGAHARA
  • Publication number: 20120299624
    Abstract: A voltage controlled switching element gate drive circuit makes it possible to suppress an occurrence of a malfunction, while suppressing surge voltage, surge current, and switching noise, when switching in a voltage controlled switching element. A gate drive circuit that supplies a gate voltage to the gate of a voltage controlled switching element, thus driving the voltage controlled switching element, includes a high potential side switching element and low potential side switching element connected in series, first variable resistors interposed between at least the high potential side switching element and a high potential power supply or the low potential side switching element and a low potential power supply, and a control circuit that adjusts the resistance values of the first variable resistors.
    Type: Application
    Filed: May 24, 2012
    Publication date: November 29, 2012
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Satoshi SUGAHARA
  • Patent number: 8295079
    Abstract: The present invention is a memory circuit that includes a bistable circuit that stores data; and a ferromagnetic tunnel junction device that nonvolatilely stores the data stored in the bistable circuit according to a magnetization direction of a ferromagnetic electrode free layer, the data nonvolatilely stored in the ferromagnetic tunnel junction device being able to be restored in the bistable circuit. According to the present invention, writing data to and reading data from the bistable circuit can be performed at high speed. In addition, even though a power source is shut down, it is possible to restore data nonvolatilely stored in the ferromagnetic tunnel junction devices to the bistable circuit.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: October 23, 2012
    Assignee: Tokyo Institute of Technology
    Inventors: Shuichiro Yamamoto, Satoshi Sugahara
  • Patent number: 8174854
    Abstract: A switching power supply system has a control circuit that controls an output voltage by causing a switching device to turn ON and OFF. The control circuit includes a control pulse supplying unit that supplies a pulsed signal that keeps the switching device turned-ON and -OFF. A protection circuit shuts down the switching power supply system upon occurrence of an abnormality. A delay circuit produces a delay signal that delays by a specified time duration the termination of a state of the pulsed signal in which the pulsed signal keeps the switching device turned-ON. The protection circuit is responsive to the pulsed signal or the delay signal to switch between an operation state and a stand-by state.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: May 8, 2012
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Satoshi Sugahara, Kouhei Yamada
  • Patent number: 8097909
    Abstract: When a gate voltage is applied, the Schottky barrier width due to the metallic spin band in the ferromagnetic source decreasing, up-spin electrons from the metallic spin band are tunnel-injected into the channel region. However, down-spin electrons from the nonmagnetic contact are not injected because of the energy barrier due to semiconductive spin band of the ferromagnetic source. Only up-spin electrons are injected into the channel layer from the ferromagnetic source. If the ferromagnetic source and the ferromagnetic drain are parallel magnetized, up-spin electrons are conducted through the metallic spin band of the ferromagnetic drain to become the drain current. Contrarily, if the ferromagnetic source and the ferromagnetic drain are antiparallel magnetized, up-spin electrons cannon be conducted through the ferromagnetic drain. A nonvolatile memory composed of MISFETs operating on the above principle is fabricated.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: January 17, 2012
    Assignee: Japan Science and Technology Agency
    Inventors: Satoshi Sugahara, Masaaki Tanaka
  • Publication number: 20110273925
    Abstract: The present invention is a memory circuit that includes a bistable circuit that stores data, and a ferromagnetic tunnel junction device that nonvolatilely stores the data in the bistable circuit according to a magnetization direction of a ferromagnetic electrode free layer, the data nonvolatilely stored in the ferromagnetic tunnel junction device being able to be restored in the bistable circuit. According to the present invention, writing data to and reading data from the bistable circuit can be performed at high speed. In addition, even though a power source is shut down, it is possible to restore data nonvolatilely stored in the ferromagnetic tunnel junction devices to the bistable circuit.
    Type: Application
    Filed: July 31, 2008
    Publication date: November 10, 2011
    Applicant: TOKYO INSTITUTE OF TECHNOLOGY
    Inventors: Shuichiro Yamamoto, Satoshi Sugahara