Patents by Inventor Satoshi Tamura

Satoshi Tamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240124995
    Abstract: An electrochemical reaction device in an embodiment includes: an electrochemical reaction cell including a first accommodation part for accommodating carbon dioxide, a second accommodation part for accommodating an electrolytic solution containing water, or water vapor, a diaphragm provided between the first accommodation part and the second accommodation part, a reduction electrode arranged in the first accommodation part, and an oxidation electrode arranged in the second accommodation part, a detection unit detecting a reaction amount in the electrochemical reaction cell; a regulation unit regulating an amount of the carbon dioxide to be supplied to the first accommodation part, and a control unit controlling the regulation unit based on a detection signal of the detection unit.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ryota KITAGAWA, Yusuke KOFUJI, Asahi MOTOSHIGE, Masakazu YAMAGIWA, Jun TAMURA, Yuki KUDO, Akihiko ONO, Satoshi MIKOSHIBA
  • Patent number: 11958783
    Abstract: A composition including a binder and a variable thermal conductivity material satisfying a conditional expression 1, wherein a content of the variable thermal conductivity material is from 300 parts by weight to 10,000 parts by weight with respect to a content of 100 parts by weight of the binder: ?max/?25?1.2??[conditional expression 1] (wherein, ?25 represents a thermal conductivity at 25° C., and ?max represents the maximum value of a thermal conductivity at 200° C. or 500° C.).
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: April 16, 2024
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Satoshi Shimano, Atsunori Doi, Fumio Tamura
  • Patent number: 11946150
    Abstract: An electrochemical reaction device in an embodiment includes: a reaction unit including a first accommodation part to accommodate carbon dioxide and a second accommodation part to accommodate an electrolytic solution containing water; a reduction electrode to reduce the carbon dioxide; an oxidation electrode to oxidize the water; a power supply to pass current between the reduction electrode and the oxidation electrode; a pressure regulator to regulate a pressure in the first accommodation part; a reaction product detector to detect at least one of an amount and a kind of a substance produced at the reduction electrode; and a controller to control the pressure regulator based on a detection signal of the reaction product detector.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: April 2, 2024
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ryota Kitagawa, Asahi Motoshige, Yoshitsune Sugano, Masakazu Yamagiwa, Jun Tamura, Yuki Kudo, Akihiko Ono, Satoshi Mikoshiba
  • Patent number: 11939020
    Abstract: A saddle-type vehicle includes an engine, a vehicle body frame, a fuel tank, and a fuel pump configured to supply fuel from the fuel tank to the engine. The vehicle body frame includes a head pipe, one main frame extending rearward and downward from the head pipe, a cross member connected to the rear end of the main frame and extending in the vehicle width direction, a pair of left and right body frames extending downward and rearward from the cross member, and a pair of left and right seat rails connected to the pair of left and right body frames, respectively. The cross member is disposed in front of the fuel pump. The pair of left and right body frames are arranged to sandwich the fuel pump in the vehicle width direction in a top view, and are connected to the cross member.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: March 26, 2024
    Assignee: KAWASAKI MOTORS, LTD.
    Inventors: Takeshi Kashihara, Hiroshi Tamura, Satoshi Morotomi
  • Publication number: 20240093311
    Abstract: It is intended to provide a kit or a device for the detection of breast cancer and a method for detecting breast cancer. The present invention provides a kit or a device for the detection of breast cancer, comprising nucleic acid(s) capable of specifically binding to a miRNA in a sample of a subject, and a method for detecting breast cancer, comprising measuring the miRNA in vitro.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 21, 2024
    Applicants: TORAY INDUSTRIES, INC., NATIONAL CANCER CENTER
    Inventors: Satoshi KONDOU, Hitoshi NOBUMASA, Satoko KOZONO, Hiroko SUDO, Junpei KAWAUCHI, Takahiro OCHIYA, Nobuyoshi KOSAKA, Makiko ONO, Kenji TAMURA
  • Publication number: 20240072605
    Abstract: A brushless motor includes a motor part and a gear part. The motor part includes: a rotating shaft, having a first gear; a rotor, having a bottom wall and a side wall, the bottom wall being fixed to the rotating shaft; magnets, fixed to the side wall and arranged side by side in a circumferential direction of the rotor; a stator, provided between the rotating shaft and the magnets in a radial direction of the rotor and wound with a coil; and a motor housing, rotatably supporting the rotating shaft, and accommodating the rotor and the stator. The gear part includes: a second gear, meshed with the first gear; an output shaft, having an output part, having a base end side thereof fixed to the second gear, and parallel to the rotating shaft; and a gear housing, rotatably supporting the output shaft, and accommodating the second gear.
    Type: Application
    Filed: June 13, 2023
    Publication date: February 29, 2024
    Applicant: MITSUBA Corporation
    Inventors: TEPPEI TOKIZAKI, Motoaki Kobayashi, Satoshi Tamura, Masaki Hayata, Masakazu Saito, Yoshichika Kawashima
  • Publication number: 20230387286
    Abstract: A nitride semiconductor device includes: a substrate; a first semiconductor layer disposed above the substrate; a second semiconductor layer disposed above the first semiconductor layer; a third semiconductor layer disposed above the second semiconductor layer; a first opening which penetrates through the third semiconductor layer and the second semiconductor layer to reach the first semiconductor layer; a semiconductor multilayer including a channel region; a fourth semiconductor layer disposed along the upper surface of the semiconductor multilayer; a gate electrode; a source electrode; a drain electrode; and a groove which is provided at an end portion of the nitride semiconductor device and penetrates through the second semiconductor layer to reach the first semiconductor layer, and a distance between the bottom of the first opening and the substrate is shorter than a distance between the bottom of the groove and the substrate.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 30, 2023
    Inventors: Daisuke SHIBATA, Satoshi TAMURA, Manabu YANAGIHARA
  • Publication number: 20230387288
    Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer of a first conductivity type which is provided above the substrate; a second nitride semiconductor layer which is provided above the first nitride semiconductor layer; an electron transport layer and an electron supply layer which are sequentially provided above the second nitride semiconductor layer; a third nitride semiconductor layer and a gate electrode which are sequentially provided above the electron supply layer; a source electrode; and a drain electrode, the second nitride semiconductor layer includes: a current conducting portion of the first conductivity type which is located below the third nitride semiconductor layer and includes a first impurity; and a current blocking portion which is provided about the current conducting portion, and the concentration of the first impurity in the electron transport layer is lower than the concentration of the first impurity in the current conducting portion.
    Type: Application
    Filed: August 15, 2023
    Publication date: November 30, 2023
    Inventors: Hiroyuki HANDA, Daisuke SHIBATA, Satoshi TAMURA
  • Patent number: 11699751
    Abstract: A parasitic capacitance and a leak current in a nitride semiconductor device are reduced. For example, a 100 nm-thick buffer layer made of AlN, a 2 ?m-thick undoped GaN layer, and 20 nm-thick undoped AlGaN having an Al composition ratio of 20% are epitaxially grown in this order on, for example, a substrate made of silicon, and a source electrode and a drain electrode are formed so as to be in ohmic contact with the undoped AlGaN layer. Further, in the undoped GaN layer and the undoped AlGaN layer immediately below a gate wire, a high resistance region, the resistance of which is increased by, for example, ion implantation with Ar or the like, is formed, and a boundary between the high resistance region and an element region is positioned immediately below the gate wire.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: July 11, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hidekazu Umeda, Kazuhiro Kaibara, Satoshi Tamura
  • Publication number: 20230215923
    Abstract: A nitride semiconductor device includes a substrate, a drift layer and a block layer sequentially provided above the substrate, a gate opening penetrating through a block layer and reaching a drift layer, an electron transit layer and an electron supply layer sequentially provided above the block layer and along the inner surface of the gate opening, a gate electrode provided to cover the gate opening, a source opening penetrating through an electron supply layer and an electron transit layer and reaching the block layer, a source electrode provided in the source opening, and a drain electrode on the rear surface side of the substrate. Seen in a plan view, at least part of an outline of an end of the gate opening in the longitudinal direction follows an arc or an elliptical arc.
    Type: Application
    Filed: March 3, 2023
    Publication date: July 6, 2023
    Applicant: Panasonic Holdings Corporation
    Inventors: Daisuke Shibata, Satoshi Tamura, Nanako Hirashita
  • Patent number: 11643303
    Abstract: According to one embodiment, an elevator passenger detection system comprises an image capturing unit, a detection area setting unit, and a detection processing unit. The image capturing unit captures an image in a predetermined range including a vicinity of a doorway at which a door is opened or closed, from an inside of a car. The detection area setting unit sets a detection area on a front return panel provided on at least one of sides of a doorway of the car, on the captured image obtained by the image capturing unit. The detection processing unit detects presence of a passenger or an object, based on the image in the detection area set by the detection area setting unit.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: May 9, 2023
    Assignee: TOSHIBA ELEVATOR KABUSHIKI KAISHA
    Inventors: Shuhei Noda, Kentaro Yokoi, Sayumi Kimura, Satoshi Tamura
  • Patent number: 11621328
    Abstract: A nitride semiconductor device includes a substrate; a first nitride semiconductor layer above the substrate; a block layer above the first nitride semiconductor layer; a first opening penetrating through the block layer; an electron transit layer and an electron supply layer provided sequentially above the block layer and along an inner surface of the first opening; a gate electrode provided above the electron supply layer to cover the first opening; a second opening penetrating through the electron supply layer and the electron transit layer; a source electrode provided in the second opening; and a drain electrode. When the first main surface is seen in a plan view, (i) the first opening and the source electrode each are elongated in a predetermined direction, and (ii) at least part of an outline of a first end of the first opening in a longitudinal direction follows an arc or an elliptical arc.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: April 4, 2023
    Assignee: PANASONIC HOLDINGS CORPORATION
    Inventors: Daisuke Shibata, Satoshi Tamura, Nanako Hirashita
  • Publication number: 20230088053
    Abstract: An object of the present invention is to provide a film for a capacitor such that the film excels in high-temperature dielectric breakdown voltage (high-temperature BDV) and has blocking resistance, and bleeding-out of, for instance, a nucleating agent is suppressed even after long-term storage. The present invention pertains to a multilayer polypropylene film for a capacitor, the film including a base layer composed of a propylene polymer composition containing a propylene homopolymer (X) and 0.0001 to 0.05 mass % of a polymer-based ?-crystal nucleating agent (C), and a front layer or a back layer composed of a propylene-based polymer (Y) on at least one surface of the base layer, wherein the base layer and the front layer or back layer are stretched.
    Type: Application
    Filed: February 3, 2021
    Publication date: March 23, 2023
    Applicant: PRIME POLYMER CO., LTD.
    Inventors: Jun BIRUKAWA, Satoshi TAMURA, Hiroki SHIMIZU
  • Publication number: 20230058673
    Abstract: A drying furnace comprises a plurality of drying areas that are continuously provided along a longitudinal direction of the furnace and include a first hot air supply port, a second hot air supply port, and an exhaust port. The first hot air supply port is arranged at a position below a vehicle body in the furnace shell to discharge hot air diagonally upward. The second hot air supply port is arranged at a position higher than the first hot air supply port in the furnace shell to discharge hot air diagonally downward. The exhaust port is arranged at a position lower than the first hot air supply port and the second hot air supply port in the furnace shell to discharge the hot air outside the furnace shell. The drying furnace uniformly raises the temperature of the external and internal parts of the vehicle body while shortening the furnace length.
    Type: Application
    Filed: February 5, 2021
    Publication date: February 23, 2023
    Inventors: Satoshi Tamura, Shigeki FUJIWARA
  • Publication number: 20230047842
    Abstract: A nitride semiconductor device includes a substrate, a first electron transport layer above the substrate, a first electron supply layer above the first electron transport layer, a first nitride semiconductor layer above the first electron supply layer, a first opening passing through the first nitride semiconductor layer and the first electron supply layer and reaching the first electron transport layer, a second electron transport layer disposed above the first nitride semiconductor layer and along the inner surface of the first opening, a second electron supply layer disposed above the second electron transport layer and covering the first opening, a gate electrode disposed above the second electron supply layer and covering the first opening, a source electrode connected to the first nitride semiconductor layer and the second electron transport layer, and a drain electrode.
    Type: Application
    Filed: December 21, 2020
    Publication date: February 16, 2023
    Inventors: Masahiro OGAWA, Daisuke SHIBATA, Satoshi TAMURA
  • Patent number: 11515412
    Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer of a first conductivity type; a second nitride semiconductor layer of a second conductivity type; an electron transport layer and an electron supply layer provided, in that order from a side on which the substrate is located, above the second nitride semiconductor layer and on an inner surface of a first opening; a gate electrode provided above the electron supply layer and covering the first opening; a source electrode provided in a second opening and connected to the second nitride semiconductor layer; a drain electrode; a third opening at an outermost edge part in a plan view of the substrate; and a potential fixing electrode provided in the third opening, the potential fixing electrode being connected to the second nitride semiconductor layer and in contact with neither the electron transport layer nor the electron supply layer.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: November 29, 2022
    Assignee: PANASONIC HOLDINGS CORPORATION
    Inventors: Shinji Ujita, Daisuke Shibata, Satoshi Tamura
  • Publication number: 20220376055
    Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer; a second nitride semiconductor layer; a first opening penetrating through the second nitride semiconductor layer to the first nitride semiconductor layer; a second opening penetrating through the second nitride semiconductor layer to the first nitride semiconductor layer; an electron transport layer and an electron supply layer provided along an inner face of each of the first opening and the second opening and above the second nitride semiconductor layer; a gate electrode; an anode electrode; a third opening penetrating through the electron supply layer and the electron transport layer to the second nitride semiconductor layer; a source electrode in the third opening; a drain electrode; and a cathode electrode. The anode electrode and the source electrode are electrically connected, and the cathode electrode and the drain electrode are electrically connected.
    Type: Application
    Filed: September 25, 2020
    Publication date: November 24, 2022
    Inventors: Daisuke SHIBATA, Satoshi TAMURA, Naohiro TSURUMI
  • Publication number: 20220344518
    Abstract: A nitride semiconductor device includes: a substrate; a nitride semiconductor layer above the substrate; a high-resistance layer above the nitride semiconductor layer; a p-type nitride semiconductor layer above the high-resistance layer; a first opening penetrating through the p-type nitride semiconductor layer and the high-resistance layer to the nitride semiconductor layer; an electron transport layer and an electron supply layer covering an upper portion of the p-type nitride semiconductor layer and the first opening; a gate electrode above the electron supply layer; a source electrode in contact with the electron supply layer; a second opening penetrating through the electron supply layer and the electron transport layer to the p-type nitride semiconductor layer; a potential fixing electrode in contact with the p-type nitride semiconductor layer at a bottom part of the second opening; and a drain electrode.
    Type: Application
    Filed: August 11, 2020
    Publication date: October 27, 2022
    Inventors: Naohiro TSURUMI, Daisuke SHIBATA, Satoshi TAMURA
  • Patent number: 11362206
    Abstract: A nitride semiconductor device includes: a substrate having a first main surface and a second main surface; a first nitride semiconductor layer of a first conductivity type provided above the first main surface; a second nitride semiconductor layer of a second conductivity type provided above the first nitride semiconductor layer; a first opening which penetrates through the second nitride semiconductor layer to the first nitride semiconductor layer; an electron transport layer provided above the second nitride semiconductor layer and on an inner surface of the first opening; a gate electrode provided above the electron transport layer and covering the first opening; a source electrode connected to the second nitride semiconductor layer; a drain electrode provided on a second main surface-side of the substrate; and a high-resistance layer provided between the second nitride semiconductor layer and the electron transport layer in the first opening, the high-resistance layer including a nitride semiconductor.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: June 14, 2022
    Assignee: PANASONIC CORPORATION
    Inventors: Masahiro Ogawa, Daisuke Shibata, Satoshi Tamura
  • Publication number: 20220157980
    Abstract: A field-effect transistor includes a substrate having conductivity and made of gallium nitride, a buffer layer provided on the substrate and made of C-doped GaN, a drift layer provided on the buffer layer and made of undoped GaN, and a channel layer provided on the drift layer, made of undoped AlGaN, and joined to the drift layer by heterojunction. A gate electrode is provided on the channel layer. A source electrode and a drain electrode are each provided in regions on both sides of the gate electrode on the channel layer.
    Type: Application
    Filed: August 5, 2019
    Publication date: May 19, 2022
    Inventors: Shinji UJITA, Satoshi TAMURA, Masahiro OGAWA, Daisuke SHIBATA, Hiroyuki HANDA