Patents by Inventor Scott Best
Scott Best has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20050236832Abstract: A card assembly (20) having multiple layers for matching an article to a vehicle. The card assembly (20) includes a liner (28) having a first adhesive (36) and a first layer (40) along with a second adhesive (38) and a second layer (42). A scoreline (26, 50) extends through the first layer (40), first adhesive (36), and liner (28) to define a tag portion (24, 52) of the card assembly. The tag portion (24, 52) may be removed from the second adhesive (38) to expose a portion of the second adhesive (38), which defines an attachment area (48, 54) of a card portion (22). The card portion (22) may be adhered to a vehicle surface, such as the interior of a window, by the attachment area (48, 54). The removed tag portion (24, 52) may be attached to an article, such as a key set, for matching the article to the vehicle.Type: ApplicationFiled: April 22, 2005Publication date: October 27, 2005Inventors: Scott Best, James Turner
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Publication number: 20050212553Abstract: A method and apparatus for selectably providing single-ended and differential signaling with controllable impedance and transition time is provided. According to the method and apparatus, a differential signal can be transmitted over two wires or two single-ended signals can be transmitted over the two wires. According to the method and apparatus, termination may be selected among a single-reference termination, a center termination, or a high-impedance termination. Regardless of the type of termination selected, a capability for dynamic control of the termination impedance is provided. Moreover, an ability to change impedances of termination elements to maintain a desired termination impedance for both single-reference termination and center termination modes by shifting bits is provided. Also, a capability for dynamic control of transition times of signals is provided.Type: ApplicationFiled: May 18, 2005Publication date: September 29, 2005Applicant: Rambus Inc.Inventors: Scott Best, Chiping Yang
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Publication number: 20050210308Abstract: A communication channel includes a first component having a transmitter coupled to a normal signal source, and a second component having a receiver coupled to a normal signal destination. A communication link couples the first and second components. Calibration logic provides for setting an operation value for a parameter of the communication channel, such as by executing an exhaustive calibration sequence at initialization of the link. A tracking circuit, including a monitoring function, tracks drift in the parameter by monitoring a feedback signal that has a characteristic that correlates with drift in the communication channel, and updates, or indicates the need for updating of, the operation value of the parameter in response to the monitoring function.Type: ApplicationFiled: March 17, 2004Publication date: September 22, 2005Applicant: RAMBUS, INC.Inventors: Scott Best, Abhijit Abhyankar, Kun-Yung Chang, Frank Lambrecht
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Publication number: 20050156427Abstract: The subject invention provides an advertising display assembly (10) including two layers of stock material (12, 28) defining a plurality of outer peripheral edges (42, 44, 46). A release liner (24) is sandwiched therebetween. A plurality of score lines (62) define an integral coupon card (20) within the assembly (10) and an outer strip of material (22) between the integral card (20) and the outer peripheral edges (42, 44, 46). A plurality of mini-coupons (58) are detachably cut into the integral card (20) through the second layer of stock material (28). The assembly (10) is characterized by a hinge (74) extending across the strip of material (22) and defining an upper portion (76) and a lower portion (78) in the strip of material (22). The lower portion (78) of the strip of material (22) rotates relative to the upper portion (76) and the integral card (20) for supporting the assembly (10) on a surface (80) in an upright position for display.Type: ApplicationFiled: January 12, 2005Publication date: July 21, 2005Inventors: Scott Best, James Turner
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Patent number: 6919749Abstract: A circuit and method is shown for digital control of delay lines in a delay locked loop (DLL) system. A pair of multiplexors (MUXes) is used to select output taps from a pair of complementary delay lines that delay a reference clock signal in order to lock onto a received clock signal. An output tap from one delay line is used to produce a rising edge in an output clock signal while a corresponding tap in the complementary delay line is used to produce a falling edge in the output signal in order to correct for distortion. The MUXes are controlled based on a phase difference detected between the received clock signal and a feedback clock corresponding to the output clock signal. Another aspect of the present invention provides for generation of a quadrature clock by interpolating between the rising and falling edges selected for the output clock signal. Still another aspect of the present invention provides for selectively disabling unused elements of the delay lines to reduce power consumption.Type: GrantFiled: September 8, 2003Date of Patent: July 19, 2005Assignee: Rambus, Inc.Inventors: Elad Alon, Scott Best
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Publication number: 20050134303Abstract: Described are on-die termination (ODT) systems and methods that facilitate high-speed communication between a transmitter die and a receiver die interconnected via one or more signal transmission lines. An ODT control system in accordance with one embodiment calibrates and maintains the termination resistances for the signal transmission lines. The ODT control system derives a number of calibration currents from precision voltage and resistance references and distributes the reference currents to a number of transmitters. Each transmitter then derives an ODT calibration signal using the respective reference current and another precision resistor, and then employs the calibration signal to calibrate local termination elements. Distributing calibrated currents provides excellent noise immunity, while limiting the requisite number of external voltage references reduces cost.Type: ApplicationFiled: December 19, 2003Publication date: June 23, 2005Inventors: Scott Best, Anthony Wong, David Leung
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Publication number: 20050104619Abstract: A method and apparatus for selectably providing single-ended and differential signaling with controllable impedance and transition time is provided. According to the method and apparatus, a differential signal can be transmitted over two wires or two single-ended signals can be transmitted over the two wires. According to the method and apparatus, termination may be selected among a single-reference termination, a center termination, or a high-impedance termination. Regardless of the type of termination selected, a capability for dynamic control of the termination impedance is provided. Moreover, an ability to change impedances of termination elements to maintain a desired termination impedance for both single-reference termination and center termination modes by shifting bits is provided. Also, a capability for dynamic control of transition times of signals is provided.Type: ApplicationFiled: September 30, 2004Publication date: May 19, 2005Inventors: Scott Best, Chiping Yang
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Publication number: 20050091821Abstract: A manufacturing machine assembly for producing an article having a radio frequency identification (RFID) device. The article is fabricated from a continuous sheet of stock with an adhesive layer and a release liner. A printing station prints indicia on the sheet of stock. A cutting station cuts the continuous sheet of stock to form first and second strips. The release liner is removed from the first strip to expose the adhesive layer and an applicator applies a number of the RFID devices to the exposed adhesive layer. Coupling rollers, each having an integral notch, bond the adhesive layer of the first strip with the second strip such that the RFID devices are sandwiched between the first and second strips. Alternatively, the release liner from the second strip may also be removed such that the adhesive layer of the first strip is bonded with the adhesive layer of the second strip to sandwich the RFID devices between the adhesive layers.Type: ApplicationFiled: November 3, 2004Publication date: May 5, 2005Inventors: Scott Best, James Turner
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Publication number: 20050063163Abstract: An integrated circuit input/output interface with empirically determined delay matching is disclosed. In one embodiment, the integrated circuit input/output interface uses empirical information of the signal traces to adjust the transmit/receive clock of each pin of the interface so as to compensate for delay mismatches caused by differences in signal trace lengths. The empirical information, in one embodiment, includes signal flight time of each signal trace, which can be pre-measured or pre-calculated from known signal trace lengths. The empirical information, in another embodiment, includes trace-specific phase offset values calculated from pre-calculated or pre-measured signal flight times or signal trace lengths. In yet another embodiment, a transmitting device generates a set of serially delayed write clocks, which are used to control symbol transmission over signal traces so as to reduce simultaneous switching output noise and ground bound in the transmitting device.Type: ApplicationFiled: July 21, 2004Publication date: March 24, 2005Inventors: Craig Hampel, Scott Best
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Publication number: 20050064127Abstract: A manufacturing machine assembly and associated method for producing a coupon card. The machine assembly includes a support frame with a printing station for printing indicia on a top surface of a continuous sheet of stock in two parallel rows that define a first strip and a second strip of the stock. A forming station removes a release liner from the first strip to expose an adhesive layer. The forming station also moves the adhesive layer of the first strip into a bonded relationship with the release liner of the second strip to mate the first and second strips and form a continuous series of two-sided coupon cards. Exit rollers completely cut through the series of two-sided coupon cards for forming and separating individual coupon cards from the continuous sheet of stock. A first take-up roller collects a first continuous web of scrap stock.Type: ApplicationFiled: September 20, 2004Publication date: March 24, 2005Inventors: James Turner, Scott Best, Dennis King
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Publication number: 20050035798Abstract: A circuit, apparatus and method provides a lock state value representing an amount of time a phase alignment circuit (“PAC”), such as a PLL or DLL, is tracking or locked to an incoming reference signal for a predetermined period of time. In an embodiment of the present invention, a lock state detection circuit is coupled to a lock loop circuit and includes a phase detection circuit and a counter circuit. The phase detection circuit includes a phase detector and delay elements that are coupled to the PAC phase detector. The phase detector outputs a lock state sample value of the PAC. In an embodiment of the present invention, the PAC is locked when a stream of alternating lock state sample values, logical 1's and 0's, are output from the phase detector. The counter circuit includes a flip-flop, an XOR gate and counter for obtaining a lock state value for a predetermined period of time.Type: ApplicationFiled: August 11, 2003Publication date: February 17, 2005Inventor: Scott Best
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Publication number: 20050005179Abstract: A current controller for a multi-level current mode driver. The current controller includes a multi-level voltage reference and at least one source calibration signal. A comparator is coupled by a coupling network to the multi-level voltage reference and the at least one source calibration signal. A selected voltage is applied from the multi-level voltage reference and a selected source calibration signal is applied from the at least one source calibration signal to the comparator.Type: ApplicationFiled: July 30, 2004Publication date: January 6, 2005Applicant: Rambus, Inc.Inventors: Carl Werner, Mark Horowitz, Pak Chau, Scott Best, Stefanos Sidiropoulos
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Patent number: 6812736Abstract: A method and apparatus for selectably providing single-ended and differential signaling with controllable impedance and transition time is provided. According to the method and apparatus, a differential signal can be transmitted over two wires or two single-ended signals can be transmitted over the two wires. According to the method and apparatus, termination may be selected among a single-reference termination, a center termination, or a high-impedance termination. Regardless of the type of termination selected, a capability for dynamic control of the termination impedance is provided. Moreover, an ability to change impedances of termination elements to maintain a desired termination impedance for both single-reference termination and center termination modes by shifting bits is provided. Also, a capability for dynamic control of transition times of signals is provided.Type: GrantFiled: November 19, 2003Date of Patent: November 2, 2004Assignee: Rambus Inc.Inventors: Scott Best, Chiping Yang
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Publication number: 20040201402Abstract: An input signal is transmitted from a first device to a second device. At the second device the input signal method is received, and an output signal is generated in response to the input signal. The output signal is sensed, and the input signal is dynamically terminated in response to sensing the output data. In some embodiments, the receiving, generating and dynamically terminating occur within a single integrated circuit. In some embodiments, the method includes detecting a signal voltage level of the input signal and causing a termination voltage level to change from a first voltage level to a second voltage level in response to the signal voltage level.Type: ApplicationFiled: March 12, 2004Publication date: October 14, 2004Applicant: Rambus Inc.Inventors: Suresh Rajan, Scott Best
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Publication number: 20040183559Abstract: A method and apparatus for testing and characterizing circuits is provided. In one embodiment, a high-speed interface of a semiconductor component includes high-speed test circuitry. The high-speed test circuitry obviates the need for an external high-speed testing system for testing and characterization. In one embodiment, the high-speed test circuitry includes a test pattern generation circuit, and various differential comparators to compare low bandwidth reference signals with interface signals during testing and characterization. In one embodiment, an interface that includes the test circuitry can test itself or another interface. In one embodiment, a timing reference signal decouples the individual parameters of two interfaces testing each other to avoid any errors introduced by the combination of individual interface circuit parameters, such as receiver parameters and transmitter parameters. The testing can be performed at the wafer stage, at the component stage, and in a system.Type: ApplicationFiled: January 30, 2004Publication date: September 23, 2004Inventors: Frederick Ware, Scott Best, Timothy Chang, Richard Perego, Ely Tsern, Jeff Mitchell
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Patent number: 6781405Abstract: A system and method of terminating signals are described. In one embodiment, the termination system of the present invention comprises a receiver for receiving a signal from a transmission line, a termination node, a resistive element disposed between the receiver and the termination node, and a termination voltage controller for changing the voltage level of the termination node, in response to the detected signal voltage level. In another embodiment, the present invention includes a method of adaptively terminating a signal. The method of this embodiment comprises detecting the voltage level of a signal, selecting the termination voltage level of a termination node in response to the detected signal voltage level, and terminating the signal, through a resistive element, at the selected termination voltage level.Type: GrantFiled: April 29, 2002Date of Patent: August 24, 2004Assignee: Rambus Inc.Inventors: Suresh Rajan, Scott Best
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Patent number: 6772351Abstract: A current controller for a multi-level current mode driver. The current controller includes a multi-level voltage reference and at least one source calibration signal. A comparator is coupled by a coupling network to the multi-level voltage reference and the at least one source calibration signal. A selected voltage is applied from the multi-level voltage reference and a selected source calibration signal is applied from the at least one source calibration signal to the comparator.Type: GrantFiled: September 5, 2000Date of Patent: August 3, 2004Assignee: Rambus, Inc.Inventors: Carl Werner, Mark Horowitz, Pak Chau, Scott Best, Stefanos Sidiropoulos
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Publication number: 20040100309Abstract: A method and apparatus for selectably providing single-ended and differential signaling with controllable impedance and transition time is provided. According to the method and apparatus, a differential signal can be transmitted over two wires or two single-ended signals can be transmitted over the two wires. According to the method and apparatus, termination may be selected among a single-reference termination, a center termination, or a high-impedance termination. Regardless of the type of termination selected, a capability for dynamic control of the termination impedance is provided. Moreover, an ability to change impedances of termination elements to maintain a desired termination impedance for both single-reference termination and center termination modes by shifting bits is provided. Also, a capability for dynamic control of transition times of signals is provided.Type: ApplicationFiled: November 19, 2003Publication date: May 27, 2004Applicant: RAMBUS INC.Inventors: Scott Best, Chiping Yang
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Publication number: 20040084537Abstract: Systems and methods are shown for reading data. One method includes receiving at a first circuit, from a second circuit, a plurality of data input signals and a timing reference signal, generating a plurality of oversampled data input signal and an oversampled timing reference signal, and determining a bit boundary range in the oversampled timing reference signal. The bit boundary range is then applied to the oversampled data input signals to determine a plurality of data words from the plurality of oversampled data input signals.Type: ApplicationFiled: November 5, 2002Publication date: May 6, 2004Inventor: Scott Best
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Publication number: 20040046597Abstract: A circuit and method is shown for digital control of delay lines in a delay locked loop (DLL) system. A pair of multiplexors (MUXes) is used to select output taps from a pair of complementary delay lines that delay a reference clock signal in order to lock onto a received clock signal. An output tap from one delay line is used to produce a rising edge in an output clock signal while a corresponding tap in the complementary delay line is used to produce a falling edge in the output signal in order to correct for distortion. The MUXes are controlled based on a phase difference detected between the received clock signal and a feedback clock corresponding to the output clock signal. Another aspect of the present invention provides for generation of a quadrature clock by interpolating between the rising and falling edges selected for the output clock signal. Still another aspect of the present invention provides for selectively disabling unused elements of the delay lines to reduce power consumption.Type: ApplicationFiled: September 8, 2003Publication date: March 11, 2004Applicant: RAMBUS INC.Inventors: Elad Alon, Scott Best