Abstract: A method comprises receiving a signal from a piezoelectric device and receiving a measurement of a temperature of the piezoelectric device. The method further comprises reading a first parameter from a memory, in which the first parameter depends on the temperature and relates the signal to an acceleration value and reading a second parameter from the memory, in which the second parameter represents a degree of drift of the piezoelectric device at the temperature. The method further comprises determining an acceleration of the piezoelectric device based on the signal, the first parameter, and the second parameter.

Abstract: A micro-electromechanical system (MEMS) device includes a moveable element within a cavity. The MEMS device also includes a first layer over the cavity, the first layer having a first hole and a second hole. The first hole has a first diameter. The second hole has a second diameter. The second diameter is larger than the first diameter, and the second hole is farther from the moveable element than the first hole. The first hole is sealed with a first dielectric material. The second hole is sealed with a second dielectric material. The cavity filled with a gas at a pressure of at least approximately 10 torr.

Abstract: A method includes measuring a temperature of a semiconductor die, in which the semiconductor die includes a piezoelectric device, a pyroelectric device, and a memory. The method further includes receiving a first signal from the pyroelectric device, and based on the first signal, determining a parameter to be combined with a second signal from the piezoelectric device. The method further includes storing the parameter and the measured temperature into the memory.

Abstract: In some examples, an electronic device comprises a first component having a surface, a second component having a surface, and a bond layer positioned between the surfaces of the first and second components to couple the first and second components to each other. The bond layer includes a set of metallic nanowires and a dielectric portion. The dielectric portion comprises a polymer matrix and dielectric nanoparticles.

Abstract: An integrated circuit (IC) including a semiconductor surface layer of a substrate including functional circuitry having circuit elements formed in the semiconductor surface layer configured together with a Metal-Insulator-Metal capacitor (MIM) capacitor on the semiconductor surface layer for realizing at least one circuit function. The MIM capacitor includes a multilevel bottom capacitor plate having an upper top surface, a lower top surface, and sidewall surfaces that connect the upper and lower top surfaces (e.g., a bottom plate layer on a three-dimensional (3D) layer or the bottom capacitor plate being a 3D bottom capacitor plate). At least one capacitor dielectric layer is on the bottom capacitor plate. A top capacitor plate is on the capacitor dielectric layer, and there are contacts through a pre-metal dielectric layer to contact the top capacitor plate and the bottom capacitor plate.

Abstract: An optical device includes a metamaterial layer configured to absorb a portion of an incident light having a frequency spectrum, the portion of the incident light having a frequency range that is narrower than and within the frequency spectrum of the incident light, a photodiode disposed in a layer coupled to the metamaterial layer and configured to detect an amplitude of the portion of the incident light, and shallow trench isolation (STI) structures disposed between the metamaterial layer and the photodiode, the STI structures configured to pass the portion of the incident light within the frequency range from the metamaterial layer to the photodiode.

Abstract: A device includes a die with a metallization stack. The device includes a substrate with a first region, a second region and a third region that underly the metallization stack and a first isolation trench filled with a polymer dielectric that extends between the first region and the second region of the substrate. The device also includes a second isolation trench filled with the polymer dielectric that extends between the second region and the third region. The polymer dielectric overlays a periphery of the substrate.

Abstract: For sensing pH of a fluid, a heating apparatus of a semiconductor die controls a temperature of the fluid to a first temperature. A first voltage of a gate of a floating gate transistor of the semiconductor die is measured while the temperature of the fluid is at the first temperature. Also, the heating apparatus controls the temperature of the fluid to a second temperature that is different than the first temperature. A second voltage of the gate is measured while the temperature of the fluid is at the second temperature. The pH of the fluid is determined based on the first and second voltages, the first temperature and the second temperature.

Abstract: An integrated circuit (IC) includes a substrate having a first surface and a second surface opposite the first surface. The substrate has a first region containing a first circuit and a second region containing a second circuit. The first circuit operates at a first supply voltage. The second circuit operates at a second supply voltage. The second supply voltage is higher than the first supply voltage. The IC includes a through wafer trench (TWT) extending from the first surface of the substrate to the second surface of the semiconductor substrate. The TWT separates the first region from the second region. A dielectric material is in the TWT. An interconnect region has layers of dielectric on the first surface of the substrate. The interconnect region is continuous over the first region, the second region, and the TWT. A non-galvanic communication channel is between the first and second circuits.

Abstract: An integrated circuit (IC) includes a semiconductor substrate and an interconnect region. The semiconductor substrate has a first surface and a second surface opposite the first surface. The semiconductor substrate has a first region with a passive component. The semiconductor substrate has a second region outside the first region. The resistance of the second region is smaller than the resistance of the first region. The interconnection region is on the second surface of the semiconductor substrate.

Abstract: An integrated circuit (IC) includes a semiconductor substrate having a first surface and a second surface opposite the first surface. A through wafer trench (TWT) extends from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate. Dielectric material is in the TWT. An interconnect region has layers of dielectric on the first surface of the substrate. The interconnect region has a conductive transmit patch. An antenna is formed, at least in part, by the dielectric material in the TWT and the transmit patch in the interconnect region. The antenna is configured to transmit or receive electromagnetic radiation between the transmit patch and the second surface of the semiconductor substrate through the dielectric material within the trench.

Abstract: A device includes a die with a protective overcoat and a substrate, the substrate comprising a first region and a second region that are spaced apart. The device also includes an isolation dielectric between the protective overcoat and the die. A pre-metal dielectric (PMD) barrier is between the isolation dielectric and the substrate, the PMD barrier having a first region that contacts the first region of the substrate and a second region that contacts the second region of the substrate, the first region and the second region of the PMD barrier being spaced apart. A through trench filled with a polymer dielectric extends between the first region and the second region of the substrate, and between the first region and the second region of the PMD barrier to contact the isolation dielectric.

Abstract: Disclosed herein is an integrated circuit (IC) comprising a semiconductor wafer, a dielectric layer, and an isolation element. The semiconductor wafer has a first wafer portion and a second wafer portion each extending from a frontside surface to a backside surface. The dielectric layer interfaces with the first wafer portion and with the second wafer portion each on the frontside surface. The isolation element has an isolation dielectric material, and the isolation element extends between a first side surface of the first wafer portion and a second side surface of the second wafer portion and from an extension plane of the frontside surface to an extension plane of the backside surface. Also disclosed herein is a system comprising the IC and a package substrate coupled to the IC.

Abstract: Curing of a passivation layer applied to the surface of a ferroelectric integrated circuit so as to enhance the polarization characteristics of the ferroelectric structures. A passivation layer, such as a polyimide, is applied to the surface of the ferroelectric integrated circuit after fabrication of the active devices. The passivation layer is cured by exposure to a high temperature, below the Curie temperature of the ferroelectric material, for a short duration such as on the order of ten minutes. Variable frequency microwave energy may be used to effect such curing. The cured passivation layer attains a tensile stress state, and as a result imparts a compressive stress upon the underlying ferroelectric material. Polarization may be further enhanced by polarizing the ferroelectric material prior to the cure process.

Abstract: An integrated force sensing element includes a piezoelectric sensor formed in an integrated circuit (IC) chip and a strain gauge at least partially overlying the piezoelectric sensor, where the piezoelectric sensor is able to flex. A human-machine interface using the integrated force sensing element is also disclosed and may include a conditioning circuit, temperature gauge, FRAM and a processor core.

Abstract: A microelectronic device is formed by dispensing discrete amounts of a mixture of photoresist resin and solvents from droplet-on-demand sites onto a wafer to form a first photoresist sublayer, while the wafer is at a first temperature which allows the photoresist resin to attain less than 10 percent thickness non-uniformity. The wafer moves under the droplet-on-demand sites in a first direction to form the first photoresist sublayer. A portion of the solvents in the first photoresist sublayer is removed. A second photoresist sublayer is formed on the first photoresist sublayer using the droplet-on-demand sites while the wafer is at a second temperature to attain less than 10 percent thickness non-uniformity in the combined first and second photoresist sublayers. The wafer moves under the droplet-on-demand sites in a second direction for the second photoresist sublayer, opposite from the first direction.

Abstract: In described examples of a CMOS IC, an ultrasonic transducer having terminals is formed on a substrate of the IC. CMOS circuitry having ultrasonic signal terminals is formed on the substrate. At least one metal interconnect layer overlies the ultrasonic transducer and the CMOS circuitry. The at least one metal interconnect layer connects the CMOS circuitry ultrasonic signal terminals to the terminals of the ultrasonic transducer.

Abstract: A micro-electromechanical system (MEMS) device includes a moveable element within a cavity. The MEMS device also includes a first layer over the cavity, the first layer having a first hole and a second hole. The first hole has a first diameter. The second hole has a second diameter. The second diameter is larger than the first diameter, and the second hole is farther from the moveable element than the first hole. The first hole is sealed with a first dielectric material. The second hole is sealed with a second dielectric material. The cavity filled with a gas at a pressure of at least approximately 10 torr.

Abstract: A method includes measuring a temperature of a semiconductor die, in which the semiconductor die includes a piezoelectric device, a pyroelectric device, and a memory. The method further includes receiving a first signal from the pyroelectric device, and based on the first signal, determining a parameter to be combined with a second signal from the piezoelectric device. The method further includes storing the parameter and the measured temperature into the memory.

Abstract: A method includes depositing a first epitaxial layer of an aluminum gallium nitride (AlGaN) material onto a preliminary substrate and polishing the first layer's surface. Ions are implanted beneath the surface, which is bonded to a seed insulating substrate. Annealing is performed, resulting in second epitaxial layer on preliminary substrate and third epitaxial layer on seed insulating substrate. Third layer's surface is polished to obtain a seed wafer. In some implementations, a fourth epitaxial layer of a second AlGaN material is deposited onto surface of third layer. Fourth layer's surface is polished, and ions are implanted beneath the surface, which is bonded to a product insulating substrate. Annealing is performed, resulting in fifth epitaxial layer on seed insulating substrate and sixth epitaxial layer on product insulating substrate. The sixth layer can be used to obtain an AlGaN product, and the fifth layer can be reused to fabricate additional AlGaN products.