Abstract: Exemplary embodiments of the present invention are directed towards a method for fabricated a memory cell comprising depositing a material to form an interface cap above a bulk conductive plug and below active cell materials in the memory cell.

Abstract: Exemplary embodiments of the present invention are directed towards a method for fabricated a memory cell comprising depositing a material to form an interface cap above a bulk conductive plug and below active cell materials in the memory cell.

Abstract: A method of fabricating a substrate includes forming spaced first features over a substrate. An alterable material is deposited over the spaced first features and the alterable material is altered with material from the spaced first features to form altered material on sidewalls of the spaced first features. A first material is deposited over the altered material, and is of some different composition from that of the altered material. The first material is etched to expose the altered material and spaced second features comprising the first material are formed on sidewalls of the altered material. Then, the altered material is etched from between the spaced second features and the spaced first features. The substrate is processed through a mask pattern comprising the spaced first features and the spaced second features. Other embodiments are disclosed.

Abstract: Exemplary embodiments of the present invention are directed towards a method for fabricated a memory cell comprising depositing a material to form an interface cap above a bulk conductive plug and below active cell materials in the memory cell.

Abstract: A resistive memory includes a memory cell having a first electrode, a second electrode and a resistive memory element between the first electrode and the second electrode. The memory cell includes a thermally insulating region. The thermally insulating region may be included in at least one electrode of the memory cell and/or within an electrically insulating region. The thermally insulating region can confine heat within the memory cell and thereby can reduce the current and/or voltage needed to write information in the resistive memory element.

Abstract: Exemplary embodiments of the present invention are directed towards a method for fabricated a memory cell comprising depositing a material to form an interface cap above a bulk conductive plug and below active cell materials in the memory cell.

Abstract: An integrated circuit and a method of formation provide a contact area formed at an angled end of at least one linearly extending conductive line. In an embodiment, conductive lines with contact landing pads are formed by patterning lines in a mask material, cutting at least one of the material lines to form an angle relative to the extending direction of the material lines, forming extensions from the angled end faces of the mask material, and patterning an underlying conductor by etching using said material lines and extension as a mask. In another embodiment, at least one conductive line is cut at an angle relative to the extending direction of the conductive line to produce an angled end face, and an electrical contact landing pad is formed in contact with the angled end face.

Abstract: Exemplary embodiments of the present invention are directed towards a method for fabricated a memory cell comprising depositing a material to form an interface cap above a bulk conductive plug and below active cell materials in the memory cell.

Abstract: An integrated circuit and a method of formation provide a contact area formed at an angled end of at least one linearly extending conductive line. In an embodiment, conductive lines with contact landing pads are formed by patterning lines in a mask material, cutting at least one of the material lines to form an angle relative to the extending direction of the material lines, forming extensions from the angled end faces of the mask material, and patterning an underlying conductor by etching using said material lines and extension as a mask. In another embodiment, at least one conductive line is cut at an angle relative to the extending direction of the conductive line to produce an angled end face, and an electrical contact landing pad is formed in contact with the angled end face.

Abstract: A method for forming patterns of dense conductor lines and their contact pads is described. Parallel base line patterns are formed over a substrate. Each of the base line patterns is trimmed. Derivative line patterns and derivative transverse patterns are formed as spaces on the sidewalls of the trimmed base line patterns, wherein the derivative transverse patterns are formed between the ends of the derivative line patterns and adjacent to the ends of the trimmed base line patterns. The trimmed base line patterns are removed. At least end portions of the derivative line patterns are removed, such that the derivative line patterns are separated from each other and all or portions of the derivative transverse patterns become patterns of contact pads each connected with a derivative line pattern.

Abstract: An integrated circuit and a method of formation provide a contact area formed at an angled end of at least one linearly extending conductive line. In an embodiment, conductive lines with contact landing pads are formed by patterning lines in a mask material, cutting at least one of the material lines to form an angle relative to the extending direction of the material lines, forming extensions from the angled end faces of the mask material, and patterning an underlying conductor by etching using said material lines and extension as a mask. In another embodiment, at least one conductive line is cut at an angle relative to the extending direction of the conductive line to produce an angled end face, and an electrical contact landing pad is formed in contact with the angled end face.

Abstract: A method of fabricating a substrate includes forming spaced first features over a substrate. An alterable material is deposited over the spaced first features and the alterable material is altered with material from the spaced first features to form altered material on sidewalls of the spaced first features. A first material is deposited over the altered material, and is of some different composition from that of the altered material. The first material is etched to expose the altered material and spaced second features comprising the first material are formed on sidewalls of the altered material. Then, the altered material is etched from between the spaced second features and the spaced first features. The substrate is processed through a mask pattern comprising the spaced first features and the spaced second features. Other embodiments are disclosed.

Abstract: An integrated circuit system, and a method of manufacture thereof, including: an integrated circuit die having an address switch; a bottom electrode contact, free of halogen constituents, characteristic of a chemical vapor deposition or an atomic layer deposition, and coupled to the address switch; a transition material layer directly on the bottom electrode contact; and a top electrode contact, directly on the transition material layer, for forming a non-volatile memory array on the integrated circuit die.

Abstract: Light emitting diodes and associated methods of manufacturing are disclosed herein. In one embodiment, a light emitting diode (LED) includes a substrate, a semiconductor material carried by the substrate, and an active region proximate to the semiconductor material. The semiconductor material has a first surface proximate to the substrate and a second surface opposite the first surface. The second surface of the semiconductor material is generally non-planar, and the active region generally conforms to the non-planar second surface of the semiconductor material.

Abstract: A method of lithographically patterning a substrate that has photoresist having removal areas and non-removal areas includes first exposing at least the non-removal areas to radiation effective to increase outer surface roughness of the photoresist in the non-removal areas at least post-develop but ineffective to change photoresist solubility in a developer for the photoresist to be cleared from the non-removal areas upon develop with the developer. Second exposing of radiation to the removal areas is conducted to be effective to change photoresist solubility in the developer for the photoresist to be cleared from the removal areas upon develop with the developer. The photoresist is developed with the developer effective to clear photoresist from the removal areas and to leave photoresist in the non-removal areas that has outer surface roughness in the non-removal areas which is greater than that before the first exposing. Other implementations and embodiments are contemplated.

Abstract: In one embodiment, a block copolymer-containing composition includes PS-b-PXVP and a lithium salt, where “X” is 2 or 4. All lithium salt is present in the composition at no greater than 1 ppm by weight. In one embodiment, a homogenous block copolymer-including comprising has PS-b-PXVP present in the composition at no less than 99.99998% by weight, where “X” is 2 or 4. Methods of forming such compositions are disclosed.

Abstract: Some embodiments include methods of forming patterns utilizing copolymer. A main body of copolymer may be formed across a substrate, and self-assembly of the copolymer may be induced to form a pattern of structures across the substrate. A uniform thickness throughout the main body of the copolymer may be maintained during the inducement of the self-assembly. In some embodiments, the uniform thickness may be maintained through utilization of a wall surrounding the main body of copolymer to impede dispersal of the copolymer from the main body. In some embodiments, the uniform thickness may be maintained through utilization of a volume of copolymer in fluid communication with the main body of copolymer.

Abstract: A method of forming a pattern on a substrate includes forming spaced features over a substrate. A polymer is adsorbed to outer lateral surfaces of the spaced features. Either material of the spaced features is removed selectively relative to the adsorbed polymer or material of the adsorbed polymer is removed selectively relative to the spaced features to form a pattern on the substrate. In one embodiment, the polymer is of known chain length and has opposing longitudinal ends. One of the longitudinal ends of the polymer adsorbs to the outer lateral surfaces whereby the adsorbed polymer projects lengthwise from the outer lateral surfaces, with said chain length defining a substantially uniform lateral thickness of the adsorbed polymer on the spaced features. Additional embodiments are contemplated.

Abstract: An integrated circuit and a method of formation provide a contact area formed at an angled end of at least one linearly extending conductive line. In an embodiment, conductive lines with contact landing pads are formed by patterning lines in a mask material, cutting at least one of the material lines to form an angle relative to the extending direction of the material lines, forming extensions from the angled end faces of the mask material, and patterning an underlying conductor by etching using said material lines and extension as a mask. In another embodiment, at least one conductive line is cut at an angle relative to the extending direction of the conductive line to produce an angled end face, and an electrical contact landing pad is formed in contact with the angled end face.

Abstract: Various embodiments comprise apparatuses having a number of memory cells including drive circuitry to provide signal pulses of a selected time duration and/or amplitude, and an array of resistance change memory cells electrically coupled to the drive circuitry. The resistance change memory cells may be programmed for a range of retention time periods and operating speeds based on the received signal pulse. Additional apparatuses and methods are described.