Patents by Inventor Sean Eilert

Sean Eilert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10432230
    Abstract: Example embodiments described herein may relate error detection and correction on a portion of a codeword in a memory device.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: October 1, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Christopher Bueb, Sean Eilert
  • Publication number: 20190007529
    Abstract: A method, an apparatus, and a system have been disclosed. An embodiment of the method includes an autonomous memory device receiving a set of instructions, the memory device executing the set of instructions, combining the set of instructions with any data recovered from the memory device in response to the set of instructions into a packet, and transmitting the packet from the memory device.
    Type: Application
    Filed: May 25, 2018
    Publication date: January 3, 2019
    Inventors: Kenneth M. Curewitz, Sean Eilert, Ameen D. Akel, Hongyu Wang
  • Patent number: 10146617
    Abstract: A method includes calculating a first syndrome of a codeword read from a memory location under a first set of conditions and calculating a second syndrome of the codeword read from the memory location under a second set of conditions. The method also includes analyzing the first and second syndromes and applying one of the first and second syndromes to the codeword to find the codeword having a minimum number of errors.
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: December 4, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Christopher Bueb, Sean Eilert
  • Publication number: 20180322085
    Abstract: A hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy or a hierarchical tree structure with other memories. Standard non-hierarchical memory devices can also attach to the output port of the hierarchical memory device.
    Type: Application
    Filed: July 2, 2018
    Publication date: November 8, 2018
    Inventors: Sean Eilert, Mark Leinwander
  • Patent number: 10083122
    Abstract: Subject matter disclosed herein relates to techniques to perform transactions using a memory device.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: September 25, 2018
    Assignee: Micron Technology, Inc.
    Inventor: Sean Eilert
  • Patent number: 10031879
    Abstract: In various embodiments, a hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy and/or a hierarchical tree structure with other memories. Standard non-hierarchical memory devices can also attach to the output port of the hierarchical memory device. Other embodiments are discussed.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: July 24, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Sean Eilert, Mark Leinwander
  • Patent number: 10003675
    Abstract: A method, an apparatus, and a system have been disclosed. An embodiment of the method includes an autonomous memory device receiving a set of instructions, the memory device executing the set of instructions, combining the set of instructions with any data recovered from the memory device in response to the set of instructions into a packet, and transmitting the packet from the memory device.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: June 19, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Kenneth M Curewitz, Sean Eilert, Ameen D. Akel, Hongyu Wang
  • Publication number: 20180024966
    Abstract: An autonomous memory device in a distributed memory sub-system can receive a database downloaded from a host controller. The autonomous memory device can pass configuration routing information and initiate instructions to disperse portions of the database to neighboring die using an interface that handles inter-die communication. Information is then extracted from the pool of autonomous memory and passed through a host interface to the host controller.
    Type: Application
    Filed: October 2, 2017
    Publication date: January 25, 2018
    Inventors: Sean Eilert, Mark Leinwander, Jared Hulbert
  • Publication number: 20170351737
    Abstract: Methods and systems operate to receive a plurality of search requests for searching a database in a memory system. The search requests can be stored in a FIFO queue and searches can be subsequently generated for each search request. The resulting plurality of searches can be executed substantially in parallel on the database. A respective indication is transmitted to a requesting host when either each respective search is complete or each respective search has generated search results.
    Type: Application
    Filed: August 24, 2017
    Publication date: December 7, 2017
    Inventors: Kenneth M. Curewitz, Sean Eilert, Hongyu Wang, Ameen D. Akel
  • Patent number: 9779138
    Abstract: Methods and systems operate to receive a plurality of search requests for searching a database in a memory system. The search requests can be stored in a FIFO queue and searches can be subsequently generated for each search request. The resulting plurality of searches can be executed substantially in parallel on the database. A respective indication is transmitted to a requesting host when either each respective search is complete or each respective search has generated search results.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: October 3, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Kenneth M Curewitz, Sean Eilert, Hongyu Wang, Ameen D. Akel
  • Patent number: 9779057
    Abstract: An autonomous memory device in a distributed memory sub-system can receive a database downloaded from a host controller. The autonomous memory device can pass configuration routing information and initiate instructions to disperse portions of the database to neighboring die using an interface that handles inter-die communication. Information is then extracted from the pool of autonomous memory and passed through a host interface to the host controller.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: October 3, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Sean Eilert, Mark Leinwander, Jared Hulbert
  • Publication number: 20170220516
    Abstract: A hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy or a hierarchical tree structure with other memories. Standard non-hierarchical memory devices can also attach to the output port of the hierarchical memory device.
    Type: Application
    Filed: April 17, 2017
    Publication date: August 3, 2017
    Inventors: Sean Eilert, Mark Leinwander
  • Patent number: 9626327
    Abstract: In various embodiments, a hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy and/or a hierarchical tree structure with other memories. Standard non-hierarchical memory devices can also attach to the output port of the hierarchical memory device. Other embodiments are discussed.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: April 18, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Sean Eilert, Mark Leinwander
  • Patent number: 9612750
    Abstract: An autonomous sub-system receives a database downloaded from a host controller. A controller monitors bus traffic and/or allocated resources in the subsystem and re-allocates resources based on the monitored results to dynamically improve system performance.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: April 4, 2017
    Assignee: Micron Technologies, Inc.
    Inventors: Sean Eilert, Mark Leinwander, Jared Hulbert
  • Patent number: 9563501
    Abstract: A method includes detecting that a first device in a memory array has degraded, the first device storing a portion of a data record, wherein the data record is encoded using a first error control technique. The method continues with recovering the data record using portions of the data record stored in devices other than the first device in the memory array and encoding the data record using a second error control technique. The method also includes storing the data record in the devices of the memory array other than the first device.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: February 7, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Christopher Bueb, Sean Eilert
  • Publication number: 20150370750
    Abstract: A hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy or a hierarchical tree structure with other memories. Standard non-hierarchical memory devices can also attach to the output port of the hierarchical memory device.
    Type: Application
    Filed: August 31, 2015
    Publication date: December 24, 2015
    Inventors: Sean Eilert, Mark Leinwander
  • Publication number: 20150347315
    Abstract: Subject matter disclosed herein relates to techniques to perform transactions using a memory device.
    Type: Application
    Filed: August 10, 2015
    Publication date: December 3, 2015
    Inventor: SEAN EILERT
  • Patent number: 9183070
    Abstract: In an embodiment, a block of memory cells is rested in response to the block of memory cells being deemed to fail. For some embodiments, a rested block may be selected for use in response to passing an operation. In other embodiments, a rested block may be rested again or may be permanently retired from further use in response to failing the operation.
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: November 10, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Todd Marquart, Sampath Ratnam, Sean Eilert
  • Patent number: 9165688
    Abstract: Subject matter disclosed herein relates to determining that a portion of a memory is at least partially non-functional, replacing the portion of at least partially non-functional memory; and adjusting an error detection and/or correction process responsive to determining that the portion of the memory is at least partially non-functional and/or replacing the portion of at least partially non-functional memory.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: October 20, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Chris Bueb, Sean Eilert
  • Patent number: 9123409
    Abstract: A hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy or a hierarchical tree structure with other memories. Standard non-hierarchical memory devices can also attach to the output port of the hierarchical memory device.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: September 1, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Sean Eilert, Mark Leinwander