Abstract: A reliable Flash EPROM in which a band-to-band tunneling current is suppressed. A memory cell is formed on a double well structure region. A second impurity region of a first conductivity type formed in a first impurity region of a second conductivity type on a semiconductor substrate of the first conductivity type. A gate oxide film, a floating gate, an insulating film and a control gate are laminated in this order on a surface of the second impurity region, thereby forming a laminated gate. Source and drain regions are formed in a surface region of the second impurity region with the laminated gate interposed therebetween. The EPROM comprises a voltage supply system to suppress a band-to-band tunneling current. To discharge the floating gate, the semiconductor substrate is grounded and a potential difference between one of the source and drain regions and the second impurity region of the first conductivity type is controlled to be greater than 0 V and smaller than 2.5 V.

Abstract: A semiconductor device comprises a lower conductive layer formed on a semiconductor substrate, a first insulation film layer formed at least on side faces of the lower conductive layer, a second insulation film layer formed around the lower conductive layer on which the first insulation film layer has been formed, a contact hole formed on the second insulation film layer in the vicinity of a side face of the lower conductive layer, and an upper conductive layer formed in the contact hole and over the second insulation film. The first insulation film layer is of a three-film structure comprising a first oxide film, a nitride film and a second oxide film.

Abstract: Disclosed is a semiconductor memory device which has memory cell transistors each comprising a liner source diffusion layer, a land-shaped drain diffusion layer, a gate oxide film containing a floating gate formed on the channel region between those diffusion layers, and a control gate formed on the gate oxide film. Trenches are formed in the substrate in no contact with the channel regions to isolate the cell transistors from each other.

Abstract: A memory coil section, formed on a semiconductor substrate and including a floating gate and a control gate, for storing a charge in a non-volatile semiconductor device is covered with a silicon nitride layer. The periphery of a contact hole for allowing contact between a wiring layer and the substrate is also covered with a silicon nitride layer.

Abstract: Improvement of a fuse for use in the redundancy technique particularly for a semiconductor memory device. The fuse is constituted by an MIS type transistor having a gate insulating layer, which comprises at least two types of insulating films. Redundancy information is stored by shifting the threshold value of the MIS type transistor.

Abstract: A semiconductor device of this invention includes a memory cell matrix having a plurality of memory cells arranged in a matrix form, a group of bit lines connected to the memory cells and disposed for respective columns of the memory cell matrix, and a testing circuit for effecting the test to check whether the memory cell matrix functions correctly or not. The testing circuit includes a first potential supplying circuit having an output terminal connected to even-numbered bit lines of the bit line group to supply a potential which is as high as 9V to the even-numbered bit lines and a second potential supplying circuit having an output terminal connected to odd-numbered bit lines of the bit line group to supply a potential which is as low as 0V to the odd-numbered bit lines.

Abstract: A method for manufacturing a semiconductor memory device according to the present invention, comprises the steps of forming a plurality of striped element separating regions in a surface region of a semiconductor substrate to obtain a plurality of striped element forming regions on the semiconductor substrate, forming at least first, second, and third word lines so as to cross the element forming regions at right angles, delimiting a drain forming region formed between the first and second word lines and surrounded by the element separating regions, and delimiting a source forming region between the second and third word lines, forming a first cover on a region between the first and second word lines, removing the element separating regions from the source forming region, using the first cover and the first, second and third word lines as masks, forming a second cover at least on the source forming region, and introducing impurities whose conductivity type is equal to a conductivity type of the semiconductor

Abstract: In a nonvolatile semiconductor memory device with a two-layer gate structure, an interlayer insulating film is formed on a floating gate electrode of, e.g., polycrystalline silicon. The interlayer insulating film has a four-layer structure in which a first silicon nitride film, a first silicon oxide film, a second silicon nitride film and a second silicon oxide film are laminated in this order on the floating gate electrode, or a two-layer structure in which a first silicon nitride film and a first silicon oxide film are laminated in this order on the floating gate electrode. With the above structure, the threshold voltage of the semiconductor device is stabilized even after data-erase operation. Since, moreover, the first silicon oxide film can be formed by oxidizing the first silicon nitride film, then the quality of the first silicon oxide film can be enhanced, and accordingly the charge retaining properties of the device can be increased.

Abstract: An electrophotographic facsimile apparatus is provided with a main body, a recording mechanism substantially arranged in the main body, for printing received image information onto a recording paper fed through a recording paper path by using electrophotography, and an upper structure is disposed on the main body. The electrophotographic facsimile apparatus further includes an image recording head disposed in the upper structure for reading image information of a document to be transmitted, and an operation unit for inputting operation information. The recording paper path is formed between the main body and the upper structure, and inclines obliquely downward along a direction in which the recording paper is fed. The upper structure has an inclined upper surface parallel with the recording paper path. The operation unit is disposed on the inclined upper surface of the upper structure.

Abstract: An unsaturated polyester resin composition comprising:(a) 30 to 99% by weight of an unsaturated polyester resin comprising a crosslinking monomer and an unsaturated alkyd obtained by reacting at least dicyclopentadiene (hereinafter abbreviated as "DCPD"), an unsaturated polycarboxylic acid and a polyhydric alcohol, and(b) 1 to 70% by weight of a hardness adjusting unsaturated polyester resin.Sheets of base material can be impregnated with the resin composition effectively to give a laminate which is satisfactorily punchable at low temperatures and yet has high resistance to thermal softening and outstanding electrical characteristics.

Abstract: According to a method for manufacturing a nonvolatile semiconductor memory device, first, a CVD oxidation film is formed in a side wall portion of a floating gate formed on a semiconductor substrate. Then, a thermal oxidation film is formed between said floating gate and said CVD oxidation film by a thermal oxidation method. Additionally, before forming said CVD oxidation film, a thermal oxidation film may be formed in the side portion of said floating gate.

Abstract: In a semiconductor memory device of multistage gate structure, the second stage gate electrode (control gate electrode) is of superposed-layer structure of a second polysilicon layer and a high melting point layer or a silicide layer of a high melting point metal layer formed thereon. Those portions of the second polysilicon layer which are above the element forming regions have a thickness larger than 1/2 the width of grooves formed between adjacent first gate electrodes (floating gate electrodes), so that the grooves are filled with the second polysilicon layer to flatten the surfaces of those portions of the second polysilicon layer which are above the grooves.

Abstract: A drum cleaning unit is positioned in an image recording apparatus utilizing an electrophotographic system in which a photoconductive drum is employed to form a toner image thereon. The unit comprises a plurality of blade members for removing residual toner from the surface of the photoconductive drum, and a support structure for independently, adjustably supporting respective blade members on the image recording apparatus.

Abstract: A non-volatile semiconductor memory device such as EPROM or EEPROM includes floating and control gates. Thick oxide portions are formed at each end of the floating gate, and the thickness of the thick oxide portion adjacent to a drain region is thicker than that of the thick oxide portion adjacent to a source region.

Abstract: In a method of manufacturing a semiconductor device of polycide gate structure, a polysilicon layer is formed on the gate insulation film. The polysilicon layer and the gate insulation film are selectively removed to form an opening which reaches the semiconductor substrate in the polysilicon layer and the gate insulation film. After this, a silicide film is formed directly on the polysilicon layer and an exposed part of the semiconductor substrate and then ion-implantation is effected to form source and drain regions. According to the manufacturing method, since the silicide film is formed in direct contact with the semiconductor substrate, charges caused by the ion-implantation can be easily discharged into the semiconductor substrate. Therefore, no gate charge will occur. Further, the gate oxide film is prevented from being brought into contact with the masking photoresist layer by the presence of the polysilicon layer.

Abstract: A polysilicon film is formed on an Si substrate through an insulating oxide film, and a composite film constituted by oxide and nitride films is formed on the polysilicon film. A polycide layer is formed on the composite film, and a metal electrode layer serving as a bonding pad is formed on the polycide layer through a barrier metal layer.

Abstract: A semiconductor memory device includes a first power source terminal supplied with a first power source voltage for data readout, a second power source terminal supplied with a second power source voltage for data write-in, memory cells formed of a floating gate type MOS transistor, a voltage switching circuit for selectively outputting one of the first and second power source voltages supplied to the first and second power source terminals, a voltage lowering circuit for lowering the second power source voltage supplied to the second power source terminal and outputting the lowered voltage, a gate potential control circuit connected to receive an output voltage of the voltage switching circuit as a power source voltage and supplies an output to the gate of the memory cell, and a drain potential control circuit connected to receive an output voltage of the voltage lowering circuit as a power source voltage and supplies an output to the drain of the memory cell.

Abstract: There is formed on a surface of a first conductivity type semiconductor substrate strip shaped first insulator separately extending in parallel with one another. A plurality of stacked gate structures, each comprising a second insulator, a floating gate, a third insulator, a control gate, a fourth insulator and an etching stopper having a slower etching speed than the fourth insulator, are formed on the substrate and the first insulator. Those portions of each first insulator that are located between the parallel extending gate structures and are present at prospective source regions are self-aligningly removed with using one end side of each gate structure as a part of a mask, so as to expose those portions of the substrate that are located at the prospective source regions.

Abstract: In a printer such as a laser beam printer utilized to print an image on a recording medium, an image transferring mechanism such as a photoconductive drum is disposed under the feed path of the recording medium so as to transfer an image such as a toner image onto the undersurface of the recording medium. The recording medium, on which the image is thus transferred is discharged and stacked with the image carrying side down in the proper order.