Patents by Inventor Seiichi Nakatani

Seiichi Nakatani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080251894
    Abstract: A mounted body (100) of the present invention includes: a semiconductor element (10) having a surface (10a) on which element electrodes (12) are formed and a rear surface (10b) opposing the surface (10a); and a mounting board (30) on which wiring patterns (35) each having an electrode terminal (32) are formed. The rear surface (10b) of the semiconductor element (10) is in contact with the mounting board (30), and the element electrodes (12) of the semiconductor element (10) are connected electrically to the electrode terminals (32) of the wiring pattern (35) formed on the mounting board (30) via solder connectors (20) formed of solder particles assembled into a bridge shape. With this configuration, fine pitch connection between the element electrodes of the semiconductor element and the electrode terminals of the mounting board becomes possible.
    Type: Application
    Filed: February 21, 2006
    Publication date: October 16, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiyuki Kojima, Seiichi Nakatani, Yoshihisa Yamashita, Takashi Kitae, Shingo Komatsu
  • Publication number: 20080210458
    Abstract: A flexible substrate comprises: (i) a film; (ii) an insulating resin layer formed on each of a front face of the film and a rear face of the film, which rear face is opposite to the front face; (iii) a front-sided wiring pattern embedded in the insulating resin layer formed on the front face of the film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on the rear face of the film; and (iv) a via which is located between the front-sided wiring pattern and the rear-sided wiring pattern and serves to electrically interconnect the front-sided wiring pattern and the rear-sided wiring pattern, wherein the insulating resin layer formed on each of the front face and the rear face of the film is thicker than the film.
    Type: Application
    Filed: October 29, 2007
    Publication date: September 4, 2008
    Inventors: Yoshihisa Yamashita, Toshio Fujii, Seiichi Nakatani, Takashi Ichiryu, Satoru Tomekawa, Hiroki Yabe
  • Publication number: 20080197173
    Abstract: [Problem] To provide a method for forming solder bumps for realizing high density mounting and a highly reliable method for mounting a semiconductor device. [Means for Solving Problem] A flat plate 10 or 30 having a plurality of projections 12 or recesses 32 thereon is prepared; the flat plate is aligned to oppose an electronic component 14 or 34 and a resin composition 18 or 19 including a solder powder 22 or 23 is supplied to a gap between the flat plate and the electronic component; the resin composition is annealed to melt the solder powder included in the resin composition for growing the solder powder up to the level of the surface of the flat plate by allowing the melted solder powder to self-assemble on terminals 16 or 36, so as to form solder bumps 24 or 38 on the terminals; and the flat plate is removed after cooling and solidifying the solder bumps.
    Type: Application
    Filed: April 25, 2006
    Publication date: August 21, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Takashi Kitae, Seiichi Nakatani, Toshiyuki Kojima, Shingo Komatsu, Yoshihisa Yamashita
  • Patent number: 7400512
    Abstract: A module incorporating a capacitor, the module including a circuit board and a layer incorporating a capacitor, wherein the circuit board includes a wiring layer and a via contact for providing electrical conductivity to a cathode and an anode of the capacitor. The layer incorporating the capacitor includes a ferromagnetic layer integrated with at least a portion of a surface of the capacitor, and in the circuit board or the layer incorporating the capacitor a coil is wound around the capacitor, or an inductor component is disposed in parallel with the capacitor. Accordingly, a module incorporating a capacitor in which miniaturization, a higher density and a reduced thickness have been achieved, as well as a method for producing the module and a capacitor used for the module, are provided.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: July 15, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichi Hirano, Tsunenori Yoshida, Seiichi Nakatani
  • Publication number: 20080165518
    Abstract: A flip chip mounting process or a bump-forming process according to the present invention is characterized in that electrically-conductive particles are fixed on electrodes formed on an electronic component. A composition comprising solder powder, a convection additive and a resin component is supplied onto a surface of the electronic component, the surface is provided with the electrodes. The supplied composition is heated up to a temperature enabling the solder powder to melt. As a result, the convection additive boils or is decomposed so as to generate a gas. The generated gas produces a convection phenomenon within the supplied composition. Since the convection phenomenon promotes the movement of the solder powder, the solder powder can move freely within the composition. The electrically-conductive particles serve as nuclei for the solder powder to self-assemble and grow.
    Type: Application
    Filed: March 13, 2006
    Publication date: July 10, 2008
    Inventors: Takashi Ichiryu, Seiichi Nakatani, Seiji Karashima, Yoshihiro Tomita, Koichi Hirano, Toshio Fujii
  • Patent number: 7394663
    Abstract: An electronic component built-in module according to the present invention includes a pair of opposed circuit substrates, each of which includes a wiring pattern and an insulating base material containing a resin, an insulating layer that is placed between the pair of circuit substrates and contains an inorganic filler and a resin composition containing a thermosetting resin, an electronic component that is embedded in the insulating layer, and an inner via that is provided in the insulating layer so as to make an electrical connection between wiring patterns provided on different circuit substrates. A glass transition temperature Tg1 of the resin composition contained in the insulating layer and a glass transition temperature Tg2 of the insulating base material included in each of the circuit substrates satisfy a relationship Tg1>Tg2.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: July 1, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihisa Yamashita, Koichi Hirano, Yasuhiro Sugaya, Toshiyuki Asahi, Seiichi Nakatani
  • Patent number: 7390692
    Abstract: A semiconductor device (1) of the present invention includes a semiconductor element (103) including electrode parts (104), and a wiring substrate (108) including an insulation layer (101), electrode-part-connection electrodes (102) provided in the insulation layer (101), and external electrodes (107) that is provided in the insulation layer (101) and that is connected electrically with the electrode-part-connection electrodes (102), in which the electrode parts (104) and the electrode-part-connection electrodes (102) are connected electrically with each other. The insulation layer (101) has an elastic modulus measured according to JIS K6911 of not less than 0.1 GP a and not more than 5 GPa, and the electrodes (104) and the electrode-part-connection electrodes (102) are connected by metal joint.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: June 24, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Sugaya, Toshiyuki Asahi, Shingo Komatsu, Yoshiyuki Yamamoto, Seiichi Nakatani
  • Publication number: 20080128664
    Abstract: There is provided a flip-chip mounting resin composition which can be used for a flip-chip mounting process that is high in productivity and reliability and thus can be applicable to a flip-chip mounting of a next-generation LSI. This flip-chip mounting resin composition comprises a resin, metal particles and a convection additive 12 that boils upon heating the resin 13. Upon the heating of the resin 13, the metal particles melt and the boiling convection additive 12 convects within the resin 13. This flip-chip mounting resin composition is supplied between a circuit substrate 10 and a semiconductor chip 20, and subsequently the resin 13 is heated so that the molten metal particles self-assemble into the region between each electrode of the circuit substrate and each electrode of the semiconductor chip. As a result, an electrical connection is formed between each electrode of the circuit substrate and each electrode of the semiconductor chip.
    Type: Application
    Filed: December 14, 2005
    Publication date: June 5, 2008
    Inventors: Takashi Kitae, Seiji Karashima, Koichi Hirano, Toshiyuki Kojima, Seiichi Nakatani, Shingo Komatsu, Yoshihisa Yamashita
  • Patent number: 7365416
    Abstract: A semiconductor module is formed by alternately stacking resin boards 3 on which semiconductor chips 2 are mounted and sheet members having openings larger than the semiconductor chips 2 and bonded to the resin boards 3. The resin board 4 located at the bottom out of the resin boards 3 is thicker than the other resin boards 3.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: April 29, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Kawabata, Motoaki Satou, Toshiyuki Fukuda, Toshio Tsuda, Kazuhiro Nobori, Seiichi Nakatani
  • Publication number: 20080089043
    Abstract: A module incorporating a capacitor, the module including a circuit board and a layer incorporating a capacitor, wherein the circuit board includes a wiring layer and a via contact for providing electrical conductivity to a cathode and an anode of the capacitor. The layer incorporating the capacitor includes a ferromagnetic layer integrated with at least a portion of a surface of the capacitor, and in the circuit board or the layer incorporating the capacitor a coil is wound around the capacitor, or an inductor component is disposed in parallel with the capacitor. Accordingly, a module incorporating a capacitor in which miniaturization, a higher density and a reduced thickness have been achieved, as well as a method for producing the module and a capacitor used for the module, are provided.
    Type: Application
    Filed: November 27, 2007
    Publication date: April 17, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichi HIRANO, Tsunenori Yoshida, Seiichi Nakatani
  • Publication number: 20080070003
    Abstract: A water-repelling layer is formed on a resin film, and a stripe pattern region is formed so as to be positioned within a surface region of the water-repelling layer and so as to be relatively hydrophilic with respect to water repellency of the water-repelling layer. A magnetic stripe pattern is formed of needle-shaped magnetic grains oriented and aggregated in the stripe pattern region. The needle-shaped magnetic grains are arranged in a desirable state in a predetermined stripe pattern, with a high magnetic permeability and a magnetic sheet with stripe-arranged magnetic grains that is thin and flexible is obtained.
    Type: Application
    Filed: August 31, 2007
    Publication date: March 20, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Seiichi NAKATANI, Yoshihisa YAMASHITA, Takashi ICHIRYU, Koichi HIRANO
  • Publication number: 20080047137
    Abstract: A connection member can be produced without a via-forming step. The connection member includes an insulating substrate which has an upper surface, a lower surface opposed to the upper surface, and a side surface which connects these surfaces; and at least one wiring which extends from the upper surface to the lower surface through the side surface.
    Type: Application
    Filed: July 18, 2007
    Publication date: February 28, 2008
    Inventors: Toshiyuki Asahi, Seiji Karashima, Takashi Ichiryu, Seiichi Nakatani, Tousaku Nishiyama, Koichi Hirano, Osamu Shibata, Takeshi Nakayama, Yoshiyuki Saito
  • Publication number: 20080048307
    Abstract: A module that can not only achieve the reduction in size and manufacturing cost but also be impervious to noise due to electromagnetic waves, and a mounted structure using the same are provided. A module (1) includes a substrate (12) and a plurality of semiconductor packages (11a, 11b), each including a semiconductor chip (10), mounted on the substrate (12). Each of the plurality of semiconductor packages (11a, 11b) includes a first radio communication element (16) for transmitting and receiving a signal between the semiconductor chips (10) in the plurality of semiconductor packages (11a, 11b) by radio communication, and the first radio communication element (16) is constituted independently of the semiconductor chip (10).
    Type: Application
    Filed: January 20, 2005
    Publication date: February 28, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiichi Nakatani, Tsutomu Mitani
  • Publication number: 20080017995
    Abstract: There is provided a flip chip mounting process which is high in productivity and reliability, and thus can be applicable to the flip chip mounting of the next-generation LSI. This flip chip mounting process comprises the steps of supplying a resin (13) containing solder powder and a convection additive (12) onto a wiring substrate (10) having a plurality of electrode terminals (11), then bringing a semiconductor chip (20) having a plurality of connecting terminals (11) into contact with a surface of the supplied resin (13), and then heating the wiring substrate (10) to a temperature that enables the solder powder to melt. This heating step is carried out at a temperature higher than the boiling point of the convection additive (12) to allow the boiling convection additive (12) to move within the resin (12).
    Type: Application
    Filed: September 7, 2005
    Publication date: January 24, 2008
    Inventors: Seiji Karashima, Yoshihisa Yamashita, Satoru Tomekawa, Takashi Kitae, Seiichi Nakatani
  • Patent number: 7321496
    Abstract: A flexible substrate comprises: a film; an insulating resin layer formed on each of a front face of the film and a rear face of the film, which rear face is opposite to the front face; a front-sided wiring pattern embedded in the insulating resin layer formed on the front face of the film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on the rear face of the film; and a via which is located between the front-sided wiring pattern and the rear-sided wiring pattern and serves to electrically interconnect the front-sided wiring pattern and the rear-sided wiring pattern, wherein the insulating resin layer formed on each of the front face and the rear face of the film is thicker than the film.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: January 22, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihisa Yamashita, Toshio Fujii, Seiichi Nakatani, Takashi Ichiryu, Satoru Tomekawa, Hiroki Yabe
  • Publication number: 20080011402
    Abstract: A liquid resin in which conductive particles are dispersed is supplied to between a circuit substrate and a semiconductor chip disposed so as to face each other and an ultrasonic wave having an amplitude in a perpendicular direction to a surface of the circuit substrate to generate a standing wave in a resin. Then, the conductive particles dispersed in the resin are captured at nodes of the standing wave to form connection bodies of aggregation of the conductive particles between connection terminals of the semiconductor chip and terminals of the circuit substrate. Thus, the semiconductor chip is mounted on the circuit substrate via the connection bodies. The terminals are arrayed so as to be spaced apart from one another by half a wavelength of the standing wave and each of the nodes of the standing wave are generated at a position between the terminals in the resin.
    Type: Application
    Filed: April 11, 2007
    Publication date: January 17, 2008
    Inventors: Tsukasa Shiraishi, Seiichi Nakatani
  • Patent number: 7319599
    Abstract: A module incorporating a capacitor, the module including a circuit board and a layer incorporating a capacitor, wherein the circuit board includes a wiring layer and a via contact for providing electrical conductivity to a cathode and an anode of the capacitor. The layer incorporating the capacitor includes a ferromagnetic layer integrated with at least a portion of a surface of the capacitor, and in the circuit board or the layer incorporating the capacitor, a coil is wound around the capacitor, or an inductor component is disposed in parallel with the capacitor. Accordingly, a module incorporating a capacitor in which miniaturization, a higher density and a reduced thickness have been achieved, as well as a method for producing the module and a capacitor used for the module, are provided.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: January 15, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichi Hirano, Tsunenori Yoshida, Seiichi Nakatani
  • Publication number: 20070262470
    Abstract: The present invention provides a module with a built-in semiconductor that can suppress a reduction in yield caused by a crack or failure of a semiconductor device in the process of mounting a thin semiconductor device on a wiring board and a method for manufacturing the module. In the module with a built-in semiconductor, a semiconductor device (107) is contained in an interlayer connection member (105) located between a first wiring board (101) and a second wiring board (103). The back side of the semiconductor device (107) is die-bonded to the first wiring board (101) via an adhesive (108), and the semiconductor device (107) is connected electrically to the second wiring pattern (104) via a protruding electrode (109).
    Type: Application
    Filed: September 20, 2005
    Publication date: November 15, 2007
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Ichiryu, Yoshihisa Yamashita, Seiichi Nakatani
  • Publication number: 20070262447
    Abstract: A circuit board 1 having a base material 10 and an electrode 11 formed on at least one main surface of the base material 10 includes an easy peeling portion 12 formed in at least one of an inner portion and a side portion of the electrode 11, with the adhesive strength between the electrode 11 and the easy peeling portion 12 being less than the adhesive strength between the electrode 11 and the base material 10. A circuit board that has high connection reliability and enables narrow pitch mounting thereby can be provided.
    Type: Application
    Filed: May 14, 2007
    Publication date: November 15, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Koichi HIRANO, Tsukasa SHIRAISHI, Seiichi NAKATANI, Tatsuo OGAWA
  • Patent number: 7294587
    Abstract: A component built-in module includes an insulating layer, wirings integrated with both surfaces of the insulating layer, a via connecting the wirings, and one or more components selected from an electronic component and a semiconductor, which is embedded inside of the insulating layer. In this module, at least one of the wirings is formed on a surface of a wiring board, and the components embedded inside of the insulating layer are mounted on and integrated with the wiring board before embedding. This configuration allows the components such as a semiconductor to undergo a mounting inspection and a property inspection before embedding. As a result, the yields of the module can be improved. In addition, since the components are integrated with the wiring board and embedded, the strength thereof can be enhanced.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: November 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiyuki Asahi, Yasuhiro Sugaya, Shingo Komatsu, Yoshiyuki Yamamoto, Seiichi Nakatani