Patents by Inventor Seiichi Uchida

Seiichi Uchida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10082715
    Abstract: A conductive element includes: a first conductive film; a second conductive film connected to the first conductive film; a first insulating film covering the first conductive film and disposed in a layer below the second conductive film, the first insulating film having a contact hole exposing at least an edge face of the first conductive film and thereby connecting the second conductive film to the first conductive film; a second insulating film disposed in a layer above the second insulating film so as to straddle the contact hole; and a third conductive film disposed in a layer above the second conductive film with the second insulating film between the second and third conductive films, the third conductive film having a conductive film opening that contains a location overlapping the edge face of the first conductive film in a plan view.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: September 25, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kuniaki Okada, Seiichi Uchida
  • Publication number: 20180259820
    Abstract: A semiconductor device (100A) includes a thin film transistor (10), an inter-layer insulation layer (22) covering the thin film transistor, and a transparent conductive layer (24) formed on the inter-layer insulation layer. The metal oxide layer (16) of the thin film transistor includes a first portion (16a) overlapping the gate electrode (12) via a gate insulation layer (14) and a second portion (16b) not overlapping the gate electrode (12). The second portion (16b) crosses a different edge (e2) different from an edge (e1) of the drain electrode (18d) on a side of the first portion when viewed in the normal direction of the substrate (11). The inter-layer insulation layer has a contact hole (22a) disposed to overlap a part of the drain electrode (18d) and at least a part of the second portion (16b) of the metal oxide layer when viewed in the normal direction of the substrate.
    Type: Application
    Filed: December 14, 2015
    Publication date: September 13, 2018
    Applicant: Sharp Kabushiki Kaisha
    Inventors: KUNIAKI OKADA, SEIICHI UCHIDA, NAOKI UEDA, SUMIO KATOH
  • Patent number: 10036909
    Abstract: A liquid crystal display device (a display device) includes a liquid crystal panel (a display panel) having an outer peripheral edge portion having a substantially circular shape and including linear edge portions that are linear at a part of the outer peripheral edge portion, and flexible printed circuit boards (mounting components) mounted in an outer portion of the liquid crystal display panel to match arrangement of the linear edge portions in a circumferential direction.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: July 31, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kohhei Tanaka, Tomohiro Kimura, Masahiro Mitani, Takayuki Nishiyama, Hisashi Watanabe, Youhei Nakanishi, Ryuzo Yuki, Masayuki Kanehiro, Seiichi Uchida, Toshihiro Yanagi
  • Publication number: 20180120656
    Abstract: A first substrate (10) of a liquid crystal display device (100) includes a TFT (2) that includes an oxide semiconductor layer (2a). A second substrate (20) includes a color filter layer (22) and a light-shielding layer (21). The light-shielding layer has a first TFT light-shielding portion (21t1) for each row in at least a blue pixel column, and a second TFT light-shielding portion (21t2) every n rows (n represents an integer of 2 or more) in a pixel column in which at least one type of color filter other than blue color filters is provided, the second TFT light-shielding portion having a larger area than the first TFT light-shielding portion. A columnar spacer (40) is arranged so as not to overlap the first TFT light-shielding portion but to overlap the second TFT light-shielding portion.
    Type: Application
    Filed: June 24, 2016
    Publication date: May 3, 2018
    Inventors: Kuniaki OKADA, Seiichi UCHIDA
  • Patent number: 9933676
    Abstract: A liquid crystal panel (100) includes a pair of substrates (10, 30); a liquid crystal layer (40) provided between the pair of substrates; and a sealing member (42) provided so as to surround the liquid crystal layer. A plurality of pixels (P1, P2) are provided in a matrix in a region surrounded by the sealing member. Each of the plurality of pixels includes an oxide semiconductor TFT (5) provided in one substrate (10) of the pair of substrates; and a pixel electrode (19) provided in the one substrate and connected with the oxide semiconductor TFT. Each of the plurality of pixels is configured such that when the oxide semiconductor TFT is switched from an on-state to an off-state, a level of a voltage to be applied to the liquid crystal layer by use of the pixel electrode is shifted in a negative direction by a pull-in voltage ?Vd.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: April 3, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kazuatsu Ito, Tadayoshi Miyamoto, Seiichi Uchida
  • Publication number: 20180031898
    Abstract: A liquid crystal display device (a display device) includes a liquid crystal panel (a display panel) having an outer peripheral edge portion having a substantially circular shape and including linear edge portions that are linear at a part of the outer peripheral edge portion, and flexible printed circuit boards (mounting components) mounted in an outer portion of the liquid crystal display panel to match arrangement of the linear edge portions in a circumferential direction.
    Type: Application
    Filed: March 3, 2016
    Publication date: February 1, 2018
    Inventors: Kohhei TANAKA, Tomohiro KIMURA, Masahiro MITANI, Takayuki NISHIYAMA, Hisashi WATANABE, Youhei NAKANISHI, Ryuzo YUKI, Masayuki KANEHIRO, Seiichi UCHIDA, Toshihiro YANAGI
  • Publication number: 20170363894
    Abstract: A first substrate of a display device includes a TFT provided for each pixel and including an oxide semiconductor layer. A second substrate includes a color filter layer and a light blocking layer. At least one of a first, second and third color filter included in the color filter layer has an average transmittance of 0.2% or less for visible light having a wavelength of 450 nm or less. In pixels provided with color filters having an average transmittance of 0.2% or less for visible light having a wavelength of 450 nm or less, the light blocking layer (a) includes a TFT shading portion extending along a channel length direction and having a width that is less than or equal to a length of the oxide semiconductor layer along a channel width direction; (b) includes a TFT shading portion extending along the channel width direction and having a width that is less than or equal to the length of the oxide semiconductor layer along the channel length direction; or (c) includes no TFT shading portion.
    Type: Application
    Filed: December 11, 2015
    Publication date: December 21, 2017
    Inventors: SEIICHI UCHIDA, KUNIAKI OKADA, NAOKI UEDA
  • Publication number: 20170227802
    Abstract: A conductive element includes: a first conductive film; a second conductive film connected to the first conductive film; a first insulating film covering the first conductive film and disposed in a layer below the second conductive film, the first insulating film having a contact hole exposing at least an edge face of the first conductive film and thereby connecting the second conductive film to the first conductive film; a second insulating film disposed in a layer above the second insulating film so as to straddle the contact hole; and a third conductive film disposed in a layer above the second conductive film with the second insulating film between the second and third conductive films, the third conductive film having a conductive film opening that contains a location overlapping the edge face of the first conductive film in a plan view.
    Type: Application
    Filed: July 29, 2015
    Publication date: August 10, 2017
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Kuniaki OKADA, Seiichi UCHIDA
  • Patent number: 9613990
    Abstract: A semiconductor device (101) includes a plurality of pixel regions Pix arranged in a matrix having a row direction and a column direction, wherein each of the plurality of pixel regions Pix includes a thin film transistor (10) which includes a gate electrode (2), a gate insulating layer (5) covering the gate electrode, an oxide semiconductor layer (7A) provided on the gate insulating layer, and a source electrode (9s) and a drain electrode (9d) which are electrically connected to the oxide semiconductor layer, a metal oxide layer (7B) formed out of a same oxide film as the oxide semiconductor layer, an interlayer insulating layer (13) covering the thin film transistor and the metal oxide layer, and a pixel electrode (15) provided on the interlayer insulating layer and electrically connected to the drain electrode, the metal oxide layer (7B) includes a conductor region (70c), and the pixel electrode (15) overlaps with at least a part of the conductor region (70c) with the interlayer insulating layer (13) inter
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: April 4, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Seiichi Uchida
  • Patent number: 9608008
    Abstract: Each pixel region of an active matrix substrate includes a thin-film transistor, an interlayer insulating layer that includes an organic insulating layer, a transparent connection layer formed on the interlayer insulating layer, an inorganic insulating layer formed on the transparent connection layer, and a pixel electrode formed on the inorganic insulating layer. The transparent connection layer contacts a drain electrode inside of a first contact hole formed in the interlayer insulating layer. The pixel electrode contacts the transparent connection layer inside of a second contact hole formed in the inorganic insulating layer. The first contact hole and the second contact hole do not overlap with one another when a substrate is viewed from a normal direction. Inside the first contact hole, a bottom surface and sidewalls of the first contact hole are covered by the transparent connection layer, the inorganic insulating layer, and the pixel electrode.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: March 28, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kuniaki Okada, Seiichi Uchida
  • Patent number: 9581843
    Abstract: At the time of partial drive, the levels of voltages applied to data lines SL1 to SLn are switched according to a rewrite frequency set for each region of a display screen. For example, in a still-image display region with a relatively low rewrite frequency, the levels of the voltages applied to the data lines SL1 to SLn are set to be higher than those for a moving-image display region with a relatively high rewrite frequency. By this, the same effect as that obtained when a counter voltage is switched according to the rewrite frequency can be obtained. Thus, flicker occurring in each region of the display screen can be suppressed.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: February 28, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Seiji Kaneko, Kaoru Yamamoto, Yasuyuki Ogawa, Kohhei Tanaka, Seiichi Uchida, Yutaka Takamaru, Shigeyasu Mori
  • Patent number: 9570469
    Abstract: An active matrix substrate (100) includes: a gate electrode (12) formed on a substrate; an oxide semiconductor layer (16); a source electrode (14); a drain electrode (15A); a drain connecting portion (15B) as an extended portion of the drain electrode (15A); a first transparent conductive layer (22, 24); and a second transparent conductive layer (26), wherein: the drain connecting portion (15B) is arranged close to the drain electrode (15A); and the drain electrode (15A) extends from a connecting portion thereof for connection with the oxide semiconductor layer (16), across an edge of the gate electrode (12), and to the drain connecting portion (15B), where a width of the drain electrode (15A) is smaller than a width of the drain connecting portion (15B).
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: February 14, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Seiichi Uchida
  • Publication number: 20160380006
    Abstract: A semiconductor device (101) includes a plurality of pixel regions Pix arranged in a matrix having a row direction and a column direction, wherein each of the plurality of pixel regions Pix includes a thin film transistor (10) which includes a gate electrode (2), a gate insulating layer (5) covering the gate electrode, an oxide semiconductor layer (7A) provided on the gate insulating layer, and a source electrode(9s) and a drain electrode (9d) which are electrically connected to the oxide semiconductor layer, a metal oxide layer (7B) formed out of a same oxide film as the oxide semiconductor layer, an interlayer insulating layer (13) covering the thin film transistor and the metal oxide layer, and a pixel electrode (15) provided on the interlayer insulating layer and electrically connected to the drain electrode, the metal oxide layer (7B) includes a conductor region (70c), and the pixel electrode (15) overlaps with at least a part of the conductor region (70c) with the interlayer insulating layer (13) interp
    Type: Application
    Filed: August 28, 2014
    Publication date: December 29, 2016
    Inventor: Seiichi UCHIDA
  • Patent number: 9520097
    Abstract: In a display control circuit (200) of a display device, an image pattern detection portion (230) detects whether an image is an anti-flicker pattern or not, and when it is an anti-flicker pattern, a backlight source is driven (typically, such that its luminance changes in the opposite phase relative to luminance changes that would occur), on the basis of predicted values, which are predetermined so as to compensate for the luminance changes that would occur. Moreover, the backlight is not turned on during the scanning period. As a result, flicker due to current leakage, etc., can be reduced or eliminated in a display device for which a scanning period and a scan stop period are set.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: December 13, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yutaka Takamaru, Seiji Kaneko, Yasuyuki Ogawa, Kaoru Yamamoto, Kohhei Tanaka, Seiichi Uchida, Noriaki Yamaguchi, Shigeyasu Mori
  • Patent number: 9520476
    Abstract: A semiconductor device (100A) includes a substrate (2), an oxide semiconductor layer (5) formed on the substrate (2), source and drain electrodes (6s, 6d) electrically connected to the oxide semiconductor layer (5), a first transparent electrode (7) electrically connected to the drain electrode (6d), a dielectric layer (8) formed on the source and drain electrodes (6s, 6d), and a second transparent electrode (9) formed on the dielectric layer (8). The upper and/or lower surface(s) of the first transparent electrode (7) contacts with a reducing insulating layer (8a) with the property of reducing an oxide semiconductor included in the oxide semiconductor layer (5). The second transparent electrode (9) overlaps at least partially with the first transparent electrode (7) via the dielectric layer (8). The oxide semiconductor layer (5) and the first transparent electrode (7) are formed out of the same oxide film.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: December 13, 2016
    Assignee: Sharp kabushiki Kaisha
    Inventors: Tadayoshi Miyamoto, Kazuatsu Ito, Shigeyasu Mori, Mitsunobu Miyamoto, Yasuyuki Ogawa, Makoto Nakazawa, Seiichi Uchida, Takuya Matsuo
  • Publication number: 20160358943
    Abstract: Each pixel region of an active matrix substrate includes a thin-film transistor, an interlayer insulating layer that includes an organic insulating layer, a transparent connection layer formed on the interlayer insulating layer, an inorganic insulating layer formed on the transparent connection layer, and a pixel electrode formed on the inorganic insulating layer. The transparent connection layer contacts a drain electrode inside of a first contact hole formed in the interlayer insulating layer. The pixel electrode contacts the transparent connection layer inside of a second contact hole formed in the inorganic insulating layer. The first contact hole and the second contact hole do not overlap with one another when a substrate is viewed from a normal direction. Inside the first contact hole, a bottom surface and sidewalls of the first contact hole are covered by the transparent connection layer, the inorganic insulating layer, and the pixel electrode.
    Type: Application
    Filed: February 12, 2015
    Publication date: December 8, 2016
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Kuniaki Okada, Seiichi Uchida
  • Publication number: 20160306247
    Abstract: A liquid crystal panel (100) includes a pair of substrates (10, 30); a liquid crystal layer (40) provided between the pair of substrates; and a sealing member (42) provided so as to surround the liquid crystal layer. A plurality of pixels (P1, P2) are provided in a matrix in a region surrounded by the sealing member. Each of the plurality of pixels includes an oxide semiconductor TFT (5) provided in one substrate (10) of the pair of substrates; and a pixel electrode (19) provided in the one substrate and connected with the oxide semiconductor TFT. Each of the plurality of pixels is configured such that when the oxide semiconductor TFT is switched from an on-state to an off-state, a level of a voltage to be applied to the liquid crystal layer by use of the pixel electrode is shifted in a negative direction by a pull-in voltage ?Vd.
    Type: Application
    Filed: November 28, 2014
    Publication date: October 20, 2016
    Inventors: Kazuatsu ITO, Tadayoshi MIYAMOTO, Seiichi UCHIDA
  • Patent number: 9379250
    Abstract: This semiconductor device (100A) includes: a substrate (2); a gate electrode (3) formed on the substrate (2); a gate insulating layer (4) formed over the gate electrode (3); an oxide semiconductor layer (5) formed on the gate insulating layer (4); source and drain electrodes (6s, 6d) electrically connected to the oxide semiconductor layer (5); a first transparent electrode (7) electrically connected to the drain electrode (6d); an interlayer insulating layer (8a) including portions formed on the source and drain electrodes (6s, 6d); and a second transparent electrode (9) formed on the interlayer insulating layer (8a). At least a portion of the second transparent electrode (9) overlaps with the first transparent electrode (7) with the interlayer insulating layer (8a) interposed between them. And the oxide semiconductor layer (5) and the first transparent electrode (7) are formed out of a same oxide film.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: June 28, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Seiichi Uchida, Yasuyuki Ogawa, Tadayoshi Miyamoto, Kazuatsu Ito, Yutaka Takamaru, Makoto Nakazawa, Mitsunobu Miyamoto
  • Patent number: 9373648
    Abstract: This semiconductor device (100A) includes: an oxide layer (15) which includes a semiconductor region (5) and a conductor region (7) that contacts with the semiconductor region; a source electrode (6s) and a drain electrode (6d) which are electrically connected to the semiconductor region; an insulating layer (11) formed on the source and drain electrodes; a transparent electrode (9) arranged to overlap at least partially with the conductor region with the insulating layer interposed between them; a source line (6a) formed out of the same conductive film as the source electrode; and a gate extended line (3a) formed out of the same conductive film as a gate electrode (3). The source line is electrically connected to the gate extended line via a transparent connecting layer (9a) which is formed out of the same conductive film as the transparent electrode.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: June 21, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yutaka Takamaru, Kazuatsu Ito, Tadayoshi Miyamoto, Mitsunobu Miyamoto, Makoto Nakazawa, Yasuyuki Ogawa, Seiichi Uchida, Shigeyasu Mori
  • Publication number: 20160145242
    Abstract: A medicinal active ingredient is provided which is useful for the treatment or prevention of inflammatory diseases, diseases caused by lipid oxidation, retinochoroidal disorders. A phenylimidazole derivative represented by Formula (IB) or a salt thereof is provided. A therapeutic medicine or preventive medicine is provided for inflammatory diseases, diseases caused by lipid oxidation, or retinochoroidal disorders, the medicine including at least one selected from the phenylimidazole derivative, a salt thereof, and metabolites thereof as an active ingredient. In Formula (IB), R1a represents an alkyl group etc., R2 represents an amino group etc., R3 represents a halogen atom, an alkyl group etc., R4 represents a cyano group etc., R5 represents an alkyl group etc., and R6 represents an alkyl group etc.
    Type: Application
    Filed: June 26, 2014
    Publication date: May 26, 2016
    Applicant: Nippon Soda Co., Ltd.
    Inventors: Nobuhiro UMEDA, Shiro TSUBOKURA, Seiichi UCHIDA, Keiji KOIZUMI, Hiroko MOROE, Ichiro OHSHIO