Patents by Inventor Seiichi Uchida

Seiichi Uchida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140320479
    Abstract: At the time of partial drive, the levels of voltages applied to data lines SL1 to SLn are switched according to a rewrite frequency set for each region of a display screen. For example, in a still-image display region with a relatively low rewrite frequency, the levels of the voltages applied to the data lines SL1 to SLn are set to be higher than those for a moving-image display region with a relatively high rewrite frequency. By this, the same effect as that obtained when a counter voltage is switched according to the rewrite frequency can be obtained. Thus, flicker occurring in each region of the display screen can be suppressed.
    Type: Application
    Filed: September 20, 2012
    Publication date: October 30, 2014
    Inventors: Seiji Kaneko, Kaoru Yamamoto, Yasuyuki Ogawa, Kohhei Tanaka, Seiichi Uchida, Yutaka Takamaru, Shigeyasu Mori
  • Publication number: 20140267464
    Abstract: In a display control circuit (200) of a display device, an image pattern detection portion (230) detects whether an image is an anti-flicker pattern or not, and when it is an anti-flicker pattern, a backlight source is driven (typically, such that its luminance changes in the opposite phase relative to luminance changes that would occur), on the basis of predicted values, which are predetermined so as to compensate for the luminance changes that would occur. Moreover, the backlight is not turned on during the scanning period. As a result, flicker due to current leakage, etc., can be reduced or eliminated in a display device for which a scanning period and a scan stop period are set.
    Type: Application
    Filed: October 31, 2012
    Publication date: September 18, 2014
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Yutaka Takamaru, Seiji Kaneko, Yasuyuki Ogawa, Kaoru Yamamoto, Kohhei Tanaka, Seiichi Uchida, Noriaki Yamaguchi, Shigeyasu Mori
  • Publication number: 20140176845
    Abstract: In order to suppress crosstalk between a pixel electrode and a source line to reduce flicker, an LCD device includes: gate lines 102 and source lines 105 which are provided in a grid pattern; pixel electrodes 111 arranged in a matrix pattern so as to correspond to intersections of the gate lines and the source lines; a transparent auxiliary capacitor electrode 109; and switching elements 121 configured to apply an image signal voltage supplied from the source line 105 to the pixel electrode 111 according to a scanning signal applied from the gate line 102. The switching element 121 is formed by using an oxide semiconductor layer 104, and the transparent auxiliary capacitor electrode 109 is provided between the source line 105 and the pixel electrode 111.
    Type: Application
    Filed: August 3, 2012
    Publication date: June 26, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Seiichi Uchida, Seiji Kaneko, Yasuyuki Ogawa, Kaoru Yamamoto, Kohhei Tanaka, Yutaka Takamaru, Shigeyasu Mori
  • Publication number: 20140168182
    Abstract: Provided is a liquid crystal display device with reduced power consumption employing a CS drive method. A CS driver (500) consists of a CS shift register (510) and a CS output portion (520). The CS shift register (510) outputs control signals (COUT(1) to COUT(m)) in accordance with a CS clock signal CCK. The CS output portion (520) outputs auxiliary capacitance signals (CSS(1) to CSS(m)) in accordance with the control signals (COUT(1) to COUT(m)), respectively. An idle period (T2) is set following a scanning period (T1). During the idle period (T2), the CS driver (500) is driven in accordance with the CS clock signal (CCK) at an idle-period CS frequency (fcck2). The idle-period CS frequency (fcck2) is lower than a scanning-period CS frequency (fcck1).
    Type: Application
    Filed: July 25, 2012
    Publication date: June 19, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kaoru Yamamoto, Seiji Kaneko, Yasuyuki Ogawa, Kohhei Tanaka, Seiichi Uchida, Yutaka Takamaru, Shigeyasu Mori
  • Publication number: 20140145996
    Abstract: A semiconductor layer for an active element included in each of a plurality of pixels in a display section is constituted by an oxide layer containing at least one element selected from the group consisting of In, Ga, and Zn. There is provided, for the display section, a liquid crystal panel's timing controller (13) configured to carry out control so that (i) a length of a first period during which image data is written is not more than twice that of the second period and/or (ii) one (1) frame period is longer than 16.7 msec.
    Type: Application
    Filed: July 27, 2012
    Publication date: May 29, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Yasuhiro Sugita, Kazutoshi Kida, Shinji Yamagishi, Yuhji Yashiro, Hiroyuki Ogawa, Shigeyasu Mori, Seiji Kaneko, Yasuyuki Ogawa, Kaoru Yamamoto, Kohhei Tanaka, Seiichi Uchida, Yutaka Takamaru
  • Patent number: 8704819
    Abstract: There is provided a display device capable of displaying an image that barely changes with low power consumption on the basis of video data included in a transmitted command, and there is also provided a method for driving the same. A display timing controller (31) determines every frame period whether or not an externally transmitted command includes updated video data. As a result, when it is determined that no updated video data is included, screen refreshing is paused by not reading video data stored in frame memory (36). Moreover, when it is determined that updated video data is included, the screen refreshing is performed by reading video data stored in the frame memory (36).
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: April 22, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuyuki Ogawa, Seiji Kaneko, Kaoru Yamamoto, Kohhei Tanaka, Seiichi Uchida, Yutaka Takamaru, Shigeyasu Mori
  • Patent number: 8698726
    Abstract: There is provided an SSD display device with reduced power consumption. A selection circuit (400) consists of k selection blocks (410(1) to 410(k)). Each selection block consists of three thin-film transistors. The three thin-film transistors respectively have three phases of selection control signal (CT) provided to their gate terminals. A scanning period (T1) is provided and followed by an idle period (T2). In the idle period (T2), the three thin-film transistors in each selection block are brought into ON state in accordance with selection control signals (CT) at an idle period frequency (fck2). The idle period frequency (fck2) is lower than a scanning period frequency (fck1).
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: April 15, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kaoru Yamamoto, Seiji Kaneko, Yasuyuki Ogawa, Kohhei Tanaka, Seiichi Uchida, Yutaka Takamaru, Shigeyasu Mori
  • Patent number: 8681279
    Abstract: With an improved light use efficiency, the light detection sensitivity of a thin film diode is increased even if the semiconductor layer of the thin film diode has a small thickness. On one side of a substrate (101), a thin film diode (130) including a first semiconductor layer (131) that has at least an n-type region (131n) and a p-type region (131p) is provided. A light-shielding layer (160) is disposed between the substrate and the first semiconductor layer. The surface of the light-shielding layer facing the first semiconductor layer has depressions and protrusions formed thereon. The surface of the first semiconductor layer facing the light-shielding layer is flatter than the surface of the light-shielding layer on which the depressions and protrusions are formed. The light that falls on the light-shielding layer is diffusely reflected and enters the first semiconductor layer.
    Type: Grant
    Filed: July 16, 2010
    Date of Patent: March 25, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Seiichi Uchida, Tomohiro Kimura, Makoto Nakazawa
  • Publication number: 20140028937
    Abstract: A liquid crystal display device of the present invention is provided with: an array substrate (10) in which a pixel electrode (41), a TFT (20), and a storage capacitor element (30) are provided for each pixel (P); an opposite substrate (50) in which a plurality of common electrodes (59A, 59B) are provided for each pixel (P); a liquid crystal layer (81); and a driver circuit (4) that dividedly drives the liquid crystal layer (81) of each pixel (P) through each of the common electrodes (59A, 59B) by supplying a predetermined potential to each pixel electrode (41) and supplying different potentials to the respective common electrodes (59A, 59B) in each pixel (P). The liquid crystal display device according to the present invention has improved viewing angle dependency of the gamma characteristics, while increasing the aperture ratio of each pixel.
    Type: Application
    Filed: April 13, 2012
    Publication date: January 30, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Seiichi Uchida
  • Publication number: 20140022234
    Abstract: There is provided a display device capable of displaying an image that barely changes with low power consumption on the basis of video data included in a transmitted command, and there is also provided a method for driving the same. A display timing controller (31) determines every frame period whether or not an externally transmitted command includes updated video data. As a result, when it is determined that no updated video data is included, screen refreshing is paused by not reading video data stored in frame memory (36). Moreover, when it is determined that updated video data is included, screen refreshing is performed by reading video data stored in the frame memory (36).
    Type: Application
    Filed: August 29, 2012
    Publication date: January 23, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Yasuyuki Ogawa, Seiji Kaneko, Kaoru Yamamoto, Kohhei Tanaka, Seiichi Uchida, Yutaka Takamaru, Shigeyasu Mori
  • Publication number: 20130314390
    Abstract: There is provided an SSD display device with reduced power consumption. A selection circuit (400) consists of k selection blocks (410(1) to 410(k)). Each selection block consists of three thin-film. transistors. The three thin-film transistors respectively have three phases of selection control signal (CT) provided to their gate terminals. A scanning period (T1) is provided and followed by an idle period (T2). In the idle period (T2), the three thin-film transistors in each selection block are brought into ON state in accordance with selection control signals (CT) at an idle period frequency (fck2). The idle period frequency (fck2) is lower than a scanning period frequency (fck1).
    Type: Application
    Filed: July 25, 2012
    Publication date: November 28, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kaoru Yamamoto, Seiji Kaneko, Yasuyuki Ogawa, Kohhei Tanaka, Seiichi Uchida, Yutaka Takamaru, Shigeyasu Mori
  • Publication number: 20130248857
    Abstract: A TFT substrate (10A), which is semiconductor device of the present invention, has a first substrate (11), and a plurality of TFTs supported by the first substrate (11). Each TFT has an oxide semiconductor layer (22A) supported by the first substrate (11), an insulating layer (32A) formed on the oxide semiconductor layer (22A), a first electrode (12A) formed on the insulating layer (32A), and a second electrode (14A) and a third electrode (13A) connected to the oxide semiconductor layer (22A). The second electrode (14A) and the third electrode (13A) are formed of an oxide conductive layer in which the same oxide semiconductor film as the oxide semiconductor layer (22A) is given a reduced resistance.
    Type: Application
    Filed: November 29, 2011
    Publication date: September 26, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Seiichi Uchida
  • Publication number: 20130057793
    Abstract: In each pixel, an insulating film covering each oxide semiconductor layer is placed between an upper electrode of a storage capacitance element and two source wiring lines that have the upper electrode therebetween. The upper electrode is formed of a conductor layer portion that extends from the oxide semiconductor layer and that has a low resistance, and is thereby integrally formed with the oxide semiconductor layer. Both of the source wiring lines are provided on the insulating film and are connected to the oxide semiconductor layer through contact holes formed in the insulating film.
    Type: Application
    Filed: February 1, 2011
    Publication date: March 7, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Seiichi Uchida
  • Publication number: 20120212687
    Abstract: With an improved light use efficiency, the light detection sensitivity of a thin film diode is increased even if the semiconductor layer of the thin film diode has a small thickness. On one side of a substrate (101), a thin film diode (130) including a first semiconductor layer (131) that has at least an n-type region (131n) and a p-type region (131p) is provided. A light-shielding layer (160) is disposed between the substrate and the first semiconductor layer. The surface of the light-shielding layer facing the first semiconductor layer has depressions and protrusions formed thereon. The surface of the first semiconductor layer facing the light-shielding layer is flatter than the surface of the light-shielding layer on which the depressions and protrusions are formed. The light that falls on the light-shielding layer is diffusely reflected and enters the first semiconductor layer.
    Type: Application
    Filed: July 16, 2010
    Publication date: August 23, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Seiichi Uchida, Tomohiro Kimura, Makoto Nakazawa
  • Patent number: 8188577
    Abstract: The present invention provides a production method of a semiconductor device, involving formation of a flattening layer and easy process for layers formed on a semiconductor layer, and also provides a semiconductor device preferably produced by such a production method. The present invention further provides an exposure apparatus preferably used in such a production method.
    Type: Grant
    Filed: July 14, 2008
    Date of Patent: May 29, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Seiichi Uchida, Hiroyuki Ogawa
  • Publication number: 20100171199
    Abstract: The present invention provides a production method of a semiconductor device, involving formation of a flattening layer and easy process for layers formed on a semiconductor layer, and also provides a semiconductor device preferably produced by such a production method. The present invention further provides an exposure apparatus preferably used in such a production method.
    Type: Application
    Filed: July 14, 2008
    Publication date: July 8, 2010
    Inventors: Seiichi Uchida, Hiroyuki Ogawa
  • Patent number: 7652155
    Abstract: The present invention relates to a compound represented by formula (1): (wherein, R1, R2, R3 and R4 respectively and independently represent a hydrogen atom or a C1-6 alkyl group, and n represents an integer of 1 or 2) and a production process thereof, as well as an antioxidant that contains the compound as its active ingredient, and a kidney disease treatment agent, cerebrovascular disorder treatment agent, retina oxidative disorder inhibitor and lipoxygenase inhibitor that contain the antioxidant.
    Type: Grant
    Filed: April 13, 2004
    Date of Patent: January 26, 2010
    Assignee: Nippon Soda Co., Ltd.
    Inventors: Nobuhiro Umeda, Nobuo Mochizuki, Seiichi Uchida, Seiichi Ikeyama
  • Publication number: 20090306055
    Abstract: The present invention is directed to compounds represented by the formula (1): B-D-Z (1), wherein B represent the following formula (B-1), A represents an optionally substituted imidazole or pyrazole group; E represents the following formula (1a): X represents an oxygen atom, the formula: SOu, or the formula: N—R9; Y represents a carbon atom or a nitrogen atom; D represents an oxygen atom, a sulfur atom or the formula (1a); Z represents (a chroman-2-yl group, a chroman-4-yl group, a 2,3-dihydrobenzofuran-2-yl group, a 2,3-dihydrobenzofuran-3-yl group, etc.) which is substituted with NHR10 or OR11)] or pharmaceutically acceptable salts thereof, and to antioxidants, therapeutic agents for kidney diseases or cerebrovascular disorder, and retinal oxidative damage inhibitors, which include the compounds as the active ingredient.
    Type: Application
    Filed: May 15, 2009
    Publication date: December 10, 2009
    Applicant: NIPPON SODA CO., LTD.
    Inventors: Nobuhiro Umeda, Nobuo Mochizuki, Seiichi Uchida, Mitsumasa Takada, Seiichi Ikeyama, Shiro Tsubokura, Yasuyuki Shiinoki, Fumie Shirato, Hiroko Moroe
  • Publication number: 20090275753
    Abstract: A compound represented by formula (1) or a salt thereof, and an antioxidant drug containing the compound or the salt as an active ingredient, are provided. The compound or salt exhibits effective antioxidant activity in treating ischemic organ disorders and diseases caused by oxidative cell damage, and in inhibiting retinal lesions caused by oxidation due to the effects of light.
    Type: Application
    Filed: November 6, 2006
    Publication date: November 5, 2009
    Applicant: NIPPON SODA CO., LTD.
    Inventors: Shiro Tsubokura, Nobuhiro Umeda, Seiichi Uchida
  • Patent number: 7553837
    Abstract: The present invention is directed to compounds represented by the formula (1): B-D-Z (1), wherein B represent the following formula (B-1), (B-2) or (B-3); A represents an optionally substituted imidazole or pyrazole group; E represents the following formula (1a); X represents an oxygen atom, the formula: SOu, or the formula: N—R9; Y represents a carbon atom or a nitrogen atom; D represents an oxygen atom, a sulfur atom or the formula (1a); Z represents (a chroman-2-yl group, a chroman-4-yl group, a 2,3-dihydrobenzofuran-2-yl group, a 2,3-dihydrobenzofuran-3-yl group, etc.) which is substituted with NHR10 or OR11)] or pharmaceutically acceptable salts thereof, and to antioxidants, therapeutic agents for kidney diseases or cerebrovascular disorder, and retinal oxidative damage inhibitors, which include the compounds as the active ingredient.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: June 30, 2009
    Assignee: Nippon Soda Co., Ltd.
    Inventors: Nobuhiro Umeda, Nobuo Mochizuki, Seiichi Uchida, Mitsumasa Takada, Seiichi Ikeyama, Shiro Tsubokura, Yasuyuki Shiinoki, Fumie Shirato, Hiroko Momoe