Patents by Inventor Seiichi Yoneda

Seiichi Yoneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230075180
    Abstract: A semiconductor device that level-shifts a negative voltage and/or a positive voltage is provided. The semiconductor device includes a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor, an input terminal, and an output terminal. A first terminal of the first transistor is electrically connected to a first terminal of the second transistor and the output terminal. A second terminal of the second transistor is electrically connected to a first terminal of the third transistor. A first terminal of the fourth transistor is electrically connected to a gate of the second transistor and a first terminal of the first capacitor, and a second terminal of the first capacitor is electrically connected to the input terminal. The first transistor, the second transistor, the third transistor, and the fourth transistor are of the same polarity.
    Type: Application
    Filed: January 26, 2021
    Publication date: March 9, 2023
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki INOUE, Seiichi YONEDA
  • Patent number: 11600645
    Abstract: An imaging device that can obtain imaging data corresponding to high-resolution images in a short period of time is provided. The imaging device includes a pixel including a photoelectric conversion element and n (n is an integer more than 2 inclusive) retention circuits. The photoelectric conversion element and the n retention circuits are stacked. One electrode of the photoelectric conversion element is electrically connected to the first to n-th retention circuits. The retention circuits include OS transistors with an extremely low off-state current feature, and can retain imaging data for a long time. In the first to n-th periods, the imaging device obtains the first to n-th imaging data and retains it in the first to n-th retention circuits. Then, the first to n-th imaging data retained in the first to n-th retention circuits are read out. The read imaging data is output outside the imaging data through AD conversion.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: March 7, 2023
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Seiichi Yoneda, Hidetomo Kobayashi, Takashi Nakagawa, Yusuke Negoro, Shunpei Yamazaki
  • Publication number: 20230054986
    Abstract: An imaging device capable of image processing is provided. The imaging device has an image recognition function. In the imaging device, cells have a function of acquiring imaging data and a function of retaining weight data. Among the cells arranged in a matrix, some of the cells acquire imaging data and the rest of the cells retain weight data. Then, arithmetic operation is performed using the imaging data and the weight data. For example, all the imaging data can be subjected to arithmetic operation where products of the imaging data and the weight data are calculated and the sum of the calculated products is calculated. That is, product-sum operation can be performed. When an arithmetic operation result is captured by a neural network such as a convolutional neural network (CNN) or the like, the additional function can be used because image processing can be performed on the imaging data.
    Type: Application
    Filed: February 22, 2021
    Publication date: February 23, 2023
    Inventors: Seiichi YONEDA, Takayuki IKEDA, Hiroki INOUE, Yusuke NEGORO, Shunpei YAMAZAKI
  • Publication number: 20220415941
    Abstract: An imaging device with an arithmetic function in which the circuit size is reduced is provided. The imaging device includes a plurality of pixel blocks. Each of the pixel blocks includes N (N is an integer greater than or equal to 1) first circuits, N second circuits, and a third circuit. Each of the first circuits includes a photoelectric conversion device, and the photoelectric conversion device has a function of converting incident light into an electrical signal and has a function of outputting a first signal that is obtained by binarizing the electrical signal to the second circuit. Each of the second circuits has a function of outputting a second signal that is obtained by multiplying the first signal by a weight coefficient to a third circuit. When the N second signals are output to a wiring electrically connected to the third circuit, addition is performed. The first circuit includes a transistor, and an OS transistor is preferably used as the transistor.
    Type: Application
    Filed: December 14, 2020
    Publication date: December 29, 2022
    Inventors: Seiichi YONEDA, Toshiki HAMADA, Yuki OKAMOTO, Shunpei YAMAZAKI
  • Publication number: 20220416767
    Abstract: A semiconductor device with a small circuit scale is provided. The semiconductor device includes a first circuit and a second circuit. The first circuit includes first to n-th (n is an integer of 2 or more) transistors and the second circuit includes (n+1)-th to 2n-th transistors. The first to n-th transistors are connected in parallel to each other and the (n+1)-th to 2n-th transistors are connected in series to each other. First to n-th signals are supplied to the first circuit and the second circuit. The first circuit has a function of outputting a first potential when each of potentials of the first to n-th signals is lower than or equal to a first reference potential, and outputting a second potential when at least one of the potentials of the first to n-th signals is higher than the first reference potential.
    Type: Application
    Filed: November 16, 2020
    Publication date: December 29, 2022
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki INOUE, Seiichi YONEDA, Yusuke NEGORO
  • Publication number: 20220359592
    Abstract: An imaging device that has an image processing function and is capable of a high-speed operation is provided. The imaging device, which has an additional function such as image processing, can retain analog data obtained by an image capturing operation in a pixel and extract data obtained by multiplying the analog data by a predetermined weight coefficient. In the imaging device, some of potentials used for an arithmetic operation in pixels are generated by redistribution of charge with which wirings are charged. This enables an arithmetic operation to be performed at high speed with low power consumption, compared with the case where the potentials are supplied from another circuit to the pixels.
    Type: Application
    Filed: August 7, 2020
    Publication date: November 10, 2022
    Inventors: Seiichi YONEDA, Yusuke NEGORO, Takayuki IKEDA, Shunpei YAMAZAKI
  • Publication number: 20220344392
    Abstract: An imaging device capable of taking an image in both a dark environment and a bright environment in a light amount range equivalent to or greater than that of human vision is desired. A wide dynamic range and high image quality are achieved. In order to obtain an image with a widened dynamic range, two capacitors, a large capacitor and a small capacitor, are provided in one pixel. The large capacitor is formed to be interposed between a transistor for controlling the amount of charge overflowed from the small capacitor and a transistor for resetting accumulated charge, and OS transistors are used as these two transistors. The OS transistor has extremely low off-state current characteristics, and thus can widen the dynamic range of imaging.
    Type: Application
    Filed: August 25, 2020
    Publication date: October 27, 2022
    Inventors: Seiichi YONEDA, Yusuke NEGORO
  • Publication number: 20220326384
    Abstract: An object is to obtain accurate distance image data by denoising. Another object is to realize distance image data acquisition in a short time by reducing the frequency of accumulating. A distance image processing system including a solid-state imaging element that can be used for three-dimensionally recognizing an object is provided for the utilization of autonomous driving of passenger cars, for example. Image processing including distance information obtained by a TOF system solid-state imaging element, a so-called TOF camera, is performed by utilizing deep learning. A high-accurate distance image with noise reduced by deep learning can be obtained.
    Type: Application
    Filed: August 7, 2020
    Publication date: October 13, 2022
    Inventors: Yusuke NEGORO, Seiichi YONEDA
  • Publication number: 20220320172
    Abstract: The present invention relates to a highly functional imaging device that can be manufactured through a small number of steps. A first stacked body is formed in which a circuit provided with a transistor including a metal oxide in its channel formation region (hereinafter, OS transistor) is stacked over a circuit including a Si transistor. A second stacked body is formed in which an OS transistor is provided over a Si photodiode. Layers including the OS transistors of the first stacked body and the second stacked body are bonded to each other to obtain electrical connection between circuits. With such a structure, even when a structure is employed in which a plurality of circuits having different functions are stacked, the number of polishing steps and bonding steps can be reduced, improving the yield.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 6, 2022
    Inventors: Yusuke NEGORO, Seiichi YONEDA
  • Publication number: 20220321794
    Abstract: An imaging device capable of executing image processing is provided. An imaging device with low power consumption is provided. A highly reliable imaging device is provided. An imaging device with higher integration degree of pixels is provided. An imaging device manufactured at low cost is provided. The imaging device includes a photoelectric conversion device, a first transistor that is formed in a first layer and includes silicon in a channel formation layer, and a capacitor that is formed in a second layer bonded to the first layer. One of a source and a drain of the first transistor is electrically connected to one of electrodes of the photoelectric conversion device, and the other of the source and the drain of the first transistor is electrically connected to one of electrodes of the capacitor. A pixel having a function of generating first data and a function of multiplying the first data to have a given magnification to generate second data is included.
    Type: Application
    Filed: July 9, 2020
    Publication date: October 6, 2022
    Inventors: Seiichi YONEDA, Yusuke NEGORO
  • Publication number: 20220303494
    Abstract: An imaging system that has an image processing function and is capable of generating an interpolation image is provided. The imaging system has an additional function such as image processing and can generate an interpolation image by using image data output from an imaging device. The imaging device can perform filter processing in parallel during a light exposure period, and thus can perform a large amount of arithmetic operation and generate a high-quality interpolation image. The number of arithmetic operations can be further increased particularly during image capturing in a dark place, which requires a long exposure time. Accordingly, the frame rate can be substantially increased, and high-quality moving image data can be generated.
    Type: Application
    Filed: September 7, 2020
    Publication date: September 22, 2022
    Inventors: Yusuke NEGORO, Seiichi YONEDA
  • Publication number: 20220279140
    Abstract: An imaging device with a novel structure is provided. The imaging device includes an imaging region provided with a plurality of pixels. The plurality of pixels included in the imaging region include a first pixel and a second pixel. The imaging device has a function of selecting a first region or a second region. The first region includes the same number of pixels as the second region. The first region includes at least the first and second pixels. The second region includes at least the second pixel. The pixels included in the first region or the second region have a function of outputting imaging signals obtained by the pixels. The imaging device generates first image data by concurrently reading the imaging signals output from the pixels included in the first region and performing arithmetic operation on the signals.
    Type: Application
    Filed: July 28, 2020
    Publication date: September 1, 2022
    Inventors: Seiichi YONEDA, Hiromichi GODO, Yusuke NEGORO, Hiroki INOUE, Takahiro FUKUTOME
  • Publication number: 20220276838
    Abstract: A semiconductor device having a novel structure is provided. The semiconductor device includes a plurality of operation circuits that can switch different kinds of operation processing; a plurality of switch circuits that can switch a connection state between the operation circuits; and a controller. The operation circuit includes a first memory that stores data corresponding to a weight parameter used in the plurality of kinds of operation processing. The operation circuit executes a product-sum operation by switching weight data in accordance with a context. The switch circuit includes a second memory that stores data for switching a plurality of connection states in response to switching of a second context signal. The controller generates a second context signal on the basis of a first context signal. The amount of data stored in the second memory can be smaller than the amount of data stored in the first memory in the operation circuit.
    Type: Application
    Filed: April 8, 2022
    Publication date: September 1, 2022
    Inventors: Munehiro KOZUMA, Takeshi AOKI, Seiichi YONEDA, Yoshiyuki KUROKAWA
  • Publication number: 20220264046
    Abstract: An imaging device having a motion detecting function and an image processing function is provided. The imaging device can detect a difference between a reference frame image and a comparative frame image, and can switch from a motion detecting mode to a normal image capturing mode when a significant difference is detected. A low-frame-rate operation in the motion detecting mode can reduce power consumption. Moreover, the imaging device has an image recognition function in combination with the motion detecting function, so that switching from the motion detecting mode to the normal image capturing mode can be performed when a particular image is recognized.
    Type: Application
    Filed: July 13, 2020
    Publication date: August 18, 2022
    Inventors: Hiroki INOUE, Seiichi YONEDA, Yusuke NEGORO, Takahiko ISHIZU, Hidetomo KOBAYASHI
  • Publication number: 20220238582
    Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and extract data obtained by multiplying the analog data by a predetermined weight coefficient. When the data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.
    Type: Application
    Filed: June 5, 2020
    Publication date: July 28, 2022
    Inventors: Seiichi YONEDA, Yusuke NEGORO
  • Publication number: 20220201234
    Abstract: An imaging device capable of executing image processing is provided. Analog data (image data) acquired through an imaging operation is retained in a pixel, and data obtained by multiplying the analog data by a given weight coefficient in the pixel can be extracted. The data is taken into a neural network or the like, whereby processing such as image recognition can be performed. Since an enormous amount of image data can be retained in pixels in an analog data state, processing can be performed efficiently.
    Type: Application
    Filed: April 14, 2020
    Publication date: June 23, 2022
    Inventors: Seiichi YONEDA, Yusuke NEGORO, Hidetomo KOBAYASHI
  • Patent number: 11356089
    Abstract: Provided is a semiconductor device with a novel structure in which the power consumption can be reduced. The semiconductor device includes a sensor, a sample-and-hold circuit to which a sensor signal of the sensor is input, an analog-digital converter circuit to which an output signal of the sample-and-hold circuit is input, a control circuit, a battery, and an antenna.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: June 7, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Seiichi Yoneda, Atsushi Miyaguchi, Tatsunori Inoue
  • Patent number: 11314484
    Abstract: A semiconductor device having a novel structure is provided. The semiconductor device includes a plurality of operation circuits that can switch different kinds of operation processing; a plurality of switch circuits that can switch a connection state between the operation circuits; and a controller. The operation circuit includes a first memory that stores data corresponding to a weight parameter used in the plurality of kinds of operation processing. The operation circuit executes a product-sum operation by switching weight data in accordance with a context. The switch circuit includes a second memory that stores data for switching a plurality of connection states in response to switching of a second context signal. The controller generates a second context signal on the basis of a first context signal. The amount of data stored in the second memory can be smaller than the amount of data stored in the first memory in the operation circuit.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: April 26, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Kozuma, Takeshi Aoki, Seiichi Yoneda, Yoshiyuki Kurokawa
  • Publication number: 20220123139
    Abstract: A first transistor and a second transistor are stacked. The first transistor and the second transistor have a gate electrode in common. At least one of semiconductor films used in the first transistor and the second transistor is an oxide semiconductor film. With the use of the oxide semiconductor film as the semiconductor film in the transistor, high field-effect mobility and high-speed operation can be achieved. Since the first transistor and the second transistor are stacked and have the gate electrode in common, the area of a region where the transistors are disposed can be reduced.
    Type: Application
    Filed: December 30, 2021
    Publication date: April 21, 2022
    Inventor: Seiichi YONEDA
  • Patent number: 11302736
    Abstract: An imaging device includes a first semiconductor substrate and a second semiconductor substrate. The first semiconductor substrate includes a photoelectric conversion device and a first transistor. The second semiconductor substrate includes a second transistor, a third transistor, and a fourth transistor. One electrode of the photoelectric conversion device is electrically connected to one of a source and a drain of the first transistor. The other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor and a gate of the third transistor. One of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor. The photoelectric conversion device and at least parts of the second transistor, the third transistor, and the fourth transistor overlap with each other.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: April 12, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiichi Yoneda, Yusuke Negoro