Patents by Inventor Seiichi Yoneda

Seiichi Yoneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170186365
    Abstract: To provide a novel device, a device with low power consumption, or a versatile device, the device includes a decoder, a driver circuit, and a display portion. The driver circuit includes a plurality of circuits. The display portion includes a plurality of display panels. The decoder has a function of generating a signal corresponding to an image displayed on the display portion. The decoder has a function of determining the necessity of rewriting an image of each of the display panels by detecting a change in the image of each of the display panels. The circuit has a function of outputting a signal to a display panel for which that image rewriting is determined to be necessary. The circuit has a function of stopping output of a signal to a display panel for which image rewriting is determined to be unnecessary.
    Type: Application
    Filed: December 21, 2016
    Publication date: June 29, 2017
    Inventor: Seiichi YONEDA
  • Publication number: 20170179955
    Abstract: An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device.
    Type: Application
    Filed: March 9, 2017
    Publication date: June 22, 2017
    Inventors: Seiichi YONEDA, Tatsuji NISHIJIMA
  • Patent number: 9685476
    Abstract: To provide an imaging device capable of high-speed reading. The imaging device includes a photodiode, a first transistor, a second transistor, a third transistor, and a fourth transistor. The back gate electrode of the first transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the first transistor and a potential lower than the source potential of the first transistor. The back gate electrode of the second transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the second transistor. The back gate electrode of the third transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the third transistor and a potential lower than the source potential of the third transistor.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: June 20, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiichi Yoneda, Takuro Ohmaru, Yuki Okamoto
  • Patent number: 9595964
    Abstract: An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: March 14, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiichi Yoneda, Tatsuji Nishijima
  • Patent number: 9569713
    Abstract: To provide a semiconductor device that is capable of displaying data even when a radio signal is not supplied. The semiconductor device includes an antenna, a battery, a sensor, a nonvolatile memory, a first circuit, and a second circuit. Power supplied from the antenna is converted into first power via the first circuit. The battery stores the first power and supplies second power. The sensor performs sensing with the second power. The nonvolatile memory stores analog data acquired by the sensor. The second power is used to store the analog data. The second circuit converts the analog data into digital data with the use of the first power. The nonvolatile memory preferably includes an oxide semiconductor transistor.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: February 14, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiichi Yoneda, Yukio Maehashi
  • Publication number: 20170039970
    Abstract: In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped.
    Type: Application
    Filed: October 21, 2016
    Publication date: February 9, 2017
    Inventors: Tatsuji NISHIJIMA, Seiichi YONEDA, Takuro OHMARU, Jun KOYAMA
  • Publication number: 20170033130
    Abstract: A semiconductor device includes a first transistor which includes a first gate electrode below its oxide semiconductor layer and a second gate electrode above its oxide semiconductor layer, and a second transistor which includes a first gate electrode above its oxide semiconductor layer and a second gate electrode below its oxide semiconductor layer and is provided so as to at least partly overlap with the first transistor. In the semiconductor device, a conductive film serving as the second gate electrode of the first transistor and the second gate electrode of the second transistor is shared between the first transistor and the second transistor. Note that the second gate electrode not only controls the threshold voltages (Vth) of the first transistor and the second transistor but also has an effect of reducing interference of an electric field applied from respective first gate electrodes of the first transistor and the second transistor.
    Type: Application
    Filed: October 14, 2016
    Publication date: February 2, 2017
    Inventors: Seiichi YONEDA, Takuro OHMARU
  • Publication number: 20160366360
    Abstract: An imaging device with low power consumption. The imaging device includes a plurality of pixels arranged in a matrix, a first circuit, a second circuit, a third circuit, and a fourth circuit. The first circuit has a function of converting an analog signal into a digital signal. The second circuit has a function of detecting a difference between image data of a first frame and image data of a second frame. The third circuit has a function of controlling the frequency of a clock signal. The fourth circuit has a function of generating clock signals of a plurality of frequencies.
    Type: Application
    Filed: June 10, 2016
    Publication date: December 15, 2016
    Inventors: Yuki OKAMOTO, Seiichi YONEDA, Yoshiyuki KUROKAWA
  • Publication number: 20160356645
    Abstract: The imaging device includes a pixel array and first to seventh circuits. The first and second circuits select a pixel in the pixel array. The third circuit performs difference calculation between imaging data of the first frame and the second frame in the selected pixels. The fourth and the fifth circuits output addresses of the row and column of the pixels which has been subjected to the difference calculation. A row address and a column address for determining a specific region of the pixel array are stored in the sixth circuit. The seventh circuit compares coordinates included in the specific region with coordinates of pixels where a difference is detected. If the coordinates of the pixels where a difference is detected are included in the specific region which has been stored in the sixth circuit, imaging data is obtained again and is output to the external devices.
    Type: Application
    Filed: June 6, 2016
    Publication date: December 8, 2016
    Inventors: Seiichi YONEDA, Shuhei MAEDA
  • Publication number: 20160337607
    Abstract: An imaging device in which signals can be read out accurately at high speed is provided. The imaging device includes a plurality of pixels arranged in a matrix, an A/D converter circuit, and a selector circuit. The pixels are electrically connected to an input terminal of the A/D converter circuit. An output terminal of the A/D converter circuit is electrically connected to one of a source and a drain of a transistor. The other of the source and the drain of the transistor is electrically connected to an input terminal of the selector circuit. The transistor includes an oxide semiconductor in an active layer. Other embodiments are described and claimed.
    Type: Application
    Filed: May 9, 2016
    Publication date: November 17, 2016
    Inventors: Yuki OKAMOTO, Seiichi YONEDA
  • Publication number: 20160316159
    Abstract: An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a photoelectric conversion element, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and a first capacitor. Variation in the threshold voltage of amplifier transistors can be compensated. Furthermore, the imaging device can have a difference detecting function for holding differential data between imaging data for an initial frame and imaging data for a current frame and outputting a signal corresponding to the differential data.
    Type: Application
    Filed: April 11, 2016
    Publication date: October 27, 2016
    Inventor: Seiichi YONEDA
  • Patent number: 9478704
    Abstract: In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: October 25, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuji Nishijima, Seiichi Yoneda, Takuro Ohmaru, Jun Koyama
  • Patent number: 9472680
    Abstract: A semiconductor device includes a first transistor which includes a first gate electrode below its oxide semiconductor layer and a second gate electrode above its oxide semiconductor layer, and a second transistor which includes a first gate electrode above its oxide semiconductor layer and a second gate electrode below its oxide semiconductor layer and is provided so as to at least partly overlap with the first transistor. In the semiconductor device, a conductive film serving as the second gate electrode of the first transistor and the second gate electrode of the second transistor is shared between the first transistor and the second transistor. Note that the second gate electrode not only controls the threshold voltages (Vth) of the first transistor and the second transistor but also has an effect of reducing interference of an electric field applied from respective first gate electrodes of the first transistor and the second transistor.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: October 18, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiichi Yoneda, Takuro Ohmaru
  • Publication number: 20160293655
    Abstract: To provide an imaging device capable of high-speed reading. The imaging device includes a photodiode, a first transistor, a second transistor, a third transistor, and a fourth transistor. The back gate electrode of the first transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the first transistor and a potential lower than the source potential of the first transistor. The back gate electrode of the second transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the second transistor. The back gate electrode of the third transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the third transistor and a potential lower than the source potential of the third transistor.
    Type: Application
    Filed: March 29, 2016
    Publication date: October 6, 2016
    Inventors: Seiichi YONEDA, Takuro OHMARU, Yuki OKAMOTO
  • Patent number: 9438206
    Abstract: The storage circuit includes first and second logic circuits, first and second transistors whose channel formation regions include an oxide semiconductor, and a capacitor. The first and second transistors are connected to each other in series, and the capacitor is connected to a connection node of the first and second transistors. The first transistor functions as a switch that controls connection between an output terminal of the first logic circuit and the capacitor. The second transistor functions as a switch that controls connection between the capacitor and an input terminal of the second logic circuit. Clock signals whose phases are inverted from each other are input to gates of the first and second transistors. Since the storage circuit has a small number of transistors and a small number of transistors controlled by the clock signals, the storage circuit is a low-power circuit.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: September 6, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukio Maehashi, Seiichi Yoneda, Wataru Uesugi
  • Patent number: 9372694
    Abstract: A low-power processor that does not easily malfunction is provided. Alternatively, a low-power processor having high processing speed is provided. Alternatively, a method for driving the processor is provided. In power gating, the processor performs part of data backup in parallel with arithmetic processing and performs part of data recovery in parallel with arithmetic processing. Such a driving method prevents a sharp increase in power consumption in a data backup period and a data recovery period and generation of instantaneous voltage drops and inhibits increases of the data backup period and the data recovery period.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: June 21, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Seiichi Yoneda
  • Patent number: 9343480
    Abstract: It is an object to give excellent data retention characteristics to a semiconductor device in which stored data is judged in accordance with the potential of a gate of a specified transistor, by achieving both reduction in variation of the threshold voltage of the transistor and data retention for a long time. Charge is held (data is stored) in a node electrically connected only to a source or a drain of a transistor whose channel region is formed using an oxide semiconductor. There may be a plurality of transistors whose sources or drains are electrically connected to the node. The oxide semiconductor has a wider band gap and a lower intrinsic carrier density than silicon. By using such an oxide semiconductor for the channel region of the transistor, the transistor with an extremely low off-state current (leakage current) can be realized.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: May 17, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Seiichi Yoneda
  • Patent number: 9344090
    Abstract: An object is to provide a programmable logic device which can hold configuration data even when a power supply potential is not supplied, has short start-up time of a logic block after the power is supplied, and can operate with low power. A transistor in a memory portion of a programmable switch includes a material which allows a sufficient reduction in off-state current of the transistor, such as an oxide semiconductor material which is a wide bandgap semiconductor. When the semiconductor material which allows a sufficient reduction in off-state current of the transistor is used, configuration data can be held even when a power supply potential is not supplied.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: May 17, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuji Nishijima, Seiichi Yoneda
  • Publication number: 20160118383
    Abstract: A semiconductor device includes an antenna functioning as a coil, a capacitor electrically connected to the antenna in parallel, a passive element forming a resonance circuit with the antenna and the capacitor by being electrically connected to the antenna and the capacitor in parallel, a first field effect transistor controlling whether the passive element is electrically connected to the antenna and the capacitor in parallel or not, and a memory circuit. The memory circuit includes a second field effect transistor which includes an oxide semiconductor layer where a channel is formed and in which a data signal is input to one of a source and a drain. The gate voltage of the first field effect transistor is set depending on the voltage of the other of the source and the drain of the second field effect transistor.
    Type: Application
    Filed: January 7, 2016
    Publication date: April 28, 2016
    Inventor: Seiichi YONEDA
  • Publication number: 20160117584
    Abstract: To provide a semiconductor device that is capable of displaying data even when a radio signal is not supplied. The semiconductor device includes an antenna, a battery, a sensor, a nonvolatile memory, a first circuit, and a second circuit. Power supplied from the antenna is converted into first power via the first circuit. The battery stores the first power and supplies second power. The sensor performs sensing with the second power. The nonvolatile memory stores analog data acquired by the sensor. The second power is used to store the analog data. The second circuit converts the analog data into digital data with the use of the first power. The nonvolatile memory preferably includes an oxide semiconductor transistor.
    Type: Application
    Filed: October 22, 2015
    Publication date: April 28, 2016
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiichi YONEDA, Yukio MAEHASHI