Abstract: Provided is a semiconductor device in which power consumption and rewrite time needed for changing the parameter for color adjustment, dimming, or the like are reduced. One embodiment of a semiconductor device of the present invention includes an image processing portion including a plurality of functional circuits configured to correct image data, a plurality of scan chains corresponding to the plurality of functional circuits, and a controller controlling operations of the plurality of scan chains. During a state in which the controller controls the scan chains so that one or more scan chains chosen from the plurality of scan chains are driven and the scan chains except for the one or more scan chains are not driven, a parameter stored in one or more functional circuits connected to the one or more scan chains is rewritten.

Abstract: To provide a novel semiconductor device or a semiconductor device capable of operating at high speed. The semiconductor device includes a plurality of circuits each having a function of storing data and a wiring EL. The plurality of circuits each include a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor and the capacitor. The first transistor includes an oxide semiconductor in a channel formation region. The wiring EL has a function of a back-gate of the first transistor. A potential for selecting the plurality of circuits is supplied to the wiring EL. Thus, data stored in the plurality of circuits is erased.

Abstract: The imaging device includes a pixel array and first to seventh circuits. The first and second circuits select a pixel in the pixel array. The third circuit performs difference calculation between imaging data of the first frame and the second frame in the selected pixels. The fourth and the fifth circuits output addresses of the row and column of the pixels which has been subjected to the difference calculation. A row address and a column address for determining a specific region of the pixel array are stored in the sixth circuit. The seventh circuit compares coordinates included in the specific region with coordinates of pixels where a difference is detected. If the coordinates of the pixels where a difference is detected are included in the specific region which has been stored in the sixth circuit, imaging data is obtained again and is output to the external devices.

Abstract: An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a photoelectric conversion element, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and a first capacitor. Variation in the threshold voltage of amplifier transistors can be compensated. Furthermore, the imaging device can have a difference detecting function for holding differential data between imaging data for an initial frame and imaging data for a current frame and outputting a signal corresponding to the differential data.

Abstract: A highly reliable semiconductor device is provided. A memory cell includes a first transistor and a second transistor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor. The first transistor is configured to hold charge corresponding to first data retained in the memory cell when turned off. The data writing circuit is configured to write the first data and correction data to the memory cell. The data reading circuit is configured to read a first voltage value corresponding to the first data, read a second voltage value corresponding to the correction data written to the memory cell, convert a voltage value that is equivalent to a difference between the first voltage value and the second voltage value into corrected first data, and output the corrected first data to the data writing circuit.

Abstract: The storage circuit includes first and second logic circuits, first and second transistors whose channel formation regions include an oxide semiconductor, and a capacitor. The first and second transistors are connected to each other in series, and the capacitor is connected to a connection node of the first and second transistors. The first transistor functions as a switch that controls connection between an output terminal of the first logic circuit and the capacitor. The second transistor functions as a switch that controls connection between the capacitor and an input terminal of the second logic circuit. Clock signals whose phases are inverted from each other are input to gates of the first and second transistors. Since the storage circuit has a small number of transistors and a small number of transistors controlled by the clock signals, the storage circuit is a low-power circuit.

Abstract: An imaging device with low power consumption. The imaging device includes a plurality of pixels arranged in a matrix, a first circuit, a second circuit, a third circuit, and a fourth circuit. The first circuit has a function of converting an analog signal into a digital signal. The second circuit has a function of detecting a difference between image data of a first frame and image data of a second frame. The third circuit has a function of controlling the frequency of a clock signal. The fourth circuit has a function of generating clock signals of a plurality of frequencies.

Abstract: A novel circuit, a novel display portion, a novel display system, or the like is provided. A circuit, a display portion, a display system, or the like which has low power consumption is provided. A plurality kinds of video signals are generated by division of input data and supplied to different pixel groups. Thus, for example, the plurality of video signals can be supplied individually, and the operation states of a plurality of driver circuits can be controlled individually, leading to fine-grained operation with low power consumption. Accordingly, a decoder, a display portion, or a display system having low power consumption can be provided.

Abstract: A first transistor and a second transistor are stacked. The first transistor and the second transistor have a gate electrode in common. At least one of semiconductor films used in the first transistor and the second transistor is an oxide semiconductor film. With the use of the oxide semiconductor film as the semiconductor film in the transistor, high field-effect mobility and high-speed operation can be achieved. Since the first transistor and the second transistor are stacked and have the gate electrode in common, the area of a region where the transistors are disposed can be reduced.

Abstract: The amount of data to be backed up and recovered is reduced when supply of power to a semiconductor device is stopped and restarted. A backup need determination circuit provided in the semiconductor device reads the kind of instruction decoded by a decoder and determines whether data needs to be backed up from a volatile register to a nonvolatile register. With a structure according to one embodiment of the present invention, it is possible to select necessary data from data used for operation in a logic circuit before the power supply is stopped and after the power supply is restarted. Data that is necessary after the power supply is restarted can be backed up from the volatile register to the nonvolatile register before the power supply is stopped. Data that is unnecessary is not backed up from the volatile register to the nonvolatile register before the power supply is stopped.

Abstract: A semiconductor device includes a first transistor which includes a first gate electrode below its oxide semiconductor layer and a second gate electrode above its oxide semiconductor layer, and a second transistor which includes a first gate electrode above its oxide semiconductor layer and a second gate electrode below its oxide semiconductor layer and is provided so as to at least partly overlap with the first transistor. In the semiconductor device, a conductive film serving as the second gate electrode of the first transistor and the second gate electrode of the second transistor is shared between the first transistor and the second transistor. Note that the second gate electrode not only controls the threshold voltages (Vth) of the first transistor and the second transistor but also has an effect of reducing interference of an electric field applied from respective first gate electrodes of the first transistor and the second transistor.

Abstract: A semiconductor device includes an antenna functioning as a coil, a capacitor electrically connected to the antenna in parallel, a passive element forming a resonance circuit with the antenna and the capacitor by being electrically connected to the antenna and the capacitor in parallel, a first field effect transistor controlling whether the passive element is electrically connected to the antenna and the capacitor in parallel or not, and a memory circuit. The memory circuit includes a second field effect transistor which includes an oxide semiconductor layer where a channel is formed and in which a data signal is input to one of a source and a drain. The gate voltage of the first field effect transistor is set depending on the voltage of the other of the source and the drain of the second field effect transistor.

Abstract: In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped.

Abstract: A first transistor and a second transistor are stacked. The first transistor and the second transistor have a gate electrode in common. At least one of semiconductor films used in the first transistor and the second transistor is an oxide semiconductor film. With the use of the oxide semiconductor film as the semiconductor film in the transistor, high field-effect mobility and high-speed operation can be achieved. Since the first transistor and the second transistor are stacked and have the gate electrode in common, the area of a region where the transistors are disposed can be reduced.

Abstract: A highly reliable semiconductor device is provided. A memory cell includes a first transistor and a second transistor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor. The first transistor is configured to hold charge corresponding to first data retained in the memory cell when turned off. The data writing circuit is configured to write the first data and correction data to the memory cell. The data reading circuit is configured to read a first voltage value corresponding to the first data, read a second voltage value corresponding to the correction data written to the memory cell, convert a voltage value that is equivalent to a difference between the first voltage value and the second voltage value into corrected first data, and output the corrected first data to the data writing circuit.

Abstract: A semiconductor device that is less likely to be affected by a soft error is provided. The semiconductor device includes a first memory, a second memory, a processor that can be connected to the first memory and the second memory, and a selector for selectively connecting one of the first memory and the second memory to the processor. The probability of occurrence of a soft error of the first memory is higher than that of the second memory. When an error derived from a soft error is detected in the first memory, the selector connects the second memory to the processor. The semiconductor device can stably operate even when moved from an environment where a soft error is less likely to occur to an environment where a soft error is likely to occur.

Abstract: An imaging device in which signals can be read out accurately at high speed is provided. The imaging device includes a plurality of pixels arranged in a matrix, an A/D converter circuit, and a selector circuit. The pixels are electrically connected to an input terminal of the A/D converter circuit. An output terminal of the A/D converter circuit is electrically connected to one of a source and a drain of a transistor. The other of the source and the drain of the transistor is electrically connected to an input terminal of the selector circuit. The transistor includes an oxide semiconductor in an active layer. Other embodiments are described and claimed.

Abstract: An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device.

Abstract: Provided is a semiconductor device in which power consumption and rewrite time needed for changing the parameter for color adjustment, dimming, or the like are reduced. One embodiment of a semiconductor device of the present invention includes an image processing portion including a plurality of functional circuits configured to correct image data, a plurality of scan chains corresponding to the plurality of functional circuits, and a controller controlling operations of the plurality of scan chains. During a state in which the controller controls the scan chains so that one or more scan chains chosen from the plurality of scan chains are driven and the scan chains except for the one or more scan chains are not driven, a parameter stored in one or more functional circuits connected to the one or more scan chains is rewritten.

Abstract: A novel circuit, a novel display portion, a novel display system, or the like is provided. A circuit, a display portion, a display system, or the like which has low power consumption is provided. A plurality kinds of video signals are generated by division of input data and supplied to different pixel groups. Thus, for example, the plurality of video signals can be supplied individually, and the operation states of a plurality of driver circuits can be controlled individually, leading to fine-grained operation with low power consumption. Accordingly, a decoder, a display portion, or a display system having low power consumption can be provided.