Patents by Inventor Seiji Inumiya
Seiji Inumiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8143676Abstract: A semiconductor device includes a substrate having first and second regions on a surface thereof, a first conductivity type first MISFET formed in the first region and a second conductivity type second MISFET formed in the second region. The first MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate and a first insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film and which has a first element forming electric dipoles that reduce a threshold voltage of the first MISFET and the second MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate, and a second insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film formed on the surface of the substrate and which has a second element forming electric dipoles in a direction opposite to that in the first MISFET.Type: GrantFiled: October 30, 2008Date of Patent: March 27, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Seiji Inumiya, Takuya Kobayashi, Tomonori Aoyama
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Publication number: 20120045882Abstract: A semiconductor device manufacturing method includes: removing an insulating film on a semiconductor substrate by etching and subsequently oxidizing a surface of the semiconductor substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby forming a first insulating film containing an oxide of a constituent element of the semiconductor substrate on the surface of the semiconductor substrate; forming a second insulating film containing an aluminum oxide on the first insulating film; forming a third insulating film containing a rare earth oxide on the second insulating film; forming a high-k insulating film on the third insulating film; introducing nitrogen into the high-k insulating film to thereby make it a fourth insulating film; and conducting heat treatment to change the first through third insulating films into a insulating film made of a mixture containing aluminum, a rare earth element, the constituent element of the semiconductor substrate, and oxygen.Type: ApplicationFiled: October 27, 2011Publication date: February 23, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Seiji Inumiya, Tomonori Aoyama
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Patent number: 8084834Abstract: A semiconductor device of the present invention includes: a semiconductor layer; a gate insulation film provided on the semiconductor layer and including at least one of Hf and Zr; and a gate electrode provided on the gate insulation film and including a carbonitride which includes at least one of Hf and Zr.Type: GrantFiled: July 30, 2009Date of Patent: December 27, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Akio Kaneko, Seiji Inumiya
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Patent number: 8071447Abstract: A semiconductor device manufacturing method includes removing an insulating film on a semiconductor substrate by etching and subsequently oxidizing a surface of the substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby forming a first insulating film containing an oxide of a constituent element of the substrate on the surface of the substrate; forming a second insulating film containing an aluminum oxide on the first insulating film; forming a third insulating film containing a rare earth oxide on the second insulating film; forming a high-k insulating film on the third insulating film; introducing nitrogen into the high-k insulating film to thereby make it a fourth insulating film; and conducting heat treatment to change the first through third insulating films into an insulating film made of a mixture containing aluminum, a rare earth element, the constituent element of the substrate, and oxygen.Type: GrantFiled: February 11, 2010Date of Patent: December 6, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Seiji Inumiya, Tomonori Aoyama
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Patent number: 8039333Abstract: A method of fabricating a semiconductor device according to one embodiment includes: forming a SiGe crystal layer on a semiconductor substrate, the SiGe crystal layer having a first plane and a second plane inclined with respect to the first plane; forming an amorphous Si film on the SiGe crystal layer; crystallizing a portion located adjacent to the first and second planes of the amorphous Si film by applying heat treatment using the first and second planes of the SiGe crystal layer as a seed, thereby forming a Si crystal layer; selectively removing or thinning a portion of the amorphous Si film that is not crystallized by the heat treatment; applying oxidation treatment to a surface of the Si crystal layer, thereby forming a gate insulating film on the surface of the Si crystal layer; and forming a gate electrode on the gate insulating film.Type: GrantFiled: January 26, 2009Date of Patent: October 18, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Akio Kaneko, Seiji Inumiya, Tomonori Aoyama, Takuya Kobayashi
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Patent number: 7989896Abstract: A method of fabricating a semiconductor device according to one embodiment includes: laying out a first region, a second region, a third region and a fourth region on a semiconductor substrate by forming an element isolation region in the semiconductor substrate; forming a first insulating film on the first region and the second region; forming a first semiconductor film on the first insulating film; forming a second insulating film and an aluminum oxide film thereon on the fourth region after forming of the first semiconductor film; forming a third insulating film and a lanthanum oxide film thereon on the third region after forming of the first semiconductor film; forming a high dielectric constant film on the aluminum oxide film and the lanthanum oxide film; forming a metal film on the high dielectric constant film; forming a second semiconductor film on the first semiconductor film and the metal film; and patterning the first insulating film, the first semiconductor film, the second insulating film, the alType: GrantFiled: November 4, 2009Date of Patent: August 2, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Tomonori Aoyama, Seiji Inumiya, Kazuaki Nakajima, Takashi Shimizu
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Patent number: 7968397Abstract: A semiconductor device according to the present invention comprises a semiconductor substrate, a gate insulating film which is composed of a material whose main component is a tetravalent metal oxide, a mixture of a tetravalent metal oxide and SiO2, or a mixture of a tetravalent metal oxide and SiON and which containing B when it is in an nMOS structure on the semiconductor substrate or containing at least one of P and As when it is in a pMOS structure on the semiconductor substrate, and a gate electrode made of a metal having a work function of 4 eV to 5.5 eV.Type: GrantFiled: March 2, 2010Date of Patent: June 28, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Akio Kaneko, Seiji Inumiya, Katsuyuki Sekine, Kazuhiro Eguchi, Motoyuki Sato
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Patent number: 7947610Abstract: Claimed and disclosed is a semiconductor device including a transistor having a gate insulating film structure containing nitrogen or fluorine in a compound, such as metal silicate, containing metal, silicon and oxygen, a gate insulating film structure having a laminated structure of an amorphous metal oxide film and metal silicate film, or a gate insulating film structure having a first gate insulating film including an oxide film of a first metal element and a second gate insulating film including a metal silicate film of a second metal element.Type: GrantFiled: May 26, 2009Date of Patent: May 24, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Yoshitaka Tsunashima, Seiji Inumiya, Yasumasa Suizu, Yoshio Ozawa, Kiyotaka Miyano, Masayuki Tanaka
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Publication number: 20110062561Abstract: A method of manufacturing a semiconductor device comprising: forming a p type region and an n type region in a main surface of a semiconductor substrate, the p type region and the n type region being insulated from each other with an element-isolation region; forming a first insulating film on the p type region and on the n type region, the first insulating film being made of any one of a silicon oxide film and a silicon oxynitride film; forming a lanthanum oxide film on the first insulating film on the p type region; forming a second insulating film both on the lanthanum oxide film on the p type region and on the first insulating film on the n type region, the second insulating film containing any one of hafnium and zirconium; and forming a titanium nitride film on the second insulating film, the titanium nitride film satisfying TixNy where x/y<1.Type: ApplicationFiled: September 10, 2010Publication date: March 17, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Nao AKIYAMA, Seiji INUMIYA
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Patent number: 7858536Abstract: A semiconductor device comprising a semiconductor substrate, a gate dielectrics formed on the semiconductor substrate and including a silicon oxide film containing a metallic element, the silicon oxide film containing the metallic element including a first region near a lower surface thereof, a second region near an upper surface thereof, and a third region between the first and second regions, the metallic element contained in the silicon oxide film having a density distribution in a thickness direction of the silicon oxide film, a peak of the density distribution existing in the third region, and an electrode formed on the gate dielectrics.Type: GrantFiled: September 20, 2007Date of Patent: December 28, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiro Eguchi, Seiji Inumiya, Yoshitaka Tsunashima
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Patent number: 7824976Abstract: A semiconductor apparatus wherein a device formed on a semiconductor substrate comprises a gate insulating film including a high dielectric constant film formed on the substrate and an anti-reaction film formed on the high dielectric constant film, and a gate electrode formed on the anti-reaction film, the high dielectric constant film comprises a film containing at least one of Hf and Zr, and Si and O, or a film containing at least one of Hf and Zr, and Si, O and N, the anti-reaction film comprises an SiO2 film, a film containing SiO2 as a main component and at least one of Hf and Zr, a film containing SiO2 as a main component and N, a film containing SiO2 as a main component, Hf and N, a film containing SiO2 as a main component, Zr and N, or a film containing SiO2 as a main component, Hf, Zr and N.Type: GrantFiled: December 23, 2009Date of Patent: November 2, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Akio Kaneko, Kazuhiro Eguchi, Seiji Inumiya, Katsuyuki Sekine, Motoyuki Sato
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Patent number: 7816215Abstract: A semiconductor device manufacturing method comprises: forming a gate insulative film on a semiconductor substrate by: forming a first nitride film on the substrate; forming a first oxide film and a second oxide film, the first oxide film being between the substrate and the first nitride film, the second oxide film being on the first nitride film; and nitriding the second oxide film to form, on the first nitride film, one of either: a second nitride film or an SiON film; and forming a gate electrode on the gate insulative film; wherein the equivalent oxide thickness of the gate insulative film is equal to or less than 1 nm.Type: GrantFiled: September 16, 2004Date of Patent: October 19, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Daisuke Matsushita, Koichi Muraoka, Seiji Inumiya, Koichi Kato, Kazuhiro Eguchi, Mariko Takayanagi, Yasushi Nakasaki
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Publication number: 20100210100Abstract: It is made possible to provide a method for manufacturing a semiconductor device that includes CMISs each having a low threshold voltage Vth and a Ni-FUSI/SiON or high-k gate insulating film structure. The method comprises: forming a p-type semiconductor region and an n-type semiconductor region insulated from each other in a substrate; forming a first and second gate insulating films on the p-type and n-type semiconductor regions, respectively; forming a first nickel silicide having a composition of Ni/Si<31/12 above the first gate insulating film, and a second nickel silicide having a composition of Ni/Si?31/12 on the second gate insulating film; and segregating aluminum at an interface between the first nickel silicide and the first gate insulating film by diffusing aluminum through the first nickel silicide.Type: ApplicationFiled: April 23, 2010Publication date: August 19, 2010Applicant: Kabushiki Kaisha ToshibaInventors: Masato Koyama, Yoshinori Tsuchiya, Seiji Inumiya
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Publication number: 20100203704Abstract: A semiconductor device manufacturing method includes: removing an insulating film on a semiconductor substrate by etching and subsequently oxidizing a surface of the semiconductor substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby forming a first insulating film containing an oxide of a constituent element of the semiconductor substrate on the surface of the semiconductor substrate; forming a second insulating film containing an aluminum oxide on the first insulating film; forming a third insulating film containing a rare earth oxide on the second insulating film; forming a high-k insulating film on the third insulating film; introducing nitrogen into the high-k insulating film to thereby make it a fourth insulating film; and conducting heat treatment to change the first through third insulating films into a insulating film made of a mixture containing aluminum, a rare earth element, the constituent element of the semiconductor substrate, and oxygen.Type: ApplicationFiled: February 11, 2010Publication date: August 12, 2010Inventors: Seiji INUMIYA, Tomonori Aoyama
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Publication number: 20100187612Abstract: A semiconductor device according to an embodiment of the present invention includes an N-type transistor formed in a first region on a substrate, and a P-type transistor formed in a second region on the substrate.Type: ApplicationFiled: January 26, 2010Publication date: July 29, 2010Inventors: Daisuke IKENO, Tomonori Aoyama, Kazuaki Nakajima, Seiji Inumiya, Takashi Shimizu, Takuya Kobayashi
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Publication number: 20100173487Abstract: A semiconductor apparatus wherein a device formed on a semiconductor substrate comprises a gate insulating film including a high dielectric constant film formed on the substrate and an anti-reaction film formed on the high dielectric constant film, and a gate electrode formed on the anti-reaction film, the high dielectric constant film comprises a film containing at least one of Hf and Zr, and Si and O, or a film containing at least one of Hf and Zr, and Si, O and N, the anti-reaction film comprises an SiO2 film, a film containing SiO2 as a main component and at least one of Hf and Zr, a film containing SiO2 as a main component and N, a film containing SiO2 as a main component, Hf and N, a film containing SiO2 as a main component, Zr and N, or a film containing SiO2 as a main component, Hf, Zr and N.Type: ApplicationFiled: December 23, 2009Publication date: July 8, 2010Inventors: Akio Kaneko, Kazuhiro Eguchi, Seiji Inumiya, Katsuyuki Sekine, Motoyuki Sato
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Publication number: 20100159686Abstract: A semiconductor device according to the present invention comprises a semiconductor substrate, a gate insulating film which is composed of a material whose main component is a tetravalent metal oxide, a mixture of a tetravalent metal oxide and SiO2, or a mixture of a tetravalent metal oxide and SiON and which containing B when it is in an nMOS structure on the semiconductor substrate or containing at least one of P and As when it is in a pMOS structure on the semiconductor substrate, and a gate electrode made of a metal having a work function of 4 eV to 5.5 eV.Type: ApplicationFiled: March 2, 2010Publication date: June 24, 2010Inventors: Akio Kaneko, Seiji Inumiya, Katsuyuki Sekine, Kazuhiro Eguchi, Motoyuki Sato
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Publication number: 20100133623Abstract: A silicon oxynitride film is formed on entire surface of a semiconductor substrate, a lanthanum oxide film is formed on the silicon oxynitride film and the lanthanum oxide film is removed from a pMOS region. Then, a nitrided hafnium silicate film serving as a highly dielectric film is formed on the entire surface, an aluminum-containing titanium nitride film is formed, a polysilicon film is formed, and the stacked films are patterned into a gate electrode configuration. Next, impurities are introduced into a source/drain region, and an annealing for activating the impurities is utilized to diffuse the aluminum included in the aluminum-containing titanium nitride film to the interface between the silicon oxynitride film and the nitrided hafnium aluminum silicate film in the pMOS region.Type: ApplicationFiled: November 25, 2009Publication date: June 3, 2010Inventors: Seiji INUMIYA, Tomonori Aoyama
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Publication number: 20100133626Abstract: A method of fabricating a semiconductor device according to one embodiment includes: laying out a first region, a second region, a third region and a fourth region on a semiconductor substrate by forming an element isolation region in the semiconductor substrate; forming a first insulating film on the first region and the second region; forming a first semiconductor film on the first insulating film; forming a second insulating film and an aluminum oxide film thereon on the fourth region after forming of the first semiconductor film; forming a third insulating film and a lanthanum oxide film thereon on the third region after forming of the first semiconductor film; forming a high dielectric constant film on the aluminum oxide film and the lanthanum oxide film; forming a metal film on the high dielectric constant film; forming a second semiconductor film on the first semiconductor film and the metal film; and patterning the first insulating film, the first semiconductor film, the second insulating film, the alType: ApplicationFiled: November 4, 2009Publication date: June 3, 2010Inventors: Tomonori Aoyama, Seiji Inumiya, Kazuaki Nakajima, Takashi Shimizu
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Patent number: 7727832Abstract: It is made possible to provide a method for manufacturing a semiconductor device that includes CMISs each having a low threshold voltage Vth and a Ni-FUSI/SiON or high-k gate insulating film structure. The method comprises: forming a p-type semiconductor region and an n-type semiconductor region insulated from each other in a substrate; forming a first and second gate insulating films on the p-type and n-type semiconductor regions, respectively; forming a first nickel silicide having a composition of Ni/Si<31/12 above the first gate insulating film, and a second nickel silicide having a composition of Ni/Si?31/12 on the second gate insulating film; and segregating aluminum at an interface between the first nickel silicide and the first gate insulating film by diffusing aluminum through the first nickel silicide.Type: GrantFiled: October 11, 2007Date of Patent: June 1, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Masato Koyama, Yoshinori Tsuchiya, Seiji Inumiya