Patents by Inventor Seiji Inumiya

Seiji Inumiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7282774
    Abstract: A semiconductor device comprising a semiconductor substrate, a gate dielectrics formed on the semiconductor substrate and including a silicon oxide film containing a metallic element, the silicon oxide film containing the metallic element including a first region near a lower surface thereof, a second region near an upper surface thereof, and a third region between the first and second regions, the metallic element contained in the silicon oxide film having a density distribution in a thickness direction of the silicon oxide film, a peak of the density distribution existing in the third region, and an electrode formed on the gate dielectrics.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: October 16, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Eguchi, Seiji Inumiya, Yoshitaka Tsunashima
  • Publication number: 20070235799
    Abstract: A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.
    Type: Application
    Filed: June 14, 2007
    Publication date: October 11, 2007
    Inventors: Masayuki Tanaka, Yoshio Ozawa, Hirokazu Ishida, Katsuaki Natori, Seiji Inumiya
  • Patent number: 7265427
    Abstract: A semiconductor apparatus wherein a device formed on a semiconductor substrate comprises a gate insulating film including a high dielectric constant film formed on the substrate and an anti-reaction film formed on the high dielectric constant film, and a gate electrode formed on the anti-reaction film, the high dielectric constant film comprises a film containing at least one of Hf and Zr, and Si and O, or a film containing at least one of Hf and Zr, and Si, O and N, the anti-reaction film comprises an SiO2 film, a film containing SiO2 as a main component and at least one of Hf and Zr, a film containing SiO2 as a main component and N, a film containing SiO2 as a main component, Hf and N, a film containing SiO2 as a main component, Zr and N, or a film containing SiO2 as a main component, Hf, Zr and N.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: September 4, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akio Kaneko, Kazuhiro Eguchi, Seiji Inumiya, Katsuyuki Sekine, Motoyuki Sato
  • Publication number: 20070197048
    Abstract: According to the present invention, there is provided a semiconductor device comprising: a gate insulating film selectively formed on a predetermined region of a semiconductor substrate; a gate electrode formed on said gate insulating film; and a source region and drain region formed, in a surface portion of said semiconductor substrate, on two sides of a channel region positioned below said gate electrode, wherein a carbon concentration in an interface where said gate insulating film is in contact with said gate electrode is not more than 5×1022 atoms/cm3.
    Type: Application
    Filed: April 19, 2007
    Publication date: August 23, 2007
    Inventors: Katsuyuki Sekine, Akio Kaneko, Motoyuki Sato, Seiji Inumiya, Kazuhiro Eguchi
  • Patent number: 7220681
    Abstract: A semiconductor device including a gate insulating film selectively formed on a predetermined region of a semiconductor substrate; a gate electrode formed on said gate insulating film; and a source region and drain region formed, in a surface portion of said semiconductor substrate, on two sides of a channel region positioned below said gate electrode; wherein a carbon concentration in an interface where said gate insulating film is in contact with said gate electrode is not more than 5×1022 atoms/cm3.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: May 22, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuyuki Sekine, Akio Kaneko, Motoyuki Sato, Seiji Inumiya, Kazuhiro Eguchi
  • Publication number: 20070034974
    Abstract: A semiconductor device comprises a semiconductor region including silicon, and an insulating film including silicon, oxygen, nitrogen, and helium, the dielectric film provided on the semiconductor region, and the dielectric film having a concentration distribution with respect to a film thickness direction, the concentration distribution having a maximal value of concentration of the helium in a surface portion on the semiconductor region side and a maximal value of concentration of the nitrogen in a surface portion on a side opposite to the semiconductor region.
    Type: Application
    Filed: October 25, 2006
    Publication date: February 15, 2007
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Katsuyuki Sekine, Seiji Inumiya, Ichiro Mizushima
  • Publication number: 20070020957
    Abstract: A method of forming an insulating film includes forming a base film comprising a material whose surface is oxidized by being exposed to an oxidant. A source gas containing a metal material and a first oxidant having a first oxidation force are alternately supplied to form a first insulating film on the base film. A source gas containing a metal material and a second oxidant having a second oxidation force stronger than the first oxidation force are alternately supplied to form a second insulating film on the first insulating film.
    Type: Application
    Filed: November 10, 2005
    Publication date: January 25, 2007
    Inventors: Ichiro Mizushima, Masayuki Tanaka, Katsuaki Natori, Yoshio Ozawa, Seiji Inumiya, Katsuyuki Sekine, Tetsuya Kai
  • Patent number: 7141466
    Abstract: According to the present invention, there is provided a semiconductor device comprising: an interface insulating film selectively formed on a predetermined region of a semiconductor substrate, and having a film thickness of substantially one atomic layer; a gate insulating film formed on said interface insulating film, and having a dielectric constant higher than that of said interface insulating film; a gate electrode formed on said gate insulating film; and source and drain regions formed in a surface region of said semiconductor substrate on two sides of a channel region positioned below said gate electrode.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: November 28, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Motoyuki Sato, Kazuhiro Eguchi, Seiji Inumiya, Katsuyuki Sekine, Akio Kaneko
  • Publication number: 20060244083
    Abstract: A semiconductor device comprising a semiconductor substrate, a gate dielectrics formed on the semiconductor substrate and including a silicon oxide film containing a metallic element, the silicon oxide film containing the metallic element including a first region near a lower surface thereof, a second region near an upper surface thereof, and a third region between the first and second regions, the metallic element contained in the silicon oxide film having a density distribution in a thickness direction of the silicon oxide film, a peak of the density distribution existing in the third region, and an electrode formed on the gate dielectrics.
    Type: Application
    Filed: June 28, 2006
    Publication date: November 2, 2006
    Inventors: Kazuhiro Eguchi, Seiji Inumiya, Yoshitaka Tsunashima
  • Patent number: 7129125
    Abstract: A semiconductor device comprises a semiconductor region including silicon, and an insulating film including silicon, oxygen, nitrogen, and helium, the dielectric film provided on the semiconductor region, and the dielectric film having a concentration distribution with respect to a film thickness direction, the concentration distribution having a maximal value of concentration of the helium in a surface portion on the semiconductor region side and a maximal value of concentration of the nitrogen in a surface portion on a side opposite to the semiconductor region.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: October 31, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuyuki Sekine, Seiji Inumiya, Ichiro Mizushima
  • Patent number: 7101775
    Abstract: A semiconductor device comprising a semiconductor substrate, a gate dielectrics formed on the semiconductor substrate and including a silicon oxide film containing a metallic element, the silicon oxide film containing the metallic element including a first region near a lower surface thereof, a second region near an upper surface thereof, and a third region between the first and second regions, the metallic element contained in the silicon oxide film having a density distribution in a thickness direction of the silicon oxide film, a peak of the density distribution existing in the third region, and an electrode formed on the gate dielectrics.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: September 5, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Eguchi, Seiji Inumiya, Yoshitaka Tsunashima
  • Patent number: 7091135
    Abstract: There is disclosed a method of manufacturing a semiconductor device, which comprises forming a film containing metal elements and silicon elements on a semiconductor substrate, exposing the semiconductor substrate to an atmosphere containing an oxidant to form a silicon dioxide film at the interface between the semiconductor substrate and the film containing metal elements and silicon elements, and nitriding the film containing metal elements and silicon elements after forming the silicon dioxide film.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: August 15, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Seiji Inumiya, Kazuhiro Eguchi
  • Publication number: 20060094255
    Abstract: According to the present invention, there is provided a semiconductor device comprising: a gate insulating film selectively formed on a predetermined region of a semiconductor substrate; a gate electrode formed on said gate insulating film; and a source region and drain region formed, in a surface portion of said semiconductor substrate, on two sides of a channel region positioned below said gate electrode, wherein a carbon concentration in an interface where said gate insulating film is in contact with said gate electrode is not more than 5×1022 atoms/cm3.
    Type: Application
    Filed: February 4, 2005
    Publication date: May 4, 2006
    Inventors: Katsuyuki Sekine, Akio Kaneko, Motoyuki Sato, Seiji Inumiya, Kazuhiro Eguchi
  • Publication number: 20060093731
    Abstract: According to the present invention, there is provided a semiconductor device fabrication method comprising: measuring light emission intensity of at least one type of wavelength contained in light emitted from a plasma, when one of nitriding, oxidation, and impurity doping is to be performed on a surface of a semiconductor substrate in a processing vessel by using the plasma; calculating, for each semiconductor substrate, an exposure time during which the semiconductor substrate is exposed to the plasma, on the basis of the measured light emission intensity; and exposing each semiconductor substrate to the plasma on the basis of the calculated exposure time, thereby performing one of the nitriding, oxidation, and impurity doping.
    Type: Application
    Filed: October 28, 2005
    Publication date: May 4, 2006
    Inventors: Katsuyuki Sekine, Seiji Inumiya, Motoyuki Sato, Akio Kaneko, Kazuhiro Eguchi
  • Publication number: 20060057746
    Abstract: According to the present invention, there is provided a semiconductor device fabrication method, comprising: depositing a film made of an insulating material on a surface of a semiconductor substrate; measuring a film thickness and/or composition of the film; setting nitriding conditions or oxidation conditions on the basis of the measurement result; and nitriding or oxidizing the film on the basis of the set nitriding conditions or oxidation conditions.
    Type: Application
    Filed: November 12, 2004
    Publication date: March 16, 2006
    Inventors: Seiji Inumiya, Motoyuki Sato, Akio Kaneko, Katsuyuki Sekine, Kazuhiro Eguchi
  • Publication number: 20050236678
    Abstract: According to the present invention, there is provided a semiconductor device comprising: an interface insulating film selectively formed on a predetermined region of a semiconductor substrate, and having a film thickness of substantially one atomic layer; a gate insulating film formed on said interface insulating film, and having a dielectric constant higher than that of said interface insulating film; a gate electrode formed on said gate insulating film; and source and drain regions formed in a surface region of said semiconductor substrate on two sides of a channel region positioned below said gate electrode.
    Type: Application
    Filed: October 13, 2004
    Publication date: October 27, 2005
    Inventors: Motoyuki Sato, Kazuhiro Eguchi, Seiji Inumiya, Katsuyuki Sekine, Akio Kaneko
  • Publication number: 20050212036
    Abstract: A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate provided on each of the element formation regions through a first gate insulation film, a control gate provided on the floating gate through a second gate insulation film, and source/drain regions provided in the semiconductor substrate, wherein a mutual diffusion layer is provided at least at an interface between the second gate insulation film and the control gate.
    Type: Application
    Filed: March 25, 2005
    Publication date: September 29, 2005
    Inventors: Masayuki Tanaka, Yoshio Ozawa, Hirokazu Ishida, Katsuaki Natori, Seiji Inumiya
  • Publication number: 20050179091
    Abstract: A semiconductor device and a method of manufacturing the semiconductor device are disclosed. A semiconductor device of one of several disclosed embodiments comprises a semiconductor layer having a source region and a drain region, and a gate insulating film provided on the semiconductor layer between the source region and the drain region. The gate insulating film comprising an oxide including a metal element and further includes at least one element selected from the group consisting of nitrogen and aluminum as a first element. The content of the first element is relatively higher at both ends near the source region and the drain region than at a center of the gate insulating film. A gate electrode is provided on the gate insulating film.
    Type: Application
    Filed: April 13, 2005
    Publication date: August 18, 2005
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira Nishiyama, Seiji Inumiya
  • Publication number: 20050170666
    Abstract: A manufacturing method of a semiconductor device disclosed herein, comprises: forming a silicate film containing metal on a substrate; and introducing nitrogen and deuterium into the silicate film by using ND3 gas.
    Type: Application
    Filed: December 1, 2004
    Publication date: August 4, 2005
    Inventors: Katsuyuki Sekine, Yoshitaka Tsunashima, Seiji Inumiya, Akio Kaneko, Motoyuki Sato, Kazuhiro Eguchi
  • Patent number: 6924536
    Abstract: A semiconductor device and a method of manufacturing the semiconductor device are disclosed. A semiconductor device of one of several disclosed embodiments comprises a semiconductor layer having a source region and a drain region, and a gate insulating film provided on the semiconductor layer between the source region and the drain region. The gate insulating film comprising an oxide including a metal element and further includes at least one element selected from the group consisting of nitrogen and aluminum as a first element. The content of the first element is relatively higher at both ends near the source region and the drain region than at a center of the gate insulating film. A gate electrode is provided on the gate insulating film.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: August 2, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Nishiyama, Seiji Inumiya