Patents by Inventor Seiji Ohno

Seiji Ohno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7288544
    Abstract: Achiral pyrimidine derivatives and pyridine derivatives of the following formulae or analogs thereof have selective N-type calcium channel antagonistic activity and showed analgesic action when they were taken orally.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: October 30, 2007
    Assignee: Ajinomoto Co., Inc.
    Inventors: Seiji Ohno, Kayo Otani, Seiji Niwa, Satoshi Iwayama, Akira Takahara, Hajime Koganei, Yukitsugu Ono, Shinichi Fujita, Tomoko Takeda, Masako Hagihara, Akiko Okajima
  • Patent number: 7286259
    Abstract: A method for driving a self-scanning light-emitting element array is provided in which two light-emitting elements may be illuminated simultaneously in one chip. In a self-scanning light-emitting element array including a transfer element array and light-emitting element array, a magnitude of the write signal for illuminating adjacent two light-emitting elements simultaneously is two times that of the write signal for illuminating one light-emitting element. The self-scanning light-emitting element array is composed of a plurality of self-scanning light-emitting element array chips arranged in a linear manner, and the two-phase clock pulses are applied commonly to the plurality of self-scanning light-emitting element array chips.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: October 23, 2007
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Seiji Ohno, Shuya Ogi
  • Patent number: 7259397
    Abstract: Provided is a self-scanning light-emitting element array chip structured on a substrate using Si. A lattice mismatching buffer layer (32) is formed on a Si substrate (30). On the lattice mismatching buffer layer (32), successively stacked are an n-type AlGaAs layer (14), a p-type AlGaAs layer (16), an n-type AlGaAs layer (18), and a p-type AlGaAs layer (20) in this order. On the AlGaAs layer (20) provided is an anode electrode (22), on the AlGaAs layer (18) a gate electrode (24), on the bottom surface of the GaAs substrate a cathode electrode (26).
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: August 21, 2007
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Seiji Ohno
  • Patent number: 7247645
    Abstract: Compounds having a selective N-type calcium channel antagonistic activity are provided. Dihydropyridine derivatives represented by the following formula: analogs thereof and pharmaceutically acceptable salts thereof have an activity of selectively inhibiting the action of N-type calcium channel, and they are used as therapeutic agents for various diseases relating to N-type calcium channel.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: July 24, 2007
    Assignee: Ajinomoto Co., Inc.
    Inventors: Chika Nakanishi, Yoko Masuzawa, Masako Hagihara, Takashi Yamamoto, Hiroyuki Matsueda, Seiji Ohno, Seiji Niwa, Morikazu Kito, Akira Takahara, Yukitsugu Ono, Tomoko Takeda, Yuki Kajigaya, Hajime Koganei
  • Patent number: 7193250
    Abstract: A light-emitting element including a light-emitting thyristor and a schottky barrier diode is provided. A schottky barrier diode is formed by contacting a metal terminal to a gate layer of a three-terminal light-emitting thyristor consisting of a PNPN-structure. A self-scanning light-emitting element array may be driven at 3.0 V by using such a schottky barrier diode as a coupling diode of a diode-coupled self-scanning light-emitting element array.
    Type: Grant
    Filed: February 21, 2003
    Date of Patent: March 20, 2007
    Assignee: Nippon Sheet Glass Company, Limited
    Inventor: Seiji Ohno
  • Publication number: 20070057279
    Abstract: A light-emitting element including a light-emitting thyristor and a Schottky barrier diode is provided. A Schottky barrier diode is formed by contacting a metal terminal to a gate layer of a three-terminal light-emitting thyristor consisting of a PNPN-structure. A self-scanning light-emitting element array may be driven at 3.0V by using such a Schottky barrier diode as a coupling diode of a diode-coupled self-scanning light-emitting element array.
    Type: Application
    Filed: November 16, 2006
    Publication date: March 15, 2007
    Inventor: Seiji Ohno
  • Patent number: 7009221
    Abstract: A light-emitting thyristor having an improved luminous efficiency is provided. According to the light-emitting thyristor, a p-type AlGaAs layer and an n-type AlGaAs layer are alternately stacked to form a pnpn structure on a GaAs buffer layer formed on a GaAs substrate, and Al composition of the AlGaAs layer just above the GaAs buffer layer is increased in steps or continuously.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: March 7, 2006
    Assignee: Nippon Sheet Glass Company Limited
    Inventor: Seiji Ohno
  • Publication number: 20060001171
    Abstract: An electrode contact structure having a high reliability is provided. The structure comprises an Au electrode formed on a GaAs substrate, a contact hole open in an insulating film on the Au electrode, and an Al wiring being in contact with the Au electrode through the contact hole. The difference between the height of the portion having the maximum thickness of the Al wiring and the height of the portion having the minimum thickness of the Al wiring is substantially equal to or smaller than the thickness of the insulating film. It is preferable that the thickness of the Au electrode is in the range of 0.1-0.2 ?m, the overlapped width between the peripheral portion of the Au electrode and the insulating film is 1 ?m or less, or the area of the contact hole is at least 16 ?m2 or more.
    Type: Application
    Filed: April 28, 2005
    Publication date: January 5, 2006
    Inventors: Seiji Ohno, Taku Kinoshita
  • Publication number: 20050230704
    Abstract: A self-scanning light-emitting element array is driven such that, if a current supply line for a light-emitting element is broken, a light-emitting element neighboring failed light-emitting element continues to operate. In first time period turned-on states of the neighboring two thyristor overlap when the turned-on state is transferred in the transfer portion by the two-phase clock pulses; a second time period is provided after the first period, during which the light-emitting thyristor corresponding to the turned-on thyristor in the transfer portion is lighted by the light-emitting signal; in a third time period, after the second time period, a turned-off transfer thyristor for the turned-on thyristor is turned on and the lighted thyristor in the light-emitting portion is lighted out. The second time period has a length in which the thyristor having the broken line neighboring the failed thyristor is lighted.
    Type: Application
    Filed: April 11, 2005
    Publication date: October 20, 2005
    Inventor: Seiji Ohno
  • Publication number: 20050224810
    Abstract: A light-emitting element including a light-emitting thyristor and a schottky barrier diode is provided. A schottky barrier diode is formed by contacting a metal terminal to a gate layer of a three-terminal light-emitting thyristor consisting of a PNPN-structure. A self-scanning light-emitting element array may be driven at 3.0 V by using such a schottky barrier diode as a coupling diode of a diode-coupled self-scanning light-emitting element array.
    Type: Application
    Filed: February 21, 2003
    Publication date: October 13, 2005
    Inventor: Seiji Ohno
  • Patent number: 6919583
    Abstract: An edge-emitting thyristor having an improved external luminous efficiency and a self-scanning light-emitting device array comprising the edge-emitting thyristor are disclosed. To improve the external luminous efficiency of an edge-emitting light-emitting thyristor, a structure where the current injected from an electrode concentrates on and near the edge of the light-emitting thyristor is adopted.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: July 19, 2005
    Assignee: Nippon Sheet Glass Company, Limited
    Inventors: Takashi Tagami, Yukihisa Kusuda, Seiji Ohno, Nobuyuki Komaba
  • Publication number: 20050087748
    Abstract: Provided is a self-scanning light-emitting element array chip structured on a substrate using Si. A lattice mismatching buffer layer (32) is formed on a Si substrate (30). On the lattice mismatching buffer layer (32), successively stacked are an n-type AlGaAs layer (14), a p-type AlGaAs layer (16), an n-type AlGaAs layer (18), and a p-type AlGaAs layer (20) in this order. On the AlGaAs layer (20) provided is an anode electrode (22), on the AlGaAs layer (18) a gate electrode (24), on the bottom surface of the GaAs substrate a cathode electrode (26).
    Type: Application
    Filed: December 10, 2002
    Publication date: April 28, 2005
    Applicant: Nippon Sheet Glass Co., Ltd
    Inventor: Seiji Ohno
  • Patent number: 6855716
    Abstract: Dihydropyrimidine derivatives of the following formula or analogs thereof have selective N-type calcium channel antagonistic activity, and they are used as therapeutic agents for various diseases participating in the N-type calcium channels.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: February 15, 2005
    Assignee: Ajinomoto Co., Inc.
    Inventors: Seiji Ohno, Akiko Okajima, Seiji Niwa, Morikazu Kito, Akira Takahara, Yukitsugu Ono, Yuki Kajigaya, Tomoko Takeda, Hajime Koganei
  • Publication number: 20040196708
    Abstract: A light-emitting thyristor having an improved luminous efficiency is provided. According to the light-emitting thyristor, a p-type AlGaAs layer and an n-type AlGaAs layer are alternately stacked to form a pnpn structure on a GaAs buffer layer formed on a GaAs substrate, and Al composition of the AlGaAs layer just above the GaAs buffer layer is increased in steps or continuously.
    Type: Application
    Filed: April 23, 2004
    Publication date: October 7, 2004
    Inventor: Seiji Ohno
  • Publication number: 20040167118
    Abstract: The invention relates to a compound represented by the following general formula (1) or its analogue, which selectively inhibit N-type calcium channels or its analogue, and to a method for treating pain etc.
    Type: Application
    Filed: February 27, 2004
    Publication date: August 26, 2004
    Applicant: AJINOMOTO CO., INC.
    Inventors: Takashi Yamamoto, Seiji Niwa, Kayo Otani, Seiji Ohno, Hajime Koganei, Satoshi Iwayama, Akira Takahara, Yukitsugu Ono, Tomoko Takeda, Shinichi Fujita, Keiko Moki
  • Publication number: 20040159844
    Abstract: An edge-emitting thyristor having an improved external luminous efficiency and a self-scanning light-emitting device array comprising the edge-emitting thyristor are disclosed. To improve the external luminous efficiency of an edge-emitting light-emitting thyristor, a structure where the current injected from an electrode concentrates on and near the edge of the light-emitting thyristor is adopted.
    Type: Application
    Filed: February 11, 2004
    Publication date: August 19, 2004
    Inventors: Takashi Tagami, Yukihisa Kusuda, Seiji Ohno, Nobuyuki Komaba
  • Patent number: 6747940
    Abstract: An optical writing head in which the number of bus lines to be derived may be decreased by using a self-scanning light-emitting element array is provided. A &PHgr;1 bonding pad of each SLED chip is connected to &PHgr;1 bus line via a resistor R1, and a &PHgr;2 bonding pad of each SLED chip is connected to &PHgr;2 bus line via a resistor R2. &PHgr;S bonding pad is connected to a &PHgr;S bus line via resistor RS, and VGA bonding pad is connected to VGA bus line. &PHgr;I bonding pad of each SLED chip is connected to a corresponding one of terminal &PHgr;I(1)-&PHgr;I(56) of a connector.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: June 8, 2004
    Assignee: Nippon Sheet Glass Co., Ltd.
    Inventor: Seiji Ohno
  • Patent number: 6717183
    Abstract: A light-emitting thyristor matrix array in which the area of a chip may be decreased is provided. A plurality of three-terminal light-emitting thyristors are arrayed in one line in parallel with the long side of the chip, a plurality of bonding pads are arrayed in one line in parallel with the long side of the chip. Thereby, the area of the chip becomes smaller.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: April 6, 2004
    Assignee: Nippon Sheet Glass Co., Ltd.
    Inventors: Seiji Ohno, Yukihisa Kusuda
  • Patent number: 6717182
    Abstract: A self-scanning light-emitting element array using an end face light-emitting thyristor having improved external emission efficiency is provided. To improve the external emission efficiency of the end face light-emitting thyristor, the present invention adopts such structure that the current injected from an anode is concentrated to near the end face of the light-emitting thyristor. A self-scanning light-emitting element array is implemented by using such end face light-emitting thyristor.
    Type: Grant
    Filed: February 8, 2001
    Date of Patent: April 6, 2004
    Assignee: Nippon Sheet Glass Co., Ltd.
    Inventors: Takashi Tagami, Yukihisa Kusuda, Seiji Ohno, Nobuyuki Komaba
  • Publication number: 20040046976
    Abstract: A method for driving a self-scanning light-emitting element array is provided in which two light-emitting elements may be illuminated simultaneously in one chip. In a self-scanning light-emitting element array including a transfer element array and light-emitting element array, a magnitude of the write signal for illuminating adjacent two light-emitting elements simultaneously is two times that of the write signal for illuminating one light-emitting element. The self-scanning light-emitting element array is composed of a plurality of self-scanning light-emitting element array chips arranged in a linear manner, and the two-phase clock pulses are applied commonly to the plurality of self-scanning light-emitting element array chips.
    Type: Application
    Filed: March 4, 2003
    Publication date: March 11, 2004
    Inventors: Seiji Ohno, Shuya Ogi