Patents by Inventor Semiconductor Energy Laboratory Co., Ltd.
Semiconductor Energy Laboratory Co., Ltd. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130146882Abstract: An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 ?m is 1 aA or less.Type: ApplicationFiled: February 11, 2013Publication date: June 13, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
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Publication number: 20130147365Abstract: Reduction of luminance dispersion of a plurality of light-emitting panels combined into one light-emitting device is achieved by the use of a new light-emitting device which has a photosensor, a plurality of light-emitting panels, DC/DC converters connected to their respective light-emitting panels, and a control circuit configured to control output currents of the DC/DC converters in accordance with illuminance data acquired with the photosensor. The control circuit successively turns on the plurality of light-emitting panels, and controls the output currents of the DC/DC converters in accordance with differences of the illuminance data acquired with the photosensor when the light-emitting panels are turned on.Type: ApplicationFiled: December 5, 2012Publication date: June 13, 2013Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130149605Abstract: A lithium secondary battery which has high charge-discharge capacity, can be charged and discharged at high speed, and has little deterioration in battery characteristics due to charge and discharge is provided. A negative electrode includes a current collector and a negative electrode active material layer. The current collector includes a plurality of protrusion portions extending in a substantially perpendicular direction and a base portion connected to the plurality of protrusion portions. The protrusion portions and the base portion are formed using the same material containing titanium. A top surface of the base portion and at least a side surface of the protrusion portion are covered with the negative electrode active material layer. The negative electrode active material layer may be covered with graphene.Type: ApplicationFiled: December 3, 2012Publication date: June 13, 2013Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130146881Abstract: An area sensor of the present invention has a function of displaying an image in a sensor portion by using light-emitting elements and a reading function using photoelectric conversion devices. Therefore, an image read in the sensor portion can be displayed thereon without separately providing an electronic display on the area sensor. Furthermore, a photoelectric conversion layer of a photodiode according to the present invention is made of an amorphous silicon film and an N-type semiconductor layer and a P-type semiconductor layer are made of a polycrystalline silicon film. The amorphous silicon film is formed to be thicker than the polycrystalline silicon film. As a result, the photodiode according to the present invention can receive more light.Type: ApplicationFiled: February 6, 2013Publication date: June 13, 2013Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130148041Abstract: A variable capacitor is formed from a pair of electrodes and a dielectric interposed between the electrodes over a substrate, and an external input is detected by changing capacitance of the variable capacitor by a physical or electrical force. Specifically, a variable capacitor and a sense amplifier are provided over the same substrate, and the sense amplifier reads the change of capacitance of the variable capacitor and transmits a signal in accordance with the input to a control circuit.Type: ApplicationFiled: February 14, 2013Publication date: June 13, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130148411Abstract: A memory device including first to fourth memory cell arrays and a driver circuit including a pair of bit line driver circuits and a pair of word line driver circuits is provided. The first to fourth memory cell arrays are overlap with the driver circuit. Each of the pair of bit line driver circuits and a plurality of bit lines are connected through connection points on an edge along the boundary between the first and second memory cell arrays or on an edge along the boundary between the third and fourth memory cell arrays. Each of the pair of word line driver circuits and a plurality of word lines are connected through second connection points on an edge along the boundary between the first and fourth memory cell arrays or on an edge along the boundary between the second and third memory cell arrays.Type: ApplicationFiled: December 5, 2012Publication date: June 13, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130147518Abstract: In a logic circuit where clock gating is performed, the standby power is reduced or malfunction is suppressed. The logic circuit includes a transistor which is in an off state where a potential difference exists between a source terminal and a drain terminal over a period during which a clock signal is not supplied. A channel formation region of the transistor is formed using an oxide semiconductor in which the hydrogen concentration is reduced. Specifically, the hydrogen concentration of the oxide semiconductor is 5×1019 (atoms/cm3) or lower. Thus, leakage current of the transistor can be reduced. As a result, in the logic circuit, reduction in standby power and suppression of malfunction can be achieved.Type: ApplicationFiled: February 8, 2013Publication date: June 13, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130149840Abstract: It is an object of the present invention to provide a method for manufacturing an SOI substrate having an SOI layer that can be used in practical applications with high yield even when a flexible substrate such as a glass substrate or a plastic substrate is used. Further, it is another object of the present invention to provide a method for manufacturing a thin semiconductor device using such an SOI substrate with high yield. When a single-crystal semiconductor substrate is bonded to a flexible substrate having an insulating surface and the single-crystal semiconductor substrate is separated to manufacture an SOI substrate, one or both of bonding surfaces are activated, and then the flexible substrate having an insulating surface and the single-crystal semiconductor substrate are attached to each other.Type: ApplicationFiled: February 5, 2013Publication date: June 13, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
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Publication number: 20130146869Abstract: It is an object to reduce characteristic variation among transistors and reduce contact resistance between an oxide semiconductor layer and a source electrode layer and a drain electrode layer, in a transistor where the oxide semiconductor layer is used as a channel layer. In a transistor where an oxide semiconductor is used as a channel layer, at least an amorphous structure is included in a region of an oxide semiconductor layer between a source electrode layer and a drain electrode layer, where a channel is to be formed, and a crystal structure is included in a region of the oxide semiconductor layer which is electrically connected to an external portion such as the source electrode layer and the drain electrode layer.Type: ApplicationFiled: January 31, 2013Publication date: June 13, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
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Publication number: 20130147281Abstract: A contactless power feeding system includes a power transmitting device and a power receiving device. The power transmitting device includes a first AC power source configured to generate an AC power with a first frequency, a second AC power source configured to generate an AC power with a second frequency which is different from the first frequency, a first electromagnetic induction coil, and a first resonant coil. The power receiving device includes a second resonant coil, a second electromagnetic induction coil, and a power storage unit. Power is wirelessly supplied to the power storage unit at the second frequency by a magnetic resonance phenomenon which occurs between the first resonant coil and the second resonant coil.Type: ApplicationFiled: December 5, 2012Publication date: June 13, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130149816Abstract: To reduce defects of a semiconductor device, such as defects in shape and characteristic due to external stress and electrostatic discharge. To provide a highly reliable semiconductor device. In addition, to increase manufacturing yield of a semiconductor device by reducing the above defects in the manufacturing process. The semiconductor device includes a semiconductor integrated circuit sandwiched by impact resistance layers against external stress and an impact diffusion layer diffusing the impact and a conductive layer covering the semiconductor integrated circuit. With the use of the conductive layer covering the semiconductor integrated circuit, electrostatic breakdown (malfunctions of the circuit or damages of a semiconductor element) due to electrostatic discharge of the semiconductor integrated circuit can be prevented.Type: ApplicationFiled: February 5, 2013Publication date: June 13, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: SEMICONDUCTOR ENERGY LABORATORY CO., LTD
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Publication number: 20130149798Abstract: One object is to provide a method for manufacturing a display device in which shift of the threshold voltage of a thin film transistor including an oxide semiconductor layer can be suppressed even when ultraviolet light irradiation is performed in the process for manufacturing the display device. In the method for manufacturing a display device, ultraviolet light irradiation is performed at least once, a thin film transistor including an oxide semiconductor layer is used for a switching element, and heat treatment for repairing damage to the oxide semiconductor layer caused by the ultraviolet light irradiation is performed after all the steps of ultraviolet light irradiation are completed.Type: ApplicationFiled: February 7, 2013Publication date: June 13, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130147691Abstract: There are provided a driving circuit of a semiconductor display device which can obtain an excellent picture without picture blur (display unevenness) and with high fineness/high resolution, and the semiconductor display device. A buffer circuit used in the driving circuit of the semiconductor display device is constituted by a plurality of TFTs each having a small channel width, and a plurality of such buffer circuits are connected in parallel with each other.Type: ApplicationFiled: February 11, 2013Publication date: June 13, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130141961Abstract: An object is to provide a highly integrated storage device which can operate at high speed and a driving method thereof. The storage device includes two storage portions, two precharge switches, and one sense amplifier. In each of the storage portions, storage elements are arranged in a matrix. In each of the storage elements, a node electrically connected to a source or a drain of a transistor whose off-state current is small is a memory storing portion. A page buffer circuit is unnecessary; thus, high-speed operation is possible and high integration is achieved.Type: ApplicationFiled: November 30, 2012Publication date: June 6, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130140577Abstract: A semiconductor device and a method for preparing the same that can solve crack of a semiconductor film, capacitance electrodes and the like due to stress when forming a source electrode and a drain electrode in a semiconductor device having a thin film transistor and a holding capacitance with three or more capacitance electrodes is provided. Before forming the source electrode and the drain electrode, a crystalline silicon film for relaxing the stress is formed, then a contact hole connecting to the semiconductor film of the thin film transistor is opened, and a metal film to be the source electrode and the drain electrode is formed.Type: ApplicationFiled: February 1, 2013Publication date: June 6, 2013Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130140554Abstract: A semiconductor device including a minute transistor with a short channel length is provided. A gate insulating layer is formed over a gate electrode layer; an oxide semiconductor layer is formed over the gate insulating layer; a first conductive layer and a second conductive layer are formed over the oxide semiconductor layer; a conductive film is formed over the first conductive layer and the second conductive layer; a resist mask is formed over the conductive film by performing electron beam exposure; and then a third conductive layer and a fourth conductive layer are formed over and in contact with the first conductive layer and the second conductive layer, respectively, by selectively etching the conductive film.Type: ApplicationFiled: November 27, 2012Publication date: June 6, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130143090Abstract: A square lithium secondary battery includes a wound body in which a collective sheet in which a positive electrode sheet and a negative electrode sheet overlap each other with a first separator interposed therebetween is wound while a second separator is put inside the collective sheet. An active material mixture layer on one or both surfaces of at least one of the positive electrode sheet and the negative electrode sheet includes a region with a plurality of openings and a region with no opening. At least a bent portion of the collective sheet is covered with the region with the plurality of openings.Type: ApplicationFiled: November 30, 2012Publication date: June 6, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130143387Abstract: There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut or ELTRAN. Next, the single crystal silicon thin film is patterned to form an island-like silicon layer, and then, a thermal oxidation treatment is carried out in an oxidizing atmosphere containing a halogen element, so that an island-like silicon layer in which the trap levels and the defects are removed is obtained.Type: ApplicationFiled: November 19, 2012Publication date: June 6, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130140617Abstract: A semiconductor device capable of high-speed operation. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is supplied with a first signal. One of a source and a drain of the second transistor is supplied with a first potential. A gate of the second transistor is supplied with a second signal. A first electrode of the capacitor is electrically connected to the other of the source and the drain of the first transistor. A second electrode of the capacitor is electrically connected to the other of the source and the drain of the second transistor. In a first period, the first signal is low and the second signal is high. In a second period, the first signal is high and the second signal is either low or high.Type: ApplicationFiled: December 4, 2012Publication date: June 6, 2013Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventor: Semiconductor Energy Laboratory Co., Ltd.
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Publication number: 20130140560Abstract: An intrinsic or substantially intrinsic semiconductor, which has been subjected to a step of dehydration or dehydrogenation and a step of adding oxygen so that the carrier concentration is less than 1×1012/cm3 is used for an oxide semiconductor layer of an insulated gate transistor, in which a channel region is formed. The length of the channel formed in the oxide semiconductor layer is set to 0.2 ?m to 3.0 ?m inclusive and the thicknesses of the oxide semiconductor layer and the gate insulating layer are set to 15 nm to 30 nm inclusive and 20 nm to 50 nm inclusive, respectively, or 15 nm to 100 nm inclusive and 10 nm to 20 nm inclusive, respectively. Consequently, a short-channel effect can be suppressed, and the amount of change in threshold voltage can be less than 0.5 V in the range of the above channel lengths.Type: ApplicationFiled: January 30, 2013Publication date: June 6, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Semiconductor Energy Laboratory Co., Ltd.
