Patents by Inventor Seok-Woo Nam

Seok-Woo Nam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8969939
    Abstract: A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: March 3, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hwan Kim, Hun-Hyeoung Leam, Tae-Hyun Kim, Seok-Woo Nam, Hyun Namkoong, Yong-Seok Kim, Tea-Kwang Yu
  • Publication number: 20140264778
    Abstract: A precursor composition for forming a silicon dioxide film on a substrate, the precursor composition including at least one precursor compound represented by the following chemical formulas (1), (2), and (3): HxSiAy(NR1R2)4-x-y??(1) HxSi(NAR3)4-x??(2) HxSi(R4)z(R5)4-x-z??(3) wherein, independently in the chemical formulas (1), (2), and (3), H is hydrogen, x is 0 to 3, Si is silicon, A is a halogen, y is 1 to 4, N is nitrogen, and R1, R2, R3, and R5 are each independently selected from the group of H, aryl, perhaloaryl, C1-8 alkyl, and C1-8 perhaloalkyl, and R4 is aryl in which at least one hydrogen is replaced with a halogen or C1-8 alkyl in which at least one hydrogen is replaced with a halogen
    Type: Application
    Filed: February 14, 2014
    Publication date: September 18, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Han-Jin LIM, Bong-Hyun KIM, Seok-Woo NAM, Dong-Woon SHIN, In-Sang JEON, Soo-Jin HONG
  • Publication number: 20140231958
    Abstract: A capacitor of a memory device includes dielectric layers with different energy band gaps. The capacitor may include, for example, a first electrode and a first dielectric layer on the first electrode. The capacitor may further include a second dielectric layer on the first dielectric layer. The first and second dielectric layers may include the same dielectric material with different concentration of an impurity therein. A second electrode is disposed on the second dielectric layer.
    Type: Application
    Filed: November 4, 2013
    Publication date: August 21, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Han-Jin Lim, Seok-Woo Nam, Jung-Hwan Oh, Ki-Vin Im
  • Patent number: 8604550
    Abstract: A semiconductor device includes a semiconductor substrate having at least two oblique side surfaces and a first bottom surface in a recessed portion. A gate insulating layer is formed on the recessed portion. A gate electrode is formed on the gate insulating layer. A channel region is formed below the gate electrode. Gate spacers are formed on side surfaces of the gate electrode.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: December 10, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-Wook Lee, Jae-Jik Baek, In-Seak Hwang, Seok-Woo Nam
  • Publication number: 20130320461
    Abstract: A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.
    Type: Application
    Filed: August 6, 2013
    Publication date: December 5, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: JUNG-HWAN KIM, Hun-Hyeoung Leam, Tae-Hyun Kim, Seok-Woo Nam, Hyun Namkoong, Yong-Seok Kim, Tea-Kwang Yu
  • Patent number: 8519465
    Abstract: A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: August 27, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hwan Kim, Hun-Hyeoung Leam, Tae-Hyun Kim, Seok-Woo Nam, Hyun Namkoong, Yong-Seok Kim, Tea-Kwang Yu
  • Patent number: 8481398
    Abstract: A method of forming a semiconductor device includes forming a lower electrode layer on a substrate, forming a surface oxide layer on the lower electrode layer, partially removing the lower electrode layer to form a lower electrode, removing the surface oxide layer to expose the lower electrode, forming a capacitor dielectric layer on the lower electrode, and forming an upper electrode on the capacitor dielectric layer.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: July 9, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Sik Chung, Jung-Hee Chung, Young-Jin Kim, Seok-Woo Nam, Han-Jin Lim, Kyoung-Ryul Yoon
  • Publication number: 20120286369
    Abstract: A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.
    Type: Application
    Filed: July 19, 2012
    Publication date: November 15, 2012
    Inventors: Jung Hwan Kim, Hun-Hyeoung Leam, Tae-Hyun Kim, Seok-Woo Nam, Hyun Namkoong, Yong-Seok Kim, Tea-Kwang Yu
  • Patent number: 8247859
    Abstract: A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: August 21, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hwan Kim, Hun-Hyeoung Leam, Tae-Hyun Kim, Seok-Woo Nam, Hyun Namkoong, Yong-Seok Kim, Tea-Kwang Yu
  • Publication number: 20120082367
    Abstract: A method forms an ultimate or final image of a sample by selecting some of a plurality of image frames and integrating the selected frames. The method includes providing a semiconductor device including a region of interest and a peripheral region; obtaining a plurality of image frames each including a region of interest image and a peripheral region image respectively corresponding to the region of interest and the peripheral region; selecting at least some of the plurality of image frames based on a contrast between the region of interest image and the peripheral region image; and obtaining an image of the semiconductor device by integrating the selected image frames.
    Type: Application
    Filed: September 21, 2011
    Publication date: April 5, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-hoon Byun, Yong-min Cho, Soo-bok Chin, Jae-kwan Park, Seok-woo Nam, Tae-yong Lee, Kee-Hong Lee, Young-min Kim
  • Publication number: 20110284968
    Abstract: A semiconductor device includes a semiconductor substrate having a top surface and a recessed portion including at least two oblique side surfaces and a first bottom surface therebetween, a gate insulating layer formed on the recessed portion, a gate electrode formed on the gate insulating layer, a channel region below the gate electrode in the semiconductor substrate, and gate spacers formed on side surfaces of the gate electrode, wherein both the bottom surface and the side surfaces of the recessed portion include flat surfaces. A method of manufacturing a semiconductor device comprising the steps of forming a recess portion including at least two oblique side surfaces and a bottom surface therebetween in a semiconductor substrate, forming a gate insulating layer formed on the recessed portion, forming a gate electrode formed on the gate insulating layer, forming a channel region below the gate electrode in the semiconductor substrate, and forming gate spacers formed on side surfaces of the gate electrode.
    Type: Application
    Filed: April 29, 2011
    Publication date: November 24, 2011
    Inventors: Kwang-Wook Lee, Jae-Jik Baek, In-Seak Hwang, Seok-Woo Nam
  • Patent number: 8039344
    Abstract: In a method of forming a capacitor, a seed stopper and a sacrificial layer is formed on an insulating interlayer having a plug therethrough. An opening is formed through the sacrificial layer and the seed stopper to expose the plug. A seed is formed on an innerwall of the opening. A lower electrode is formed covering the seed on the innerwall of the opening. The sacrificial layer and the seed are removed. A dielectric layer and an upper electrode are sequentially formed on the lower electrode.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: October 18, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-Jin Lim, Jae-Hong Seo, Seok-Woo Nam, Bong-Hyun Kim, Taek-Soo Jeon
  • Publication number: 20110222207
    Abstract: In a method of forming a dielectric layer structure, a precursor thin film chemisorbed on a substrate in a process chamber is formed using a source gas including a metal precursor. The process chamber is purged and pumped out to remove a remaining source gas therein and to remove any metal precursor physisorbed on the precursor thin film. The forming of the precursor thin film and the purging and pumping out of the process chamber are alternately and repeatedly performed to form a multi-layer precursor thin film. An oxidant is provided onto the multilayer precursor thin film to form a bulk oxide layer.
    Type: Application
    Filed: March 14, 2011
    Publication date: September 15, 2011
    Inventors: Tae-Jong Lee, Jae-Young Park, Jong-Bom Seo, Seok-Woo Nam, Bong-Hyun Kim, Han-Jin Lim, Seung-Sik Chung
  • Patent number: 8012823
    Abstract: Provided are methods of fabricating capacitors of semiconductor devices, the methods including: forming a lower electrode on a semiconductor substrate, performing a pre-process operation on the lower electrode for suppressing deterioration of the lower electrode during a process, forming a dielectric layer on the lower electrode using a source gas and an ozone gas, and forming an upper electrode on the dielectric layer, wherein the pre-process operation and the forming of the dielectric layer may be performed in one device capable of atomic layer deposition.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: September 6, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-jin Lim, Jae-young Park, Young-jin Kim, Seok-woo Nam, Bong-hyun Kim, Kyoung-ryul Yoon, Jae-hyoung Choi, Beom-jong Kim
  • Publication number: 20110175149
    Abstract: A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.
    Type: Application
    Filed: April 4, 2011
    Publication date: July 21, 2011
    Inventors: Jung-Hwan KIM, Hun-Hyeoung LEAM, Tae-Hyun KIM, Seok-Woo NAM, Hyun NAMKOONG, Yong-Seok KIM, Tea-Kwang YU
  • Publication number: 20110124176
    Abstract: In a method of forming a capacitor, a seed stopper and a sacrificial layer is formed on an insulating interlayer having a plug therethrough. An opening is formed through the sacrificial layer and the seed stopper to expose the plug. A seed is formed on an innerwall of the opening. A lower electrode is formed covering the seed on the innerwall of the opening. The sacrificial layer and the seed are removed. A dielectric layer and an upper electrode are sequentially formed on the lower electrode.
    Type: Application
    Filed: November 24, 2010
    Publication date: May 26, 2011
    Inventors: Han-Jin Lim, Jae-Hong Seo, Seok-Woo Nam, Bong-Hyun Kim, Taek-Soo Jeon
  • Patent number: 7928495
    Abstract: A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: April 19, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hwan Kim, Hun-Hyeoung Leam, Tae-Hyun Kim, Seok-Woo Nam, Hyun Namkoong, Yong-Seok Kim, Tea-Kwang Yu
  • Publication number: 20110037141
    Abstract: A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.
    Type: Application
    Filed: October 18, 2010
    Publication date: February 17, 2011
    Inventors: Jung-Hwan Kim, Hun-Hyeoung Leam, Tae-Hyun Kim, Seok-Woo Nam, Hyun Namkoong, Yong-Seok Kim, Tea-Kwang Yu
  • Patent number: 7833875
    Abstract: A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 16, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hwan Kim, Hun-Hyeoung Leam, Tae-Hyun Kim, Seok-Woo Nam, Hyun Namkoong, Yong-Seok Kim, Tea-Kwang Yu
  • Publication number: 20100240191
    Abstract: A method of forming a semiconductor device includes forming a lower electrode layer on a substrate, forming a surface oxide layer on the lower electrode layer, partially removing the lower electrode layer to form a lower electrode, removing the surface oxide layer to expose the lower electrode, forming a capacitor dielectric layer on the lower electrode, and forming an upper electrode on the capacitor dielectric layer.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 23, 2010
    Inventors: Seung-Sik Chung, Jung-Hee Chung, Young-Jin Kim, Seok-Woo Nam, Han-Jin Lim, Kyoung-Ryul Yoon