Abstract: Image sensors may include multiple vertically stacked photodiodes interconnected using vertical deep trench transfer gates. A first n-epitaxial layer may be formed on a residual substrate; a first p-epitaxial layer may be formed on the first n-epitaxial layer; a second n-epitaxial layer may be formed on the first p-epitaxial layer; a second p-epitaxial layer may be formed on the second n-epitaxial layer; and so on. The n-epitaxial layers may serve as accumulation regions for the different epitaxial photodiodes. A separate color filter array is not needed. The vertical transfer gates may be a deep trench that is filled with doped conductive material, lined with gate dielectric liner, and surrounded by a p-doped region. Image sensors formed in this way may be used to support a rolling shutter configuration or a global shutter configuration and can either be front-side illuminated or backside illuminated.

Abstract: Image sensors may include multiple vertically stacked photodiodes interconnected using vertical deep trench transfer gates. A first n-epitaxial layer may be formed on a residual substrate; a first p-epitaxial layer may be formed on the first n-epitaxial layer; a second n-epitaxial layer may be formed on the first p-epitaxial layer; a second p-epitaxial layer may be formed on the second n-epitaxial layer; and so on. The n-epitaxial layers may serve as accumulation regions for the different epitaxial photodiodes. A separate color filter array is not needed. The vertical transfer gates may be a deep trench that is filled with doped conductive material, lined with gate dielectric liner, and surrounded by a p-doped region. Image sensors formed in this way may be used to support a rolling shutter configuration or a global shutter configuration and can either be front-side illuminated or backside illuminated.

Abstract: An imaging system may include an image sensor having a pixel array. The pixel array may receive test signals from multiplexers located at the top or bottom of each column of the array. Test signals may be provided to each column based on a predefined test pattern. In some arrangements, pixel array photodiodes may receive test signals through an anti-blooming transistor while the anti-blooming transistor is on. In other arrangements, dark current of photodiodes in the pixel array may be modulated by voltages applied to the drain of an anti-blooming transistor while the anti-blooming transistor is off. In other arrangements, pixel array photodiodes may receive test signals through a reset transistor. Arbitrary test patterns may be applied to determine photodiode or floating diffusion node leakage and incorrect pixel control voltages. Arbitrary patterns may also be superimposed on light-based image data in the manner of a watermark.

Abstract: An imaging pixel may be provided with an upper substrate layer, a lower substrate layer, a floating diffusion region in the upper substrate layer, and a photodiode in the upper substrate layer that is coupled to the floating diffusion region. The imaging pixel may also include a source follower transistor in the lower substrate layer and an interconnect layer in between the upper substrate layer and the lower substrate layer. The interconnect layer may couple the floating diffusion region directly to the source follower transistor. The imaging pixel may include a reset transistor in the upper substrate layer. The imaging pixel may include a metal layer in the lower substrate layer, a transfer transistor in the upper substrate layer, and an interconnect layer that couples the transfer transistor to the metal layer.

Abstract: An imaging system may include an image sensor having front side illuminated near infrared image sensor pixels. Each pixel may be formed in a graded epitaxial substrate layer such as a graded p-type epitaxial layer or a graded n-type epitaxial layer on a graded p-type epitaxial layer. Each pixel may be separated from an adjacent pixel by an isolation trench formed in the graded epitaxial layer. A deep p-well may be formed within each isolation trench. The isolation trenches and photodiodes for the pixels may be formed in the graded p-type epitaxial layer or the graded n-type epitaxial layer. The graded p-type epitaxial layer may have an increasing concentration of dopants that increases toward the backside of the image sensor. The graded n-type epitaxial layer may have an increasing concentration of dopants that increases toward the front side of the image sensor.

Abstract: An image sensor pixel may include multiple split photodiodes that are covered by a single microlens. The image sensor may include a charge overflow capacitor coupled to a pixel charge storage within the image sensor via a gain control transistor. The image sensor pixel may have phase detection capabilities in a first mode of operation enabled by comparing phase signals generated from the split photodiodes. The image sensor pixel also may generate and readout image signals simultaneously in both rolling shutter operations and global shutter operations in a second mode of operation. The image sensor pixel may also generate an image using a linear combination of at least two signals read out using the charge overflow capacitor and light flickering mitigation operations. The image may be a high dynamic range image that is generated from at least a low exposure signal and a high exposure signal.

Abstract: An image pixel may include a photodiode, storage node, floating diffusion, and capacitor. A first transistor may be coupled between the photodiode and the storage node. A second transistor may be coupled between the storage node and the floating diffusion. A third transistor may be coupled between the capacitor and the floating diffusion. A potential barrier may be formed between the storage node and the capacitor. The potential barrier may exhibit a potential that is between the potential of the photodiode and the potential of the charge storage node. The potential barrier may transfer an overflow portion of image charge from the storage node to the capacitor. The third transistor may transfer the overflow charge from the capacitor to the floating diffusion. The capacitor may shield the storage node from image light or may reflect at least some of the image light towards the photodiode.

Abstract: An imaging pixel may have a fully depleted charge transfer path between a pinned photodiode and a floating diffusion region. A pinned transfer diode may be coupled between the pinned photodiode and the floating diffusion region. The imaging pixel may be formed in upper and lower substrates with an interconnect layer coupling the upper substrate to the lower substrate. The imaging pixel may include one or more storage diodes coupled between the transfer diode and the floating diffusion region. The imaging pixel may be used to capture high dynamic range images with flicker mitigation, images synchronized with light sources, or for high frame rate operation.

Abstract: An imaging pixel may have a fully depleted charge transfer path between a pinned photodiode and a floating diffusion region. A pinned transfer diode may be coupled between the pinned photodiode and the floating diffusion region. The imaging pixel may be formed in upper and lower substrates with an interconnect layer coupling the upper substrate to the lower substrate. The imaging pixel may include one or more storage diodes coupled between the transfer diode and the floating diffusion region. The imaging pixel may be used to capture high dynamic range images with flicker mitigation, images synchronized with light sources, or for high frame rate operation.

Abstract: Visual and near infrared pixels may have deep photodiodes to ensure sufficient capture of light. The pixels may have a silicon layer that is etched to form a microlens for the pixel. The pixels may include an inversion layer formed over the silicon layer to prevent dark current. Additionally, the pixels may include a conductive layer formed over the inversion layer that further prevents dark current. The conductive layer may be coupled to a bias voltage supply line. The conductive layer may be biased during image acquisition to prevent dark current. During readout, the bias voltage may be pulsed at a lower voltage to ensure all of the collected charge is transferred out of the photodiode during charge transfer.

Abstract: An imaging pixel may have a fully depleted charge transfer path between a pinned photodiode and a floating diffusion region. A pinned transfer diode may be coupled between the pinned photodiode and the floating diffusion region. The imaging pixel may be formed in upper and lower substrates with an interconnect layer coupling the upper substrate to the lower substrate. The imaging pixel may include one or more storage diodes coupled between the transfer diode and the floating diffusion region. The imaging pixel may be used to capture high dynamic range images with flicker mitigation, images synchronized with light sources, or for high frame rate operation.

Abstract: An imaging system may include a first image sensor die stacked on top of a second image sensor die. A pixel array may include first pixels having photodiodes in the first image sensor die and second pixels having photodiodes in the second image sensor die. The first pixels may be optimized to detect a first type of electromagnetic radiation (e.g., visible light), whereas the second pixels may be optimized to detect a second type of electromagnetic radiation (e.g., infrared light). Light guide channels may be formed in the first image sensor die to help guide incident light to the photodiodes in the second image sensor substrate. The first and second image sensor dies may be bonded at a wafer level. A first image sensor wafer may be a backside illumination image sensor wafer and a second image sensor wafer may be a front or backside illumination image sensor wafer.

Abstract: A backside illumination image sensor with an array of image sensor pixels is provided. Each pixel may include a photodiode, a storage diode, and associated circuitry formed in a front side of a semiconductor substrate. In accordance with an embodiment, a trench isolation structure may be formed directly over the storage diode but not over the photodiode from a back side of the substrate. The backside trench isolation structure may be filled with absorptive material and can optionally be biased to a ground or negative voltage level. A light shielding layer may also be formed over the backside trench isolation structure on the back side of the substrate. The light shielding layer may be formed from absorptive material or reflective material, and may also be biased to a ground or negative voltage level.

Abstract: An image pixel may include a photodiode, storage node, floating diffusion, and capacitor. A first transistor may be coupled between the photodiode and the storage node. A second transistor may be coupled between the storage node and the floating diffusion. A third transistor may be coupled between the capacitor and the floating diffusion. A potential barrier may be formed between the storage node and the capacitor. The potential barrier may exhibit a potential that is between the potential of the photodiode and the potential of the charge storage node. The potential barrier may transfer an overflow portion of image charge from the storage node to the capacitor. The third transistor may transfer the overflow charge from the capacitor to the floating diffusion. The capacitor may shield the storage node from image light or may reflect at least some of the image light towards the photodiode.

Abstract: Visual and near infrared pixels may have deep photodiodes to ensure sufficient capture of light. The pixels may have a silicon layer that is etched to form a microlens for the pixel. The pixels may include an inversion layer formed over the silicon layer to prevent dark current. Additionally, the pixels may include a conductive layer formed over the inversion layer that further prevents dark current. The conductive layer may be coupled to a bias voltage supply line. The conductive layer may be biased during image acquisition to prevent dark current. During readout, the bias voltage may be pulsed at a lower voltage to ensure all of the collected charge is transferred out of the photodiode during charge transfer.

Abstract: An imaging system may include an array of image pixels arranged in rows and columns that includes first and second pixels in two different columns and a common row. A first column readout circuit may control the first pixel to exhibit a first gain and a second column readout circuit may control the second pixel to exhibit a second gain. The first and second readout circuits may determine whether to adjust the gain of the first and second pixels based on image signals that are captured by the first and second pixels. For example, the first readout circuit may selectively activate a dual conversion gain transistor in the first pixel based on an image signal received from the first pixel and the second readout circuit may independently and selectively activate a dual conversion gain transistor in the second pixel based on an image signal received from the second pixel.

Abstract: An imaging pixel may be provided with an upper substrate layer, a lower substrate layer, a floating diffusion region in the upper substrate layer, and a photodiode in the upper substrate layer that is coupled to the floating diffusion region. The imaging pixel may also include a source follower transistor in the lower substrate layer and an interconnect layer in between the upper substrate layer and the lower substrate layer. The interconnect layer may couple the floating diffusion region directly to the source follower transistor. The imaging pixel may include a reset transistor in the upper substrate layer. The imaging pixel may include a metal layer in the lower substrate layer, a transfer transistor in the upper substrate layer, and an interconnect layer that couples the transfer transistor to the metal layer.

Abstract: A backside illumination image sensor with an array of image sensor pixels is provided. Each pixel may include a photodiode, a storage diode, and associated circuitry formed in a front side of a semiconductor substrate. In accordance with an embodiment, a trench isolation structure may be formed directly over the storage diode but not over the photodiode from a back side of the substrate. The backside trench isolation structure may be filled with absorptive material and can optionally be biased to a ground or negative voltage level. A light shielding layer may also be formed over the backside trench isolation structure on the back side of the substrate. The light shielding layer may be formed from absorptive material or reflective material, and may also be biased to a ground or negative voltage level.

Abstract: An imaging system may include an image sensor having a pixel array. The pixel array may receive test signals from multiplexers located at the top or bottom of each column of the array. Test signals may be provided to each column based on a predefined test pattern. In some arrangements, pixel array photodiodes may receive test signals through an anti-blooming transistor while the anti-blooming transistor is on. In other arrangements, dark current of photodiodes in the pixel array may be modulated by voltages applied to the drain of an anti-blooming transistor while the anti-blooming transistor is off. In other arrangements, pixel array photodiodes may receive test signals through a reset transistor. Arbitrary test patterns may be applied to determine photodiode or floating diffusion node leakage and incorrect pixel control voltages. Arbitrary patterns may also be superimposed on light-based image data in the manner of a watermark.

Abstract: An image sensor may be provided having a pixel array that includes optical cavity image pixels. An optical cavity image pixel may include a photosensitive element in a substrate and a reflective cavity formed from a frontside reflector that is embedded in an intermetal dielectric stack, a backside reflector formed in a dielectric layer above the photosensor that partially covers the photosensor, and sidewall reflectors formed in the substrate between adjacent photosensors using deep trench isolation techniques. Each optical cavity image pixel may also include a light-guide trench above the photosensor that guides light into the reflective cavity for that pixel. Each optical cavity pixel may also include color filter material in the trench. Light that is guided into the reflective cavity by the light-guide trench may experience multiple reflections from the reflectors of the reflective cavity before being absorbed and detected by the photosensor.