Patents by Inventor Sergey Velichko

Sergey Velichko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070112538
    Abstract: An automated semiconductor parametric test system has a control module that is operable to concurrently control both operation of semiconductor test equipment and operation of parametric test instrumentation. A state oscillator module is controlled by the control module, and further may be operated by the control module in some embodiments to control the state of other system modules in synchronization with other system events. A parametric test equipment module facilitates control of the semiconductor parametric test equipment, and a test instrumentation module facilitates control of the parametric test instrumentation.
    Type: Application
    Filed: January 9, 2007
    Publication date: May 17, 2007
    Inventors: Sergey Velichko, Robert Blunn, Michael Dorough
  • Patent number: 7165004
    Abstract: An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: January 16, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Michael J. Dorough, Robert G. Blunn, Sergey A. Velichko
  • Patent number: 7162386
    Abstract: An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: January 9, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Michael J. Dorough, Robert G. Blunn, Sergey A. Velichko
  • Patent number: 7139672
    Abstract: An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: November 21, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Michael J. Dorough, Robert G. Blunn, Sergey A. Velichko
  • Publication number: 20060212253
    Abstract: An intelligent measurement modular semiconductor parametric test system comprises an engine control module. The engine control module is operable to communicate with a user via a user interface, and is further operable to communicate with and to control the state of at least one other module in the semiconductor parametric test system including pluggable modules. The engine control module is further operable to control test flow via a test monitor module based on data and control events received from an intelligent measurement module. Other modules in various embodiments comprise prober monitor modules.
    Type: Application
    Filed: May 10, 2006
    Publication date: September 21, 2006
    Inventors: Sergey Velichko, Michael Dorough, Robert Blunn
  • Publication number: 20060125509
    Abstract: An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.
    Type: Application
    Filed: January 30, 2006
    Publication date: June 15, 2006
    Inventors: Michael Dorough, Robert Blunn, Sergey Velichko
  • Publication number: 20060122803
    Abstract: An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.
    Type: Application
    Filed: January 30, 2006
    Publication date: June 8, 2006
    Inventors: Michael Dorough, Robert Blunn, Sergey Velichko
  • Publication number: 20060064268
    Abstract: Methods, systems, and apparatuses provide dynamic creation and modification of wafer test maps. Test plans are defined for a testing session of a wafer lot. The test plan is associated with a number of seed map patterns. During a wafer lot testing session, test results are dynamically obtained and examined at run-time of a test. Moreover, the seed map patterns are overlaid on the test sites defined in the test plan. If the test result statistics are outside of defined threshold tolerance levels, then a new wafer test map is created or modified at run-time, according to corresponding seed map patterns. If seed map patterns are within the intersection of valid test sites, then seed map patterns are created at run-time.
    Type: Application
    Filed: November 3, 2005
    Publication date: March 23, 2006
    Inventors: Michael Dorough, Robert Gravelle, Sergey Velichko
  • Patent number: 7010451
    Abstract: Methods, systems, and apparatuses provide dynamic creation and modification of wafer test maps. Test plans are defined for a testing session of a wafer lot. The test plan is associated with a number of seed map patterns. During a wafer lot testing session, test results are dynamically obtained and examined at run-time of a test. Moreover, the seed map patterns are overlaid on the test sites defined in the test plan. If the test result statistics are outside of defined threshold tolerance levels, then a new wafer test map is created or modified at run-time, according to corresponding seed map patterns. If seed map patterns are within the intersection of valid test sites, then seed map patterns are created at run-time.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: March 7, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Michael J. Dorough, Robert M. Gravelle, Sergey A. Velichko
  • Publication number: 20060027566
    Abstract: A method and system for generating control settings for a multi-parameter control system. The interdependencies of processing tools and the related effect on semiconductor wafers within a processing tool is factored into a mathematical model that considers desired and measured wafer quality parameters in the derivation of specific solutions of sets of possible quality parameter adjustments. A selection process determines a set of adjustments such as one that results in minimal changes to the process.
    Type: Application
    Filed: September 29, 2005
    Publication date: February 9, 2006
    Inventors: Sergey Velichko, Jeffrey Nelson, Roger Eagans
  • Publication number: 20050021273
    Abstract: An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.
    Type: Application
    Filed: August 24, 2004
    Publication date: January 27, 2005
    Inventors: Michael Dorough, Robert Blunn, Sergey Velichko
  • Publication number: 20040210413
    Abstract: Methods, systems, and apparatuses provide dynamic creation and modification of wafer test maps. Test plans are defined for a testing session of a wafer lot. The test plan is associated with a number of seed map patterns. During a wafer lot testing session, test results are dynamically obtained and examined at run-time of a test. Moreover, the seed map patterns are overlaid on the test sites defined in the test plan. If the test result statistics are outside of defined threshold tolerance levels, then a new wafer test map is created or modified at run-time, according to corresponding seed map patterns. If seed map patterns are within the intersection of valid test sites, then seed map patterns are created at run-time.
    Type: Application
    Filed: April 17, 2003
    Publication date: October 21, 2004
    Applicant: Micron Technology, Inc.
    Inventors: Michael J. Dorough, Robert M. Gravelle, Sergey A. Velichko
  • Publication number: 20040173599
    Abstract: A method and system for generating control settings for a multi-parameter control system. The interdependencies of processing tools and the related effect on semiconductor wafers within a processing tool is factored into a mathematical model that considers desired and measured wafer quality parameters in the derivation of specific solutions of sets of possible quality parameter adjustments. A selection process determines a set of adjustments such as one that results in minimal changes to the process.
    Type: Application
    Filed: March 4, 2003
    Publication date: September 9, 2004
    Inventors: Sergey A. Velichko, Jeffrey S. Nelson, Roger W. Eagans
  • Publication number: 20030212523
    Abstract: An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.
    Type: Application
    Filed: April 25, 2002
    Publication date: November 13, 2003
    Applicant: Micron Technology, Inc.
    Inventors: Michael J. Dorough, Robert G. Blunn, Sergey A. Velichko
  • Publication number: 20030028343
    Abstract: An intelligent measurement modular semiconductor parametric test system comprises an engine control module. The engine control module is operable to communicate with a user via a user interface, and is further operable to communicate with and to control the state of at least one other module in the semiconductor parametric test system including pluggable modules. The engine control module is further operable to control test flow via a test monitor module based on data and control events received from an intelligent measurement module. Other modules in various embodiments comprise prober monitor modules.
    Type: Application
    Filed: April 25, 2002
    Publication date: February 6, 2003
    Applicant: Micron Technology, Inc.
    Inventors: Sergey A. Velichko, Michael J. Dorough, Robert G. Blunn
  • Publication number: 20020152046
    Abstract: An automated semiconductor parametric test system has a control module that is operable to concurrently control both operation of semiconductor test equipment and operation of parametric test instrumentation. A state oscillator module is controlled by the control module, and further may be operated by the control module in some embodiments to control the state of other system modules in synchronization with other system events. A parametric test equipment module facilitates control of the semiconductor parametric test equipment, and a test instrumentation module facilitates control of the parametric test instrumentation.
    Type: Application
    Filed: April 13, 2001
    Publication date: October 17, 2002
    Inventors: Sergey A. Velichko, Robert G. Blunn, Michael J. Dorough
  • Patent number: 5847276
    Abstract: A method and apparatus for monitoring characteristics of a fluid contained in a vessel includes a fluid displacer suspended in the vessel. The buoyant force acting on the fluid displacer is measured using a pair of force transducers and used to calculate fluid characteristics such as the height of the fluid in the vessel, fluid density, solute concentration, and/or the presence of fluid cascading from one section of the vessel to another.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: December 8, 1998
    Assignee: SCP Global Technologies
    Inventors: Victor B. Mimken, Sergey A. Velichko, Tom Krawzak
  • Patent number: 5744716
    Abstract: A method and apparatus for monitoring characteristics of a fluid contained in a vessel includes a pair of triangular fluid displacers suspended in the vessel. The buoyant forces acting on the fluid displacers are measured using force transducers and used to calculate fluid characteristics such as the height of the fluid in the vessel, fluid density, solute concentration, and/or the presence of fluid cascading from one section of the vessel to another.
    Type: Grant
    Filed: June 7, 1996
    Date of Patent: April 28, 1998
    Assignee: SCP Global Technologies, a division of PRECO, Inc.
    Inventors: Victor B. Mimken, Sergey A. Velichko, Tom Krawzak