Abstract: An imaging system may include an image sensor having an array of image pixels. Each image pixel may include an electronic shutter for controlling when a photosensor in the image pixel accumulates charge. The electronic shutter may be operable in an open state during which charge is allowed to accumulate on the photosensor and a closed state during which charge is drained from the photosensor. The electronic shutter may be cycled through multiple open and closed states during an image frame capture. At the end of each open state, the charge that has been acquired on the photosensor may be transferred from the photosensor to a pixel memory element. By breaking up the total exposure time for a pixel during an image frame into shorter, non-continuous periods of exposure time, dynamic scenery image artifacts may be minimized while maintaining the desired total exposure time.

Abstract: An image sensor may include crosstalk calibration pixels. Crosstalk calibration pixels may include exposed pixels and shielded pixels. Exposed pixels may be partially or completely surrounded by shielded pixels. Calibration pixels may be formed in a checkerboard pattern of alternating shielded and exposed pixels or a double checkerboard pattern of alternating pairs of shielded and exposed pixels. Exposed pixels may have apertures of various size in a shielding layer that shields the shielded pixels from light. Signals generated by exposed and shielded pixels may be used in assessing pixel optical and electrical crosstalk and indirectly deducing the spectral composition of incoming light for particular locations in a pixel array. Information about local crosstalk across the array may be used in coordinate dependent color correction matrices, white balance algorithms, luminance and chroma noise cancellation, edge sharpening, assessment of pixel implantation depth, and measuring a modulation transfer function.

Abstract: Electronic devices may include time-of-flight (ToF) image pixels. Each ToF pixel may include a photodiode, a first capacitor coupled to the photodiode via a first transfer gate, a second capacitor coupled to the photodiode via a second transfer gate, and a third capacitor coupled to the photodiode via a third transfer gate. The first transfer gate may be turned on for a given duration to store a first charge in the first capacitor. The second transfer gate may be turned on for the given duration to store a second charge in the second capacitor. The third transfer gate may be turned on for a duration that is longer than the given duration to store a third charge in the third capacitor. Depth information may be computed based on the first, second, and third stored charges and a corresponding pixel constant.

Abstract: An imaging system may include an image sensor having backside illuminated near infrared image sensor pixels. Each pixel may be formed in a graded epitaxial substrate layer such as a graded n-type epitaxial layer. Each pixel may be separated from an adjacent pixel by an isolation trench formed in the graded epitaxial layer. The isolation trench may be a continuous isolation trench or may be formed from a combined front side isolation trench and backside isolation trench that are separated by a wall structure. A buried front side reflector may be provided that reflects light such as infrared light that has passed through a pixel back into the pixel, thereby effectively doubling the silicon absorption depth of the pixels.

Abstract: Electronic devices may include time-of-flight (ToF) image pixels. Each ToF pixel may include a photodiode, a first capacitor coupled to the photodiode via a first transfer gate, a second capacitor coupled to the photodiode via a second transfer gate, and a third capacitor coupled to the photodiode via a third transfer gate. The first transfer gate may be turned on for a given duration to store a first charge in the first capacitor. The second transfer gate may be turned on for the given duration to store a second charge in the second capacitor. The third transfer gate may be turned on for a duration that is longer than the given duration to store a third charge in the third capacitor. Depth information may be computed based on the first, second, and third stored charges and a corresponding pixel constant.

Abstract: An imaging system may include a first image sensor die stacked on top of a second image sensor die. A pixel array may include first pixels having photodiodes in the first image sensor die and second pixels having photodiodes in the second image sensor die. The first pixels may be optimized to detect a first type of electromagnetic radiation (e.g., visible light), whereas the second pixels may be optimized to detect a second type of electromagnetic radiation (e.g., infrared light). Light guide channels may be formed in the first image sensor die to help guide incident light to the photodiodes in the second image sensor substrate. The first and second image sensor dies may be bonded at a wafer level. A first image sensor wafer may be a backside illumination image sensor wafer and a second image sensor wafer may be a front or backside illumination image sensor wafer.

Abstract: An imaging system may include an array of image pixels arranged in rows and columns that includes first and second pixels in two different columns and a common row. A first column readout circuit may control the first pixel to exhibit a first gain and a second column readout circuit may control the second pixel to exhibit a second gain. The first and second readout circuits may determine whether to adjust the gain of the first and second pixels based on image signals that are captured by the first and second pixels. For example, the first readout circuit may selectively activate a dual conversion gain transistor in the first pixel based on an image signal received from the first pixel and the second readout circuit may independently and selectively activate a dual conversion gain transistor in the second pixel based on an image signal received from the second pixel.

Abstract: An imaging system may include an image sensor having an array of image pixels. Each image pixel may include an electronic shutter for controlling when a photosensor in the image pixel accumulates charge. The electronic shutter may be operable in an open state during which charge is allowed to accumulate on the photosensor and a closed state during which charge is drained from the photosensor. The electronic shutter may be cycled through multiple open and closed states during an image frame capture. At the end of each open state, the charge that has been acquired on the photosensor may be transferred from the photosensor to a pixel memory element. By breaking up the total exposure time for a pixel during an image frame into shorter, non-continuous periods of exposure time, dynamic scenery image artifacts may be minimized while maintaining the desired total exposure time.

Abstract: A global shutter pixel cell includes a serially connected anti-blooming (AB) transistor, storage gate (SG) transistor and transfer (TX) transistor. The serially connected transistors are coupled between a voltage supply and a floating diffusion (FD) region. A terminal of a photodiode (PD) is connected between respective terminals of the AB and the SG transistors; and a terminal of a storage node (SN) diode is connected between respective terminals of the SG and the TX transistors. A portion of the PD region is extended under the SN region, so that the PD region shields the SN region from stray photons. Furthermore, a metallic layer, disposed above the SN region, is extended downwardly toward the SN region, so that the metallic layer shields the SN region from stray photons. Moreover, a top surface of the metallic layer is coated with an anti-reflective layer.

Abstract: An image sensor operable in global shutter mode may include an array of image pixels. Each image pixel may include a photodiode for detecting incoming light and a separate storage diode for temporarily storing charge. To maximize the efficiency of the image pixel array, image pixels may include light guide structures and light shield structures. The light guide structures may be used to funnel light away from the storage node and into the photodiode, while the light shield structures may be formed over storage nodes to block light from entering the storage nodes. The light guide structures may fill cone-shaped cavities in a dielectric layer, or the light guide structures may form sidewalls having a ring-shaped horizontal cross section. Metal interconnect structures in the dielectric layer may be arranged in concentric annular structures to form a near-field diffractive element that funnels light towards the appropriate photodiode.

Abstract: An image sensor may include crosstalk calibration pixels. Crosstalk calibration pixels may include exposed pixels and shielded pixels. Exposed pixels may be partially or completely surrounded by shielded pixels. Calibration pixels may be formed in a checkerboard pattern of alternating shielded and exposed pixels or a double checkerboard pattern of alternating pairs of shielded and exposed pixels. Exposed pixels may have apertures of various size in a shielding layer that shields the shielded pixels from light. Signals generated by exposed and shielded pixels may be used in assessing pixel optical and electrical crosstalk and indirectly deducing the spectral composition of incoming light for particular locations in a pixel array. Information about local crosstalk across the array may be used in coordinate dependent color correction matrices, white balance algorithms, luminance and chroma noise cancellation, edge sharpening, assessment of pixel implantation depth, and measuring a modulation transfer function.

Abstract: An imaging system may include an image sensor having backside illuminated near infrared image sensor pixels. Each pixel may be formed in a graded epitaxial substrate layer such as a graded n-type epitaxial layer. Each pixel may be separated from an adjacent pixel by an isolation trench formed in the graded epitaxial layer. The isolation trench may be a continuous isolation trench or may be formed from a combined front side isolation trench and backside isolation trench that are separated by a wall structure. A buried front side reflector may be provided that reflects light such as infrared light that has passed through a pixel back into the pixel, thereby effectively doubling the silicon absorption depth of the pixels.

Abstract: An imaging system may include an image sensor having front side illuminated near infrared image sensor pixels. Each pixel may be formed in a graded epitaxial substrate layer such as a graded p-type epitaxial layer or a graded n-type epitaxial layer on a graded p-type epitaxial layer. Each pixel may be separated from an adjacent pixel by an isolation trench formed in the graded epitaxial layer. A deep p-well may be formed within each isolation trench. The isolation trenches and photodiodes for the pixels may be formed in the graded p-type epitaxial layer or the graded n-type epitaxial layer. The graded p-type epitaxial layer may have an increasing concentration of dopants that increases toward the backside of the image sensor. The graded n-type epitaxial layer may have an increasing concentration of dopants that increases toward the front side of the image sensor.

Abstract: A global shutter pixel cell includes a serially connected anti-blooming (AB) transistor, storage gate (SG) transistor and transfer (TX) transistor. The serially connected transistors are coupled between a voltage supply and a floating diffusion (FD) region. A terminal of a photodiode (PD) is connected between respective terminals of the AB and the SG transistors; and a terminal of a storage node (SN) diode is connected between respective terminals of the SG and the TX transistors. A portion of the PD region is extended under the SN region, so that the PD region shields the SN region from stray photons. Furthermore, a metallic layer, disposed above the SN region, is extended downwardly toward the SN region, so that the metallic layer shields the SN region from stray photons. Moreover, a top surface of the metallic layer is coated with an anti-reflective layer.

Abstract: Methods, systems and apparatuses for an imager that improve the quality of a captured image. The imager includes a pixel having a photosensor that generates charge in response to receiving electromagnetic radiation and a storage region that stores the generated charge. A protection region assists in keeping undesirable charge from reaching the storage region.

Abstract: Methods, systems and apparatuses for an imager that improve the quality of a captured image. The imager includes a pixel having a photosensor that generates charge in response to receiving electromagnetic radiation and a storage region that stores the generated charge. A protection region assists in keeping undesirable charge from reaching the storage region.

Abstract: A method, apparatus, and system providing a pixel having increased conversion gain by decreasing the size of an output charge storage region to less than that of a photosensor. A pixel readout is executed by multiple sampling signals based on portions of charge transferred from the photosensor to the storage region and combining the sampled signals in either the analog domain or the digital domain into a representative pixel output signal.

Abstract: A method and system for generating control settings for a multi-parameter control system. The interdependencies of processing tools and the related effect on semiconductor wafers within a processing tool is factored into a mathematical model that considers desired and measured wafer quality parameters in the derivation of specific solutions of sets of possible quality parameter adjustments. A selection process determines a set of adjustments such as one that results in minimal changes to the process.

Abstract: An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.

Abstract: An intelligent measurement modular semiconductor parametric test system comprises an engine control module. The engine control module is operable to communicate with a user via a user interface, and is further operable to communicate with and to control the state of at least one other module in the semiconductor parametric test system including pluggable modules. The engine control module is further operable to control test flow via a test monitor module based on data and control events received from an intelligent measurement module. Other modules in various embodiments comprise prober monitor modules.