Patents by Inventor Seung-Bum Kim

Seung-Bum Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200202955
    Abstract: A memory device includes a voltage generator that provides a read voltage to a selected word line and provides a pass voltage to a plurality of unselected word lines, and a deterioration level detection circuit. The selected word line and the unselected word lines are connected to a plurality of memory cells. The deterioration level detection circuit detects a deterioration level of memory cells connected to the selected word line based on data of memory cells that receive the read voltage. The memory cells connected to the selected word line and the memory cells that receive the read voltage are included in the plurality of memory cells. The voltage generator changes the pass voltage provided to the unselected word lines based on the deterioration level.
    Type: Application
    Filed: March 2, 2020
    Publication date: June 25, 2020
    Inventors: HAN JUN LEE, SEUNG BUM KIM, IL HAN PARK
  • Patent number: 10690080
    Abstract: A method of diagnosing a fault of a timer for monitoring an engine off time is capable of accurately determining whether a timer that monitors an engine off time between a previous start off time and a next start on time of an engine has an error by using an engine coolant temperature, an engine oil temperature, a fuel tank pressure, a fuel tank temperature, and an outside air temperature.
    Type: Grant
    Filed: December 2, 2017
    Date of Patent: June 23, 2020
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventor: Seung Bum Kim
  • Patent number: 10680005
    Abstract: A nonvolatile memory device includes a memory cell array and a control circuit. The memory cell array includes a plurality of memory blocks, each including a plurality memory cells coupled to word-lines respectively, and the word-lines are stacked vertically on a substrate. The control circuit divides a first memory block of the plurality of memory blocks into a partial bad region and a partial normal region based on error information of an uncorrectable error of the first memory block which is designated as a bad block. The control circuit performs a memory operation on the partial normal region by applying a first bias condition to the partial bad region and by applying a second bias condition to the partial normal region, based on a command and an address, and the first bias condition is different from the second bias condition.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: June 9, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Bum Kim, Chan-Ho Kim
  • Patent number: 10655552
    Abstract: A canister purge control method for a vehicle can reduce the number of components of an active purge system provided in the vehicle. An active purge operation is performed using a pressure value measured by an intake pressure sensor, instead of a pressure value measured by a rear-end pressure sensor, after a purge control solenoid valve is fully opened.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: May 19, 2020
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventor: Seung Bum Kim
  • Patent number: 10607705
    Abstract: A memory device includes a voltage generator that provides a read voltage to a selected word line and provides a pass voltage to a plurality of unselected word lines, and a deterioration level detection circuit. The selected word line and the unselected word lines are connected to a plurality of memory cells. The deterioration level detection circuit detects a deterioration level of memory cells connected to the selected word line based on data of memory cells that receive the read voltage. The memory cells connected to the selected word line and the memory cells that receive the read voltage are included in the plurality of memory cells. The voltage generator changes the pass voltage provided to the unselected word lines based on the deterioration level.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: March 31, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Han Jun Lee, Seung Bum Kim, Il Han Park
  • Publication number: 20200098433
    Abstract: A non-volatile memory includes a memory cell region including an outer region proximate a first end of the memory cell region and an inner region separated from the first end by the outer region, first and second bit lines, an outer memory cell string including memory cells connected to an outer pillar extending vertically upward through the outer region, and an inner memory cell string including memory cells connected to an inner pillar extending vertically upward through the inner region, and a data input/output (I/O). The data I/O circuit includes a page buffer circuit that connects the first bit line during a first read operation directed to memory cells of the outer memory cell string, and connects the second bit line during a second read operation directed to memory cells of the inner memory cell string, and a read voltage determination unit that selects a first optimal read voltage used during the first read operation, and a second optimal read voltage used during the second read operation.
    Type: Application
    Filed: June 7, 2019
    Publication date: March 26, 2020
    Inventors: SU CHANG JEON, SEUNG BUM KIM, JI YOUNG LEE
  • Publication number: 20200098436
    Abstract: Nonvolatile memory device includes a memory cell array including pages, each of the pages including memory cells storing data bits, each of the data bits being selectable by a different threshold voltage, a page buffer circuit coupled to the memory cell array through bit-lines, the page buffer circuit including page buffers to sense data from selected memory cells, and perform a first read operation and a second read operation, each including two sequential sensing operations to determine one data state, and each of the page buffers including a latch configured to sequentially store results of the two sequential sensing operations, and a control circuit to control the page buffers to store a result of the first read operation, reset the latches after completion of the first read operation, and perform the second read operation based on a valley determined based on the result of the first read operation.
    Type: Application
    Filed: March 26, 2019
    Publication date: March 26, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seung-Bum Kim, II-Han Park, Ji-Young Lee, Su-Chang Jeon
  • Publication number: 20190392904
    Abstract: A method of erasing a memory device, the method of erasing the memory device including: performing, in a first erase period, a first erase operation on memory cells respectively connected to a plurality of word lines, wherein at least one of the memory cells, which is included in a memory block, is not erase-passed; determining, after the first erase period, an erase operation speed by applying a verify voltage to at least one of the plurality of word lines, and determining an effective erasing time for each word line based on the determined erase operation speed; and performing, in a second erase period, a second erase operation on the memory cells respectively connected to the plurality of word lines based on the determined effective erasing times.
    Type: Application
    Filed: September 6, 2019
    Publication date: December 26, 2019
    Inventors: JI-YOON PARK, Wan-dong KIM, Seung-bum KIM, Deok-woo LEE, You-se KIM, Se-hwan PARK, Jin-woo PARK
  • Publication number: 20190353112
    Abstract: A canister purge control method for a vehicle can reduce the number of components of an active purge system provided in the vehicle. An active purge operation is performed using a pressure value measured by an intake pressure sensor, instead of a pressure value measured by a rear-end pressure sensor, after a purge control solenoid valve is fully opened.
    Type: Application
    Filed: September 19, 2018
    Publication date: November 21, 2019
    Inventor: Seung Bum Kim
  • Publication number: 20190348418
    Abstract: Disclosed are a semiconductor device capable of reducing parasitic capacitance between adjacent conductive structures and a method for fabricating the same. The semiconductor device includes a plurality of bit line structures each comprising a first contact plug formed over a substrate and a bit line formed over the first contact plug. A spacer structure having air gaps is formed on sidewalls of the first contact plug and on sidewalls of the bit line. An plug isolation layer is formed between the plurality of bit line structures. The isolation layer includes an opening. A second contact plug is formed in the opening and a memory element is formed over the second contact plug.
    Type: Application
    Filed: July 24, 2019
    Publication date: November 14, 2019
    Inventors: Chang-Youn HWANG, Noh-Jung KWAK, Hong-Gu YI, Yun-Je CHOI, Se-Han KWON, Ki-Soo CHOI, Seung-Bum KIM, Do-Hyung KIM, Doo-Sung JUNG, Dae-Sik PARK
  • Patent number: 10438666
    Abstract: A method of erasing a memory device, the method of erasing the memory device including: performing, in a first erase period, a first erase operation on memory cells respectively connected to a plurality of word lines, wherein at least one of the memory cells, which is included in a memory block, is not erase-passed; determining, after the first erase period, an erase operation speed by applying a verify voltage to at least one of the plurality of word lines, and determining an effective erasing time for each word line based on the determined erase operation speed; and performing, in a second erase period, a second erase operation on the memory cells respectively connected to the plurality of word lines based on the determined effective erasing times.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: October 8, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji-yoon Park, Wan-dong Kim, Seung-bum Kim, Deok-woo Lee, You-se Kim, Se-hwan Park, Jin-woo Park
  • Publication number: 20190304554
    Abstract: A memory device includes: a memory cell array; a control logic circuit; and a row decoder. The row decoder is configured to activate string selection lines based on control of the control logic circuit. A program interval is formed between a first program operation and a second program operation. The control logic circuit includes a reprogram controller configured to control the row decoder so that a program interval differs in the memory cells connected to different string selection lines among the memory cells connected to a first wordline.
    Type: Application
    Filed: March 12, 2019
    Publication date: October 3, 2019
    Inventors: SEUNG-BUM KIM, MIN-SU KIM, DEOK-WOO LEE
  • Patent number: 10431314
    Abstract: A non-volatile memory device includes multiple word lines, and a voltage generator. Some of the word lines correspond to a deterioration area. The voltage generator is configured to generate a program voltage provided to multiple memory cells through the word lines. Control logic implemented by the non-volatile memory device is configured to control a program operation and an erase operation on the word lines. The deterioration area includes word lines of a first group and word lines of a second group. The control logic is configured to control a program sequence so that each of the word lines of the second group is programmed after an adjacent word line of the first group is programmed, and to control a distribution so that a threshold voltage level corresponding to an erase state of each of the word lines of the first group is higher than a threshold voltage level corresponding to an erase state of each of the word lines of the second group.
    Type: Grant
    Filed: June 3, 2018
    Date of Patent: October 1, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Bum Kim, Deok-Woo Lee, Dong-Hun Kwak
  • Patent number: 10428722
    Abstract: A temperature management method for a hybrid vehicle which includes: a flow rate control valve controlling flow of coolant to an engine, a heater, a heat exchanger, and a radiator; and an exhaust heat recovery device coupled to the flow rate control valve via the heater, the exhaust heat recovery device performing heat exchange between the coolant received from the heater and exhaust gas received from the engine, and supplying the heat-exchanged coolant to the engine, includes: identifying whether the heater is on or off; and identifying at least one of an outside air temperature, a coolant temperature, or an oil temperature and operating the flow rate control valve in a flow stop mode to prevent the coolant of the engine from discharging.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: October 1, 2019
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventor: Seung Bum Kim
  • Patent number: 10422262
    Abstract: A method for catalyst heating control for controlling a catalyst heating period of a catalyst heating system in which lambda sensors are each mounted at upstream and downstream sides of a catalyst converter may include determining a temperature of exhaust gas after an engine starts; determining an oxygen storage capacity of a catalyst depending on the determined temperature of the exhaust gas; comparing the determined oxygen storage capacity with a reference value to decide an aging level of the catalyst; and determining times of the catalyst heating period to be different from each other depending on the decided aging level of the catalyst.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: September 24, 2019
    Assignee: Hyundai Motor Company
    Inventor: Seung Bum Kim
  • Patent number: 10415419
    Abstract: A system for modulating turbine blade tip clearance is provided. The system may comprise an actuation control system having at least one actuator configured to modulate turbine blade tip clearance between a turbine blade tip and a blade outer air seal (BOAS). Each actuator may be coupled to the BOAS. Each actuator may comprise a solid-state motion amplification device such as a flextensional actuator. The actuators may be configured to move the BOAS in a radial direction from a first position to a second position to control tip clearance.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: September 17, 2019
    Assignee: United Technologies Corporation
    Inventors: Fanping Sun, Zaffir A. Chaudhry, Lee A. Hoffman, Hailing Wu, Seung Bum Kim, Michael G. McCaffrey, Joel H. Wagner
  • Patent number: 10411014
    Abstract: Disclosed are a semiconductor device capable of reducing parasitic capacitance between adjacent conductive structures and a method for fabricating the same. The semiconductor device includes a plurality of bit line structures each comprising a first contact plug formed over a substrate and a bit line formed over the first contact plug. A spacer structure having air gaps is formed on sidewalls of the first contact plug and on sidewalls of the bit line. An plug isolation layer is formed between the plurality of bit line structures. The isolation layer includes an opening. A second contact plug is formed in the opening and a memory element is formed over the second contact plug.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: September 10, 2019
    Assignee: SK hynix Inc.
    Inventors: Chang-Youn Hwang, Noh-Jung Kwak, Hong-Gu Yi, Yun-Je Choi, Se-Han Kwon, Ki-Soo Choi, Seung-Bum Kim, Do-Hyung Kim, Doo-Sung Jung, Dae-Sik Park
  • Publication number: 20190267104
    Abstract: A memory device includes multiple word lines. A method of operating the memory device includes: performing a first dummy read operation, with respect to first memory cells connected to a first word line among the word lines, by applying a dummy read voltage, having an offset level of a first level, to the first word line; determining, based on a result of the performing of the first dummy read operation, degradation of a threshold voltage distribution of the first memory cells; adjusting an offset level of the dummy read voltage as a second level, based on a result of the determining of the threshold voltage distribution; and performing a second dummy read operation with respect to second memory cells connected to a second word line among the word lines, by applying a dummy read voltage, having the offset level adjusted as the second level, to the second word line among the word lines.
    Type: Application
    Filed: February 13, 2019
    Publication date: August 29, 2019
    Inventors: HAN-JUN LEE, SEUNG-BUM KIM, CHUL-BUM KIM, SEUNG-JAE LEE
  • Publication number: 20190241258
    Abstract: A rotor blade deflection sensing system including a rotor blade having a first surface, a second surface, a third surface and a fourth surface. At least two fiber optic sensor arrays are mounted to the rotor blade. At least one of the at least two fiber optic sensor arrays is mounted to one of the first surface, the second surface, the third surface and the fourth surface and another of the at least two fiber optic sensor arrays being mounted to another of the first surface, a second surface, a third surface and a fourth surface. A controller is operatively connected to the at least two fiber optic sensor arrays. The controller determines one or more of a flapwise and an edgewise displacement based on inputs from the at least two fiber optic sensor arrays.
    Type: Application
    Filed: May 12, 2017
    Publication date: August 8, 2019
    Inventors: Derek Geiger, Seung Bum Kim, Claude G. Matalanis, Brian E. Wake, Patrick Bowles
  • Publication number: 20190234336
    Abstract: A vehicle predictive control system based on big data includes: a vehicle terminal, which is installed in each of a plurality of vehicles, collecting status information related with an in-vehicle device in a corresponding vehicle to transmit the collected status information in real time, and transmitting problem occurrence information upon problem occurrence of the in-vehicle device; and a big data service provider classifying and storing the status information received from the vehicle terminal as big data, and obtaining a problem occurrence condition based on the status information to transmit information corresponding to the problem occurrence condition to the vehicle terminal when receiving the problem occurrence information of the in-vehicle device from the vehicle terminal of at least some vehicles among the plurality of vehicles.
    Type: Application
    Filed: July 13, 2018
    Publication date: August 1, 2019
    Inventor: Seung Bum KIM