Abstract: Methods of fabricating solar cells using UV-curing of light-receiving surfaces of the solar cells, and the resulting solar cells, are described herein. In an example, a method of fabricating a solar cell includes forming a passivating dielectric layer on a light-receiving surface of a silicon substrate. The method also includes forming an anti-reflective coating (ARC) layer below the passivating dielectric layer. The method also includes exposing the ARC layer to ultra-violet (UV) radiation. The method also includes, subsequent to exposing the ARC layer to ultra-violet (UV) radiation, thermally annealing the ARC layer.

Abstract: A display device has a timing controller and a microdriver. The timing controller receives multiple bit sequences of image data for multiple pixels of the display device. The timing controller also reorders the multiple bit sequences based on a significant bit position within the multiple bit sequences. Each of the multiple bit sequences corresponds to a respective individual pixel of the multiple pixels. The microdriver receives the reordered multiple bit sequences and drives the multiple pixels using the reordered plurality of bit sequences.

Abstract: A display device has a timing controller and a microdriver. The timing controller receives multiple bit sequences of image data for multiple pixels of the display device. The timing controller also reorders the multiple bit sequences based on a significant bit position within the multiple bit sequences. Each of the multiple bit sequences corresponds to a respective individual pixel of the multiple pixels. The microdriver receives the reordered multiple bit sequences and drives the multiple pixels using the reordered plurality of bit sequences.

Abstract: One embodiment relates to a method of fabricating a solar cell. A silicon lamina is cleaved from the silicon substrate. The backside of the silicon lamina includes the P-type and N-type doped regions. A metal foil is attached to the backside of the silicon lamina. The metal foil may be used advantageously as a built-in carrier for handling the silicon lamina during processing of a frontside of the silicon lamina. Another embodiment relates to a solar cell that includes a silicon lamina having P-type and N-type doped regions on the backside. A metal foil is adhered to the backside of the lamina, and there are contacts formed between the metal foil and the doped regions. Other embodiments, aspects and features are also disclosed.

Abstract: A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.

Abstract: A solar cell can include a built-in bypass diode. In one embodiment, the solar cell can include an active region disposed in or above a first portion of a substrate and a bypass diode disposed in or above a second portion of the substrate. The first and second portions of the substrate can be physically separated with a groove. A metallization structure can couple the active region to the bypass diode.

Abstract: A bypass diode can include a first conductive region of a first conductivity type disposed above a substrate of a solar cell and a second conductive region of a second conductivity type disposed above the first conductive region. The bypass diode can include a thin dielectric region disposed directly between the first and second conductive regions.

Abstract: Methods of testing a semiconductor, and semiconductor testing apparatus, are described. In an example, a method for testing a semiconductor can include applying light on the semiconductor to induce photonic degradation. The method can also include receiving a photoluminescence measurement induced from the applied light from the semiconductor and monitoring the photonic degradation of the semiconductor from the photoluminescence measurement.

Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a solar cell can include a substrate having a light-receiving surface and a back surface. A first doped region of a first conductivity type, wherein the first doped region is disposed in a first portion of the back surface. A first thin dielectric layer disposed over the back surface of the substrate, where a portion of the first thin dielectric layer is disposed over the first doped region of the first conductivity type. A first semiconductor layer disposed over the first thin dielectric layer. A second doped region of a second conductivity type in the first semiconductor layer, where the second doped region is disposed over a second portion of the back surface. A first conductive contact disposed over the first doped region and a second conductive contact disposed over the second doped region.

Abstract: A solar cell can include a built-in bypass diode. In one embodiment, the solar cell can include an active region disposed in or above a first portion of a substrate and a bypass diode disposed in or above a second portion of the substrate. The first and second portions of the substrate can be physically separated with a groove. A metallization structure can couple the active region to the bypass diode.

Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a solar cell can include a substrate having a light-receiving surface and a back surface. A first doped region of a first conductivity type, wherein the first doped region is disposed in a first portion of the back surface. A first thin dielectric layer disposed over the back surface of the substrate, where a portion of the first thin dielectric layer is disposed over the first doped region of the first conductivity type. A first semiconductor layer disposed over the first thin dielectric layer. A second doped region of a second conductivity type in the first semiconductor layer, where the second doped region is disposed over a second portion of the back surface. A first conductive contact disposed over the first doped region and a second conductive contact disposed over the second doped region.

Abstract: Methods of fabricating solar cells using UV-curing of light-receiving surfaces of the solar cells, and the resulting solar cells, are described herein. In an example, a method of fabricating a solar cell includes forming a passivating dielectric layer on a light-receiving surface of a silicon substrate. The method also includes forming an anti-reflective coating (ARC) layer below the passivating dielectric layer. The method also includes exposing the ARC layer to ultra-violet (UV) radiation. The method also includes, subsequent to exposing the ARC layer to ultra-violet (UV) radiation, thermally annealing the ARC layer.

Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.

Abstract: Methods of testing a semiconductor, and semiconductor testing apparatus, are described. In an example, a method for testing a semiconductor can include applying light on the semiconductor to induce photonic degradation. The method can also include receiving a photoluminescence measurement induced from the applied light from the semiconductor and monitoring the photonic degradation of the semiconductor from the photoluminescence measurement.

Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type region architectures fabricated using an etch paste, and the resulting solar cells, are described herein. In an example, a solar cell includes a plurality of P-type polycrystalline silicon regions is disposed on a first thin dielectric layer disposed on a back surface of an N-type semiconductor substrate. A plurality of N-type polycrystalline silicon regions is disposed on a second thin dielectric layer disposed in a corresponding one of a plurality of trenches interleaving the plurality of P-type polycrystalline silicon regions in the back surface of the N-type semiconductor substrate. A plurality of conductive contact structures is electrically connected to the P-type polycrystalline silicon regions and the N-type polycrystalline silicon regions.

Abstract: Methods of fabricating conductive contacts for polycrystalline silicon features of solar cells, and the resulting solar cells, are described. In an example, a method of fabricating a solar cell includes providing a substrate having a polycrystalline silicon feature. The method also includes forming a conductive paste directly on the polycrystalline silicon feature. The method also includes firing the conductive paste at a temperature above approximately 700 degrees Celsius to form a conductive contact for the polycrystalline silicon feature. The method also includes, subsequent to firing the conductive paste, forming an anti-reflective coating (ARC) layer on the polycrystalline silicon feature and the conductive contact. The method also includes forming a conductive structure in an opening through the ARC layer and electrically contacting the conductive contact.

Abstract: Methods of testing a semiconductor, and semiconductor testing apparatus, are described. In an example, a method for testing a semiconductor can include applying light on the semiconductor to induce photonic degradation. The method can also include receiving a photoluminescence measurement induced from the applied light from the semiconductor and monitoring the photonic degradation of the semiconductor from the photoluminescence measurement.

Abstract: Methods of passivating light-receiving surfaces of solar cells, and the resulting solar cells, are described. In an example, a solar cell includes a silicon substrate having a light-receiving surface. An intrinsic silicon layer is disposed above the light-receiving surface of the silicon substrate. An N-type silicon layer is disposed on the intrinsic silicon layer. A non-conductive anti-reflective coating (ARC) layer is disposed on the N-type silicon layer. In another example, a solar cell includes a silicon substrate having a light-receiving surface. A tunneling dielectric layer is disposed on the light-receiving surface of the silicon substrate. An N-type silicon layer is disposed on the tunneling dielectric layer. A non-conductive anti-reflective coating (ARC) layer is disposed on the N-type silicon layer.

Abstract: Methods of fabricating a solar cell including metallization techniques and resulting solar cells, are described. In an example, forming a first semiconductor region and a second semiconductor region on the back side of a substrate. A first conductive busbar can be formed above the first semiconductor region. A first portion of a second conductive busbar can be formed above the second semiconductor region. A second portion of the second conductive busbar can be formed above the second semiconductor region, where a separation region separates the second portion and the first portion of the second conductive busbar. A third conductive busbar can be formed above the first semiconductor region. A first conductive bridge can be formed above the separation region, where the first conductive bridge electrically connects the first conductive busbar to the third conductive busbar.

Abstract: Methods of fabricating solar cells having a plurality of sub-cells coupled by cell level interconnection, and the resulting solar cells, are described herein. In an example, a solar cell includes a plurality of sub-cells. Each of the plurality of sub-cells includes a singulated and physically separated semiconductor substrate portion. Each of the plurality of sub-cells includes an on-sub-cell metallization structure interconnecting emitter regions of the sub-cell. An inter-sub-cell metallization structure couples adjacent ones of the plurality of sub-cells. The inter-sub-cell metallization structure is different in composition from the on-sub-cell metallization structure.