Patents by Inventor Seung Bum Rim

Seung Bum Rim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160284917
    Abstract: Methods of fabricating solar cells having passivation layers, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a first surface and a second surface. A plurality of emitter regions is disposed on the first surface of the substrate and spaced apart from one another. An amorphous silicon passivation layer is disposed on each of the plurality of emitter regions and between each of the plurality of emitter regions, directly on an exposed portion of the first surface of the substrate.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Inventors: Seung Bum Rim, David D. Smith, Michael C. Johnson, Christine Bourdet Simmons
  • Publication number: 20160284896
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating a multi-purpose passivation and contact layer, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A P-type emitter region is disposed on the back surface of the substrate. An N-type emitter region is disposed in a trench formed in the back surface of the substrate. An N-type passivation layer is disposed on the N-type emitter region. A first conductive contact structure is electrically connected to the P-type emitter region. A second conductive contact structure is electrically connected to the N-type emitter region and is in direct contact with the N-type passivation layer.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Inventors: Staffan Westerberg, Seung Bum Rim
  • Publication number: 20160284909
    Abstract: Solar cells can include a plurality of sub-cells that include a singulated and physically separated semiconductor portion such that adjacent ones of the singulated and physically separated semiconductor portions can have a groove therebetween. The solar cells can include a metallization structure that couples ones of the plurality of sub-cells. An interconnect structure can couple adjacent ones of the solar cells.
    Type: Application
    Filed: March 27, 2015
    Publication date: September 29, 2016
    Inventors: Gabriel Harley, Seung Bum Rim, Keith Johnston, Matthieu Minault Reich
  • Patent number: 9425337
    Abstract: A solar cell can include a built-in bypass diode. In one embodiment, the solar cell can include an active region disposed in or above a first portion of a substrate and a bypass diode disposed in or above a second portion of the substrate. The first and second portions of the substrate can be physically separated with a groove. A metallization structure can couple the active region to the bypass diode.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: August 23, 2016
    Assignee: SunPower Corporation
    Inventors: Seung Bum Rim, Gabriel Harley
  • Publication number: 20160190354
    Abstract: Approaches for forming barrier-less seed stacks and contacts are described. In an example, a solar cell includes a substrate and a conductive contact disposed on the substrate. The conductive contact includes a copper layer directly contacting the substrate. In another example, a solar cell includes a substrate and a seed layer disposed directly on the substrate. The seed layer consists essentially of one or more non-diffusion-barrier metal layers. A conductive contact includes a copper layer disposed directly on the seed layer. An exemplary method of fabricating a solar cell involves providing a substrate, and forming a seed layer over the substrate. The seed layer includes one or more non-diffusion-barrier metal layers. The method further involves forming a conductive contact for the solar cell from the seed layer.
    Type: Application
    Filed: March 8, 2016
    Publication date: June 30, 2016
    Inventors: Mukul Agrawal, Seung Bum Rim, Michael Cudzinovic
  • Publication number: 20160087140
    Abstract: Methods of fabricating solar cells using simplified deposition processes, and the resulting solar cells, are described. In an example, a method of fabricating a solar cell involves loading a template substrate into a deposition chamber and, without removing the template substrate from the deposition chamber, performing a deposition method. The deposition method involves forming a first silicon layer on the template substrate, the first silicon layer of a first conductivity type. The deposition method also involves forming a second silicon layer on the first silicon layer, the second silicon layer of the first conductivity type. The deposition method also involves forming a third silicon layer above the second silicon layer, the third silicon layer of a second conductivity type. The deposition method also involves forming a solid state doping layer on the third silicon layer, the solid state doping layer of the first conductivity type.
    Type: Application
    Filed: September 24, 2014
    Publication date: March 24, 2016
    Inventors: Seung Bum Rim, Matthieu Moors
  • Patent number: 9263601
    Abstract: Enhanced adhesion of seed layers for solar cell conductive contacts and methods of forming solar cell conductive contacts are described. For example, a method of fabricating a solar cell includes forming an adhesion layer above an emitter region of a substrate. A metal seed paste layer is formed on the adhesion layer. The metal seed paste layer and the adhesion layer are annealed to form a conductive layer in contact with the emitter region of the substrate. A conductive contact for the solar cell is formed from the conductive layer.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: February 16, 2016
    Assignee: SunPower Corporation
    Inventors: Junbo Wu, Michael C. Johnson, Michael Cudzinovic, Joseph Behnke, Xi Zhu, David D. Smith, Richard Sewell Hamilton, Xiuwen Tu, Seung Bum Rim
  • Publication number: 20160043267
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.
    Type: Application
    Filed: October 21, 2015
    Publication date: February 11, 2016
    Inventors: Seung Bum Rim, David D. Smith, Taiqing Qiu, Staffan Westerberg, Kieran Mark Tracy, Venkatasubramani Balu
  • Patent number: 9249523
    Abstract: Forming a porous layer on a silicon substrate is disclosed. Forming the porous layer can include placing a silicon substrate in a first solution and conducting a first current through the silicon substrate. It can further include conducting a second current through the silicon substrate resulting in a porous layer on the silicon substrate.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: February 2, 2016
    Assignee: SunPower Corporation
    Inventor: Seung Bum Rim
  • Publication number: 20150380574
    Abstract: Methods of passivating light-receiving surfaces of solar cells with high energy gap (Eg) materials, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface. A passivating dielectric layer is disposed on the light-receiving surface of the substrate. A Group III-nitride material layer is disposed above the passivating dielectric layer. In another example, a solar cell includes a substrate having a light-receiving surface. A passivating dielectric layer is disposed on the light-receiving surface of the substrate. A large direct band gap material layer is disposed above the passivating dielectric layer, the large direct band gap material layer having an energy gap (Eg) of at least approximately 3.3. An anti-reflective coating (ARC) layer disposed on the large direct band gap material layer, the ARC layer comprising a material different from the large direct band gap material layer.
    Type: Application
    Filed: June 27, 2014
    Publication date: December 31, 2015
    Inventors: Michael C. Johnson, Kieran Mark Tracy, Seung Bum Rim, Jara Fernandez Martin, Périne Jaffrennou, Julien Penaud
  • Publication number: 20150380581
    Abstract: Methods of passivating light-receiving surfaces of solar cells with crystalline silicon, and the resulting solar cells, are described. In an example, a solar cell includes a silicon substrate having a light-receiving surface. An intrinsic silicon layer is disposed above the light-receiving surface of the silicon substrate. An N-type silicon layer is disposed on the intrinsic silicon layer. One or both of the intrinsic silicon layer and the N-type silicon layer is a micro- or poly-crystalline silicon layer. In another example, a solar cell includes a silicon substrate having a light-receiving surface. A passivating dielectric layer is disposed on the light-receiving surface of the silicon substrate. An N-type micro- or poly-crystalline silicon layer disposed on the passivating dielectric layer.
    Type: Application
    Filed: June 27, 2014
    Publication date: December 31, 2015
    Inventors: Michael C. Johnson, Kieran Mark Tracy, Princess Carmi Tomada, David D. Smith, Seung Bum Rim, Périne Jaffrennou
  • Patent number: 9217206
    Abstract: Forming a porous layer on a silicon substrate. Forming the porous layer can include placing a first silicon substrate in a solution, where a first electrode is within a threshold distance to an edge of the silicon substrate. It can further include conducting a first current through the silicon substrate, where the first electrode can be positioned relative to the edge allowing for substantially uniform porosification along the edge of the first silicon substrate.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: December 22, 2015
    Assignee: SunPower Corporation
    Inventors: Joseph Behnke, Seung Bum Rim
  • Publication number: 20150349164
    Abstract: A solar cell can include a built-in bypass diode. In one embodiment, the solar cell can include an active region disposed in or above a first portion of a substrate and a bypass diode disposed in or above a second portion of the substrate. The first and second portions of the substrate can be physically separated with a groove. A metallization structure can couple the active region to the bypass diode.
    Type: Application
    Filed: August 28, 2014
    Publication date: December 3, 2015
    Inventors: Seung Bum Rim, Gabriel Harley
  • Patent number: 9196758
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: November 24, 2015
    Assignee: SunPower Corporation
    Inventors: Seung Bum Rim, David D. Smith, Taiqing Qiu, Staffan Westerberg, Kieran Mark Tracy, Venkatasubramani Balu
  • Patent number: 9171989
    Abstract: A method for fabricating a solar cell is disclosed. The method can include forming a dielectric region on a surface of a solar cell structure and forming a first metal layer on the dielectric region. The method can also include forming a second metal layer on the first metal layer and locally heating a particular region of the second metal layer, where heating includes forming a metal bond between the first and second metal layer and forming a contact between the first metal layer and the solar cell structure. The method can include forming an adhesive layer on the first metal layer and forming a second metal layer on the adhesive layer, where the adhesive layer mechanically couples the second metal layer to the first metal layer and allows for an electrical connection between the second metal layer to the first metal layer.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: October 27, 2015
    Assignee: SumPower Corporation
    Inventors: Taeseok Kim, Seung Bum Rim
  • Publication number: 20150280018
    Abstract: Methods of passivating light-receiving surfaces of solar cells, and the resulting solar cells, are described. In an example, a solar cell includes a silicon substrate having a light-receiving surface. An intrinsic silicon layer is disposed above the light-receiving surface of the silicon substrate. An N-type silicon layer is disposed on the intrinsic silicon layer. A non-conductive anti-reflective coating (ARC) layer is disposed on the N-type silicon layer. In another example, a solar cell includes a silicon substrate having a light-receiving surface. A tunneling dielectric layer is disposed on the light-receiving surface of the silicon substrate. An N-type silicon layer is disposed on the tunneling dielectric layer. A non-conductive anti-reflective coating (ARC) layer is disposed on the N-type silicon layer.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 1, 2015
    Inventors: Seung Bum Rim, Genevieve A. Solomon, Michael C. Johnson, Jérôme Damon-Lacoste, Antoine Marie Olivier Salomon
  • Publication number: 20150280641
    Abstract: A photovoltaic module can include a high voltage photovoltaic laminate that include a plurality of high voltage photovoltaic cells with each of the high voltage photovoltaic cells including a plurality of sub-cells. A boost-less conversion device can be configured to convert a first voltage from the high voltage photovoltaic laminate to a second voltage.
    Type: Application
    Filed: March 28, 2014
    Publication date: October 1, 2015
    Inventors: Gopal Krishan Garg, Seung Bum Rim, Peter John Cousins
  • Publication number: 20150179847
    Abstract: A bypass diode can include a first conductive region of a first conductivity type disposed above a substrate of a solar cell and a second conductive region of a second conductivity type disposed above the first conductive region. The bypass diode can include a thin dielectric region disposed directly between the first and second conductive regions.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 25, 2015
    Inventors: Seung Bum Rim, David D. Smith
  • Publication number: 20150179866
    Abstract: A method for fabricating a solar cell is disclosed. The method can include forming a dielectric region on a surface of a solar cell structure and forming a first metal layer on the dielectric region. The method can also include forming a second metal layer on the first metal layer and locally heating a particular region of the second metal layer, where heating includes forming a metal bond between the first and second metal layer and forming a contact between the first metal layer and the solar cell structure. The method can include forming an adhesive layer on the first metal layer and forming a second metal layer on the adhesive layer, where the adhesive layer mechanically couples the second metal layer to the first metal layer and allows for an electrical connection between the second metal layer to the first metal layer.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 25, 2015
    Inventors: Taeseok Kim, Seung Bum Rim
  • Publication number: 20150179838
    Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 25, 2015
    Applicant: SunPower Corporation
    Inventors: Seung Bum Rim, David D. Smith, Taiqing Qiu, Staffan Westerberg, Kieran Mark Tracy, Balu Venkatasubramani